1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011 - 2015 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
7 #include "zynq-7000.dtsi"
10 model = "Xilinx ZC702 board";
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
23 device_type = "memory";
24 reg = <0x0 0x40000000>;
29 stdout-path = "serial0:115200n8";
33 compatible = "gpio-keys";
37 gpios = <&gpio0 12 0>;
38 linux,code = <108>; /* down */
44 gpios = <&gpio0 14 0>;
45 linux,code = <103>; /* up */
52 compatible = "gpio-leds";
56 gpios = <&gpio0 10 0>;
57 linux,default-trigger = "heartbeat";
62 compatible = "usb-nop-xceiv";
69 compatible = "mmio-sram";
70 reg = <0xfffc0000 0x10000>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_can0_default>;
81 ps-clk-frequency = <33333333>;
86 phy-mode = "rgmii-id";
87 phy-handle = <ðernet_phy>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_gem0_default>;
90 phy-reset-gpio = <&gpio0 11 0>;
93 ethernet_phy: ethernet-phy@7 {
95 device_type = "ethernet-phy";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_gpio0_default>;
106 clock-frequency = <400000>;
107 pinctrl-names = "default", "gpio";
108 pinctrl-0 = <&pinctrl_i2c0_default>;
109 pinctrl-1 = <&pinctrl_i2c0_gpio>;
110 scl-gpios = <&gpio0 50 0>;
111 sda-gpios = <&gpio0 51 0>;
114 compatible = "nxp,pca9548";
115 #address-cells = <1>;
120 #address-cells = <1>;
123 si570: clock-generator@5d {
125 compatible = "silabs,si570";
126 temperature-stability = <50>;
128 factory-fout = <156250000>;
129 clock-frequency = <148500000>;
134 #address-cells = <1>;
137 adv7511: hdmi-tx@39 {
138 compatible = "adi,adv7511";
140 adi,input-depth = <8>;
141 adi,input-colorspace = "yuv422";
142 adi,input-clock = "1x";
143 adi,input-style = <3>;
144 adi,input-justification = "right";
149 #address-cells = <1>;
153 compatible = "atmel,24c08";
159 #address-cells = <1>;
163 compatible = "ti,tca6416";
171 #address-cells = <1>;
175 compatible = "nxp,pcf8563";
181 #address-cells = <1>;
185 compatible = "ti,ucd9248";
189 compatible = "ti,ucd9248";
193 compatible = "ti,ucd9248";
201 pinctrl_can0_default: can0-default {
204 groups = "can0_9_grp";
208 groups = "can0_9_grp";
224 pinctrl_gem0_default: gem0-default {
226 function = "ethernet0";
227 groups = "ethernet0_0_grp";
231 groups = "ethernet0_0_grp";
237 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
243 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
250 groups = "mdio0_0_grp";
254 groups = "mdio0_0_grp";
261 pinctrl_gpio0_default: gpio0-default {
264 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
265 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
266 "gpio0_13_grp", "gpio0_14_grp";
270 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
271 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
272 "gpio0_13_grp", "gpio0_14_grp";
278 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
283 pins = "MIO7", "MIO8";
288 pinctrl_i2c0_default: i2c0-default {
290 groups = "i2c0_10_grp";
295 groups = "i2c0_10_grp";
302 pinctrl_i2c0_gpio: i2c0-gpio {
304 groups = "gpio0_50_grp", "gpio0_51_grp";
309 groups = "gpio0_50_grp", "gpio0_51_grp";
315 pinctrl_sdhci0_default: sdhci0-default {
317 groups = "sdio0_2_grp";
322 groups = "sdio0_2_grp";
329 groups = "gpio0_0_grp";
330 function = "sdio0_cd";
334 groups = "gpio0_0_grp";
342 groups = "gpio0_15_grp";
343 function = "sdio0_wp";
347 groups = "gpio0_15_grp";
355 pinctrl_uart1_default: uart1-default {
357 groups = "uart1_10_grp";
362 groups = "uart1_10_grp";
378 pinctrl_usb0_default: usb0-default {
380 groups = "usb0_0_grp";
385 groups = "usb0_0_grp";
391 pins = "MIO29", "MIO31", "MIO36";
396 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
397 "MIO35", "MIO37", "MIO38", "MIO39";
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_sdhci0_default>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_uart1_default>;
425 usb-phy = <&usb_phy0>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_usb0_default>;