arm64: zynqmp: Use only earlycon bootargs instead of full one
[oweals/u-boot.git] / arch / arm / dts / zynq-zc702.dts
1 /*
2  * Xilinx ZC702 board DTS
3  *
4  *  Copyright (C) 2011 - 2015 Xilinx
5  *  Copyright (C) 2012 National Instruments Corp.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
11
12 / {
13         model = "Zynq ZC702 Development Board";
14         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
15
16         aliases {
17                 ethernet0 = &gem0;
18                 i2c0 = &i2c0;
19                 serial0 = &uart1;
20                 spi0 = &qspi;
21                 mmc0 = &sdhci0;
22         };
23
24         memory@0 {
25                 device_type = "memory";
26                 reg = <0x0 0x40000000>;
27         };
28
29         chosen {
30                 bootargs = "";
31                 stdout-path = "serial0:115200n8";
32         };
33
34         gpio-keys {
35                 compatible = "gpio-keys";
36                 #address-cells = <1>;
37                 #size-cells = <0>;
38                 autorepeat;
39                 sw14 {
40                         label = "sw14";
41                         gpios = <&gpio0 12 0>;
42                         linux,code = <108>; /* down */
43                         wakeup-source;
44                         autorepeat;
45                 };
46                 sw13 {
47                         label = "sw13";
48                         gpios = <&gpio0 14 0>;
49                         linux,code = <103>; /* up */
50                         wakeup-source;
51                         autorepeat;
52                 };
53         };
54
55         leds {
56                 compatible = "gpio-leds";
57
58                 ds23 {
59                         label = "ds23";
60                         gpios = <&gpio0 10 0>;
61                         linux,default-trigger = "heartbeat";
62                 };
63         };
64
65         usb_phy0: phy0 {
66                 compatible = "usb-nop-xceiv";
67                 #phy-cells = <0>;
68         };
69 };
70
71 &amba {
72         ocm: sram@fffc0000 {
73                 compatible = "mmio-sram";
74                 reg = <0xfffc0000 0x10000>;
75         };
76 };
77
78 &can0 {
79         status = "okay";
80         pinctrl-names = "default";
81         pinctrl-0 = <&pinctrl_can0_default>;
82 };
83
84 &clkc {
85         ps-clk-frequency = <33333333>;
86 };
87
88 &gem0 {
89         status = "okay";
90         phy-mode = "rgmii-id";
91         phy-handle = <&ethernet_phy>;
92         pinctrl-names = "default";
93         pinctrl-0 = <&pinctrl_gem0_default>;
94         phy-reset-gpio = <&gpio0 11 0>;
95         phy-reset-active-low;
96
97         ethernet_phy: ethernet-phy@7 {
98                 reg = <7>;
99                 device_type = "ethernet-phy";
100         };
101 };
102
103 &gpio0 {
104         pinctrl-names = "default";
105         pinctrl-0 = <&pinctrl_gpio0_default>;
106 };
107
108 &i2c0 {
109         status = "okay";
110         clock-frequency = <400000>;
111         pinctrl-names = "default", "gpio";
112         pinctrl-0 = <&pinctrl_i2c0_default>;
113         pinctrl-1 = <&pinctrl_i2c0_gpio>;
114         scl-gpios = <&gpio0 50 0>;
115         sda-gpios = <&gpio0 51 0>;
116
117         i2cswitch@74 {
118                 compatible = "nxp,pca9548";
119                 #address-cells = <1>;
120                 #size-cells = <0>;
121                 reg = <0x74>;
122
123                 i2c@0 {
124                         #address-cells = <1>;
125                         #size-cells = <0>;
126                         reg = <0>;
127                         si570: clock-generator@5d {
128                                 #clock-cells = <0>;
129                                 compatible = "silabs,si570";
130                                 temperature-stability = <50>;
131                                 reg = <0x5d>;
132                                 factory-fout = <156250000>;
133                                 clock-frequency = <148500000>;
134                         };
135                 };
136
137                 i2c@1 {
138                         #address-cells = <1>;
139                         #size-cells = <0>;
140                         reg = <1>;
141                         adv7511: hdmi-tx@39 {
142                                 compatible = "adi,adv7511";
143                                 reg = <0x39>;
144                                 adi,input-depth = <8>;
145                                 adi,input-colorspace = "yuv422";
146                                 adi,input-clock = "1x";
147                                 adi,input-style = <3>;
148                                 adi,input-justification = "right";
149                         };
150                 };
151
152                 i2c@2 {
153                         #address-cells = <1>;
154                         #size-cells = <0>;
155                         reg = <2>;
156                         eeprom@54 {
157                                 compatible = "at,24c08";
158                                 reg = <0x54>;
159                         };
160                 };
161
162                 i2c@3 {
163                         #address-cells = <1>;
164                         #size-cells = <0>;
165                         reg = <3>;
166                         gpio@21 {
167                                 compatible = "ti,tca6416";
168                                 reg = <0x21>;
169                                 gpio-controller;
170                                 #gpio-cells = <2>;
171                         };
172                 };
173
174                 i2c@4 {
175                         #address-cells = <1>;
176                         #size-cells = <0>;
177                         reg = <4>;
178                         rtc@51 {
179                                 compatible = "nxp,pcf8563";
180                                 reg = <0x51>;
181                         };
182                 };
183
184                 i2c@7 {
185                         #address-cells = <1>;
186                         #size-cells = <0>;
187                         reg = <7>;
188                         hwmon@52 {
189                                 compatible = "ti,ucd9248";
190                                 reg = <52>;
191                         };
192                         hwmon@53 {
193                                 compatible = "ti,ucd9248";
194                                 reg = <53>;
195                         };
196                         hwmon@54 {
197                                 compatible = "ti,ucd9248";
198                                 reg = <54>;
199                         };
200                 };
201         };
202 };
203
204 &pinctrl0 {
205         pinctrl_can0_default: can0-default {
206                 mux {
207                         function = "can0";
208                         groups = "can0_9_grp";
209                 };
210
211                 conf {
212                         groups = "can0_9_grp";
213                         slew-rate = <0>;
214                         io-standard = <1>;
215                 };
216
217                 conf-rx {
218                         pins = "MIO46";
219                         bias-high-impedance;
220                 };
221
222                 conf-tx {
223                         pins = "MIO47";
224                         bias-disable;
225                 };
226         };
227
228         pinctrl_gem0_default: gem0-default {
229                 mux {
230                         function = "ethernet0";
231                         groups = "ethernet0_0_grp";
232                 };
233
234                 conf {
235                         groups = "ethernet0_0_grp";
236                         slew-rate = <0>;
237                         io-standard = <4>;
238                 };
239
240                 conf-rx {
241                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
242                         bias-high-impedance;
243                         low-power-disable;
244                 };
245
246                 conf-tx {
247                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
248                         bias-disable;
249                         low-power-enable;
250                 };
251
252                 mux-mdio {
253                         function = "mdio0";
254                         groups = "mdio0_0_grp";
255                 };
256
257                 conf-mdio {
258                         groups = "mdio0_0_grp";
259                         slew-rate = <0>;
260                         io-standard = <1>;
261                         bias-disable;
262                 };
263         };
264
265         pinctrl_gpio0_default: gpio0-default {
266                 mux {
267                         function = "gpio0";
268                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
269                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
270                                  "gpio0_13_grp", "gpio0_14_grp";
271                 };
272
273                 conf {
274                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
275                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
276                                  "gpio0_13_grp", "gpio0_14_grp";
277                         slew-rate = <0>;
278                         io-standard = <1>;
279                 };
280
281                 conf-pull-up {
282                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
283                         bias-pull-up;
284                 };
285
286                 conf-pull-none {
287                         pins = "MIO7", "MIO8";
288                         bias-disable;
289                 };
290         };
291
292         pinctrl_i2c0_default: i2c0-default {
293                 mux {
294                         groups = "i2c0_10_grp";
295                         function = "i2c0";
296                 };
297
298                 conf {
299                         groups = "i2c0_10_grp";
300                         bias-pull-up;
301                         slew-rate = <0>;
302                         io-standard = <1>;
303                 };
304         };
305
306         pinctrl_i2c0_gpio: i2c0-gpio {
307                 mux {
308                         groups = "gpio0_50_grp", "gpio0_51_grp";
309                         function = "gpio0";
310                 };
311
312                 conf {
313                         groups = "gpio0_50_grp", "gpio0_51_grp";
314                         slew-rate = <0>;
315                         io-standard = <1>;
316                 };
317         };
318
319         pinctrl_sdhci0_default: sdhci0-default {
320                 mux {
321                         groups = "sdio0_2_grp";
322                         function = "sdio0";
323                 };
324
325                 conf {
326                         groups = "sdio0_2_grp";
327                         slew-rate = <0>;
328                         io-standard = <1>;
329                         bias-disable;
330                 };
331
332                 mux-cd {
333                         groups = "gpio0_0_grp";
334                         function = "sdio0_cd";
335                 };
336
337                 conf-cd {
338                         groups = "gpio0_0_grp";
339                         bias-high-impedance;
340                         bias-pull-up;
341                         slew-rate = <0>;
342                         io-standard = <1>;
343                 };
344
345                 mux-wp {
346                         groups = "gpio0_15_grp";
347                         function = "sdio0_wp";
348                 };
349
350                 conf-wp {
351                         groups = "gpio0_15_grp";
352                         bias-high-impedance;
353                         bias-pull-up;
354                         slew-rate = <0>;
355                         io-standard = <1>;
356                 };
357         };
358
359         pinctrl_uart1_default: uart1-default {
360                 mux {
361                         groups = "uart1_10_grp";
362                         function = "uart1";
363                 };
364
365                 conf {
366                         groups = "uart1_10_grp";
367                         slew-rate = <0>;
368                         io-standard = <1>;
369                 };
370
371                 conf-rx {
372                         pins = "MIO49";
373                         bias-high-impedance;
374                 };
375
376                 conf-tx {
377                         pins = "MIO48";
378                         bias-disable;
379                 };
380         };
381
382         pinctrl_usb0_default: usb0-default {
383                 mux {
384                         groups = "usb0_0_grp";
385                         function = "usb0";
386                 };
387
388                 conf {
389                         groups = "usb0_0_grp";
390                         slew-rate = <0>;
391                         io-standard = <1>;
392                 };
393
394                 conf-rx {
395                         pins = "MIO29", "MIO31", "MIO36";
396                         bias-high-impedance;
397                 };
398
399                 conf-tx {
400                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
401                                "MIO35", "MIO37", "MIO38", "MIO39";
402                         bias-disable;
403                 };
404         };
405 };
406
407 &qspi {
408         u-boot,dm-pre-reloc;
409         status = "okay";
410 };
411
412 &sdhci0 {
413         u-boot,dm-pre-reloc;
414         status = "okay";
415         pinctrl-names = "default";
416         pinctrl-0 = <&pinctrl_sdhci0_default>;
417 };
418
419 &uart1 {
420         u-boot,dm-pre-reloc;
421         status = "okay";
422         pinctrl-names = "default";
423         pinctrl-0 = <&pinctrl_uart1_default>;
424 };
425
426 &usb0 {
427         status = "okay";
428         dr_mode = "host";
429         usb-phy = <&usb_phy0>;
430         pinctrl-names = "default";
431         pinctrl-0 = <&pinctrl_usb0_default>;
432 };