arch/arm/dts/zynq-syzygy-hub.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * SYZYGY Hub DTS
   4  *
   5  *  Copyright (C) 2011 - 2015 Xilinx
   6  *  Copyright (C) 2017 Opal Kelly Inc.
   7  */
   8 /dts-v1/;
   9 /include/ "zynq-7000.dtsi"
  10
  11 / {
  12         model = "SYZYGY Hub";
  13         compatible = "opalkelly,syzygy-hub", "xlnx,zynq-7000";
  14
  15         aliases {
  16                 ethernet0 = &gem0;
  17                 serial0 = &uart0;
  18                 mmc0 = &sdhci0;
  19         };
  20
  21         memory@0 {
  22                 device_type = "memory";
  23                 reg = <0x0 0x40000000>;
  24         };
  25
  26         chosen {
  27                 bootargs = "";
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         usb_phy0: phy0 {
  32                 #phy-cells = <0>;
  33                 compatible = "usb-nop-xceiv";
  34                 reset-gpios = <&gpio0 47 1>;
  35         };
  36 };
  37
  38 &clkc {
  39         ps-clk-frequency = <50000000>;
  40 };
  41
  42 &gem0 {
  43         status = "okay";
  44         phy-mode = "rgmii-id";
  45         phy-handle = <&ethernet_phy>;
  46
  47         ethernet_phy: ethernet-phy@0 {
  48                 reg = <0>;
  49                 device_type = "ethernet-phy";
  50         };
  51 };
  52
  53 &i2c1 {
  54         status = "okay";
  55 };
  56
  57 &sdhci0 {
  58         u-boot,dm-pre-reloc;
  59         status = "okay";
  60 };
  61
  62 &uart0 {
  63         u-boot,dm-pre-reloc;
  64         status = "okay";
  65 };
  66
  67 &usb0 {
  68         status = "okay";
  69         dr_mode = "otg";
  70         usb-phy = <&usb_phy0>;
  71 };