arm: vybrid: Enable lpuart support
[oweals/u-boot.git] / arch / arm / dts / vf.dtsi
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+ or X11
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11 /include/ "skeleton.dtsi"
12
13 / {
14         aliases {
15                 gpio0 = &gpio0;
16                 gpio1 = &gpio1;
17                 gpio2 = &gpio2;
18                 gpio3 = &gpio3;
19                 gpio4 = &gpio4;
20                 serial0 = &uart0;
21                 serial1 = &uart1;
22                 serial2 = &uart2;
23                 serial3 = &uart3;
24                 serial4 = &uart4;
25                 serial5 = &uart5;
26                 spi0 = &dspi0;
27                 spi1 = &dspi1;
28         };
29
30         soc {
31                 #address-cells = <1>;
32                 #size-cells = <1>;
33                 compatible = "simple-bus";
34                 ranges;
35
36                 aips0: aips-bus@40000000 {
37                         compatible = "fsl,aips-bus", "simple-bus";
38                         #address-cells = <1>;
39                         #size-cells = <1>;
40                         ranges;
41
42                         uart0: serial@40027000 {
43                                 compatible = "fsl,vf610-lpuart";
44                                 reg = <0x40027000 0x1000>;
45                                 status = "disabled";
46                         };
47
48                         uart1: serial@40028000 {
49                                 compatible = "fsl,vf610-lpuart";
50                                 reg = <0x40028000 0x1000>;
51                                 status = "disabled";
52                         };
53
54                         uart2: serial@40029000 {
55                                 compatible = "fsl,vf610-lpuart";
56                                 reg = <0x40029000 0x1000>;
57                                 status = "disabled";
58                         };
59
60                         uart3: serial@4002a000 {
61                                 compatible = "fsl,vf610-lpuart";
62                                 reg = <0x4002a000 0x1000>;
63                                 status = "disabled";
64                         };
65
66                         dspi0: dspi0@4002c000 {
67                                 #address-cells = <1>;
68                                 #size-cells = <0>;
69                                 compatible = "fsl,vf610-dspi";
70                                 reg = <0x4002c000 0x1000>;
71                                 num-cs = <5>;
72                                 status = "disabled";
73                         };
74
75                         dspi1: dspi1@4002d000 {
76                                 #address-cells = <1>;
77                                 #size-cells = <0>;
78                                 compatible = "fsl,vf610-dspi";
79                                 reg = <0x4002d000 0x1000>;
80                                 num-cs = <5>;
81                                 status = "disabled";
82                         };
83
84                         qspi0: quadspi@40044000 {
85                                 #address-cells = <1>;
86                                 #size-cells = <0>;
87                                 compatible = "fsl,vf610-qspi";
88                                 reg = <0x40044000 0x1000>;
89                                 status = "disabled";
90                         };
91
92                         gpio0: gpio@40049000 {
93                                 compatible = "fsl,vf610-gpio";
94                                 reg = <0x400ff000 0x40>;
95                                 #gpio-cells = <2>;
96                         };
97
98                         gpio1: gpio@4004a000 {
99                                 compatible = "fsl,vf610-gpio";
100                                 reg = <0x400ff040 0x40>;
101                                 #gpio-cells = <2>;
102                         };
103
104                         gpio2: gpio@4004b000 {
105                                 compatible = "fsl,vf610-gpio";
106                                 reg = <0x400ff080 0x40>;
107                                 #gpio-cells = <2>;
108                         };
109
110                         gpio3: gpio@4004c000 {
111                                 compatible = "fsl,vf610-gpio";
112                                 reg = <0x400ff0c0 0x40>;
113                                 #gpio-cells = <2>;
114                         };
115
116                         gpio4: gpio@4004d000 {
117                                 compatible = "fsl,vf610-gpio";
118                                 reg = <0x400ff100 0x40>;
119                                 #gpio-cells = <2>;
120                         };
121                 };
122
123                 aips1: aips-bus@40080000 {
124                         compatible = "fsl,aips-bus", "simple-bus";
125                         #address-cells = <1>;
126                         #size-cells = <1>;
127                         ranges;
128
129                         uart4: serial@400a9000 {
130                                 compatible = "fsl,vf610-lpuart";
131                                 reg = <0x400a9000 0x1000>;
132                                 status = "disabled";
133                         };
134
135                         uart5: serial@400aa000 {
136                                 compatible = "fsl,vf610-lpuart";
137                                 reg = <0x400aa000 0x1000>;
138                                 status = "disabled";
139                         };
140
141                 };
142         };
143 };