1 // SPDX-License-Identifier: GPL-2.0
3 * ARM Ltd. Versatile Express
5 * Motherboard Express uATX
10 * Original memory map ("Legacy memory map" in the board's
11 * Technical Reference Manual)
13 * WARNING! The hardware described in this file is independent from the
14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
15 * correspondence between the two configurations.
17 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
18 * CHANGES TO vexpress-v2m-rs1.dtsi!
26 arm,vexpress,site = <0>;
27 compatible = "arm,vexpress,v2m-p1", "simple-bus";
28 #address-cells = <2>; /* SMB chipselect number and offset */
30 #interrupt-cells = <1>;
34 compatible = "arm,vexpress-flash", "cfi-flash";
35 reg = <0 0x00000000 0x04000000>,
36 <1 0x00000000 0x04000000>;
41 compatible = "arm,vexpress-psram", "mtd-ram";
42 reg = <2 0x00000000 0x02000000>;
47 compatible = "smsc,lan9118", "smsc,lan9115";
48 reg = <3 0x02000000 0x10000>;
54 vdd33a-supply = <&v2m_fixed_3v3>;
55 vddvario-supply = <&v2m_fixed_3v3>;
59 compatible = "nxp,usb-isp1761";
60 reg = <3 0x03000000 0x20000>;
66 compatible = "simple-bus";
69 ranges = <0 7 0 0x20000>;
71 v2m_sysreg: sysreg@0 {
72 compatible = "arm,vexpress-sysreg";
73 reg = <0x00000 0x1000>;
76 ranges = <0 0 0x1000>;
78 v2m_led_gpios: gpio@8 {
79 compatible = "arm,vexpress-sysreg,sys_led";
85 v2m_mmc_gpios: gpio@48 {
86 compatible = "arm,vexpress-sysreg,sys_mci";
92 v2m_flash_gpios: gpio@4c {
93 compatible = "arm,vexpress-sysreg,sys_flash";
100 v2m_sysctl: sysctl@1000 {
101 compatible = "arm,sp810", "arm,primecell";
102 reg = <0x01000 0x1000>;
103 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
104 clock-names = "refclk", "timclk", "apb_pclk";
106 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
107 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
108 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
112 v2m_i2c_pcie: i2c@2000 {
113 compatible = "arm,versatile-i2c";
114 reg = <0x02000 0x1000>;
116 #address-cells = <1>;
120 compatible = "idt,89hpes32h8";
126 compatible = "arm,pl041", "arm,primecell";
127 reg = <0x04000 0x1000>;
130 clock-names = "apb_pclk";
134 compatible = "arm,pl180", "arm,primecell";
135 reg = <0x05000 0x1000>;
136 interrupts = <9>, <10>;
137 cd-gpios = <&v2m_mmc_gpios 0 0>;
138 wp-gpios = <&v2m_mmc_gpios 1 0>;
139 max-frequency = <12000000>;
140 vmmc-supply = <&v2m_fixed_3v3>;
141 clocks = <&v2m_clk24mhz>, <&smbclk>;
142 clock-names = "mclk", "apb_pclk";
146 compatible = "arm,pl050", "arm,primecell";
147 reg = <0x06000 0x1000>;
149 clocks = <&v2m_clk24mhz>, <&smbclk>;
150 clock-names = "KMIREFCLK", "apb_pclk";
154 compatible = "arm,pl050", "arm,primecell";
155 reg = <0x07000 0x1000>;
157 clocks = <&v2m_clk24mhz>, <&smbclk>;
158 clock-names = "KMIREFCLK", "apb_pclk";
161 v2m_serial0: uart@9000 {
162 compatible = "arm,pl011", "arm,primecell";
163 reg = <0x09000 0x1000>;
165 clocks = <&v2m_oscclk2>, <&smbclk>;
166 clock-names = "uartclk", "apb_pclk";
169 v2m_serial1: uart@a000 {
170 compatible = "arm,pl011", "arm,primecell";
171 reg = <0x0a000 0x1000>;
173 clocks = <&v2m_oscclk2>, <&smbclk>;
174 clock-names = "uartclk", "apb_pclk";
177 v2m_serial2: uart@b000 {
178 compatible = "arm,pl011", "arm,primecell";
179 reg = <0x0b000 0x1000>;
181 clocks = <&v2m_oscclk2>, <&smbclk>;
182 clock-names = "uartclk", "apb_pclk";
185 v2m_serial3: uart@c000 {
186 compatible = "arm,pl011", "arm,primecell";
187 reg = <0x0c000 0x1000>;
189 clocks = <&v2m_oscclk2>, <&smbclk>;
190 clock-names = "uartclk", "apb_pclk";
194 compatible = "arm,sp805", "arm,primecell";
195 reg = <0x0f000 0x1000>;
197 clocks = <&v2m_refclk32khz>, <&smbclk>;
198 clock-names = "wdogclk", "apb_pclk";
201 v2m_timer01: timer@11000 {
202 compatible = "arm,sp804", "arm,primecell";
203 reg = <0x11000 0x1000>;
205 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
206 clock-names = "timclken1", "timclken2", "apb_pclk";
209 v2m_timer23: timer@12000 {
210 compatible = "arm,sp804", "arm,primecell";
211 reg = <0x12000 0x1000>;
213 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
214 clock-names = "timclken1", "timclken2", "apb_pclk";
218 v2m_i2c_dvi: i2c@16000 {
219 compatible = "arm,versatile-i2c";
220 reg = <0x16000 0x1000>;
221 #address-cells = <1>;
225 compatible = "sil,sii9022-tpi", "sil,sii9022";
229 #address-cells = <1>;
233 * Both the core tile and the motherboard routes their output
234 * pads to this transmitter. The motherboard system controller
235 * can select one of them as input using a mux register in
236 * "arm,vexpress-muxfpga". The Vexpress with the CA9 core tile is
237 * the only platform with this specific set-up.
241 dvi_bridge_in_ct: endpoint {
242 remote-endpoint = <&clcd_pads_ct>;
247 dvi_bridge_in_mb: endpoint {
248 remote-endpoint = <&clcd_pads_mb>;
255 compatible = "sil,sii9022-cpi", "sil,sii9022";
261 compatible = "arm,pl031", "arm,primecell";
262 reg = <0x17000 0x1000>;
265 clock-names = "apb_pclk";
268 compact-flash@1a000 {
269 compatible = "arm,vexpress-cf", "ata-generic";
277 compatible = "arm,pl111", "arm,primecell";
278 reg = <0x1f000 0x1000>;
279 interrupt-names = "combined";
281 clocks = <&v2m_oscclk1>, <&smbclk>;
282 clock-names = "clcdclk", "apb_pclk";
283 /* 800x600 16bpp @36MHz works fine */
284 max-memory-bandwidth = <54000000>;
285 memory-region = <&vram>;
288 clcd_pads_mb: endpoint {
289 remote-endpoint = <&dvi_bridge_in_mb>;
290 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
296 v2m_fixed_3v3: fixed-regulator-0 {
297 compatible = "regulator-fixed";
298 regulator-name = "3V3";
299 regulator-min-microvolt = <3300000>;
300 regulator-max-microvolt = <3300000>;
304 v2m_clk24mhz: clk24mhz {
305 compatible = "fixed-clock";
307 clock-frequency = <24000000>;
308 clock-output-names = "v2m:clk24mhz";
311 v2m_refclk1mhz: refclk1mhz {
312 compatible = "fixed-clock";
314 clock-frequency = <1000000>;
315 clock-output-names = "v2m:refclk1mhz";
318 v2m_refclk32khz: refclk32khz {
319 compatible = "fixed-clock";
321 clock-frequency = <32768>;
322 clock-output-names = "v2m:refclk32khz";
326 compatible = "gpio-leds";
329 label = "v2m:green:user1";
330 gpios = <&v2m_led_gpios 0 0>;
331 linux,default-trigger = "heartbeat";
335 label = "v2m:green:user2";
336 gpios = <&v2m_led_gpios 1 0>;
337 linux,default-trigger = "mmc0";
341 label = "v2m:green:user3";
342 gpios = <&v2m_led_gpios 2 0>;
343 linux,default-trigger = "cpu0";
347 label = "v2m:green:user4";
348 gpios = <&v2m_led_gpios 3 0>;
349 linux,default-trigger = "cpu1";
353 label = "v2m:green:user5";
354 gpios = <&v2m_led_gpios 4 0>;
355 linux,default-trigger = "cpu2";
359 label = "v2m:green:user6";
360 gpios = <&v2m_led_gpios 5 0>;
361 linux,default-trigger = "cpu3";
365 label = "v2m:green:user7";
366 gpios = <&v2m_led_gpios 6 0>;
367 linux,default-trigger = "cpu4";
371 label = "v2m:green:user8";
372 gpios = <&v2m_led_gpios 7 0>;
373 linux,default-trigger = "cpu5";
378 compatible = "arm,vexpress,config-bus";
379 arm,vexpress,config-bridge = <&v2m_sysreg>;
382 /* MCC static memory clock */
383 compatible = "arm,vexpress-osc";
384 arm,vexpress-sysreg,func = <1 0>;
385 freq-range = <25000000 60000000>;
387 clock-output-names = "v2m:oscclk0";
390 v2m_oscclk1: oscclk1 {
392 compatible = "arm,vexpress-osc";
393 arm,vexpress-sysreg,func = <1 1>;
394 freq-range = <23750000 65000000>;
396 clock-output-names = "v2m:oscclk1";
399 v2m_oscclk2: oscclk2 {
400 /* IO FPGA peripheral clock */
401 compatible = "arm,vexpress-osc";
402 arm,vexpress-sysreg,func = <1 2>;
403 freq-range = <24000000 24000000>;
405 clock-output-names = "v2m:oscclk2";
409 /* Logic level voltage */
410 compatible = "arm,vexpress-volt";
411 arm,vexpress-sysreg,func = <2 0>;
412 regulator-name = "VIO";
418 /* MCC internal operating temperature */
419 compatible = "arm,vexpress-temp";
420 arm,vexpress-sysreg,func = <4 0>;
425 compatible = "arm,vexpress-reset";
426 arm,vexpress-sysreg,func = <5 0>;
430 compatible = "arm,vexpress-muxfpga";
431 arm,vexpress-sysreg,func = <7 0>;
435 compatible = "arm,vexpress-shutdown";
436 arm,vexpress-sysreg,func = <8 0>;
440 compatible = "arm,vexpress-reboot";
441 arm,vexpress-sysreg,func = <9 0>;
445 compatible = "arm,vexpress-dvimode";
446 arm,vexpress-sysreg,func = <11 0>;