2 * Device Tree Source for UniPhier SoCs default pinctrl settings
4 * Copyright (C) 2015-2017 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
17 groups = "emmc", "emmc_dat8";
21 pinctrl_emmc_1v8: emmc-1v8 {
22 groups = "emmc", "emmc_dat8";
26 pinctrl_ether_mii: ether-mii {
28 function = "ether_mii";
31 pinctrl_ether_rgmii: ether-rgmii {
32 groups = "ether_rgmii";
33 function = "ether_rgmii";
36 pinctrl_ether_rmii: ether-rmii {
37 groups = "ether_rmii";
38 function = "ether_rmii";
71 pinctrl_nand2cs: nand2cs {
72 groups = "nand", "nand_cs1";
81 pinctrl_sd_1v8: sd-1v8 {
91 pinctrl_sd1_1v8: sd1-1v8 {
96 pinctrl_system_bus: system-bus {
97 groups = "system_bus", "system_bus_cs1";
98 function = "system_bus";
101 pinctrl_uart0: uart0 {
106 pinctrl_uart1: uart1 {
111 pinctrl_uart2: uart2 {
116 pinctrl_uart3: uart3 {