Merge branch 'master' of git://www.denx.de/git/u-boot-imx
[oweals/u-boot.git] / arch / arm / dts / uniphier-ph1-pro4.dtsi
1 /*
2  * Device Tree Source for UniPhier PH1-Pro4 SoC
3  *
4  * Copyright (C) 2014-2015 Panasonic Corporation
5  * Copyright (C) 2015      Socionext Inc.
6  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 /include/ "skeleton.dtsi"
12
13 / {
14         compatible = "socionext,ph1-pro4";
15
16         cpus {
17                 #address-cells = <1>;
18                 #size-cells = <0>;
19
20                 cpu@0 {
21                         device_type = "cpu";
22                         compatible = "arm,cortex-a9";
23                         reg = <0>;
24                 };
25
26                 cpu@1 {
27                         device_type = "cpu";
28                         compatible = "arm,cortex-a9";
29                         reg = <1>;
30                 };
31         };
32
33         soc {
34                 compatible = "simple-bus";
35                 #address-cells = <1>;
36                 #size-cells = <1>;
37                 ranges;
38
39                 uart0: serial@54006800 {
40                         compatible = "socionext,uniphier-uart";
41                         status = "disabled";
42                         reg = <0x54006800 0x20>;
43                         clock-frequency = <73728000>;
44                 };
45
46                 uart1: serial@54006900 {
47                         compatible = "socionext,uniphier-uart";
48                         status = "disabled";
49                         reg = <0x54006900 0x20>;
50                         clock-frequency = <73728000>;
51                 };
52
53                 uart2: serial@54006a00 {
54                         compatible = "socionext,uniphier-uart";
55                         status = "disabled";
56                         reg = <0x54006a00 0x20>;
57                         clock-frequency = <73728000>;
58                 };
59
60                 uart3: serial@54006b00 {
61                         compatible = "socionext,uniphier-uart";
62                         status = "disabled";
63                         reg = <0x54006b00 0x20>;
64                         clock-frequency = <73728000>;
65                 };
66
67                 i2c0: i2c@58780000 {
68                         compatible = "socionext,uniphier-fi2c";
69                         #address-cells = <1>;
70                         #size-cells = <0>;
71                         reg = <0x58780000 0x80>;
72                         clock-frequency = <100000>;
73                         status = "disabled";
74                 };
75
76                 i2c1: i2c@58781000 {
77                         compatible = "socionext,uniphier-fi2c";
78                         #address-cells = <1>;
79                         #size-cells = <0>;
80                         reg = <0x58781000 0x80>;
81                         clock-frequency = <100000>;
82                         status = "disabled";
83                 };
84
85                 i2c2: i2c@58782000 {
86                         compatible = "socionext,uniphier-fi2c";
87                         #address-cells = <1>;
88                         #size-cells = <0>;
89                         reg = <0x58782000 0x80>;
90                         clock-frequency = <100000>;
91                         status = "disabled";
92                 };
93
94                 i2c3: i2c@58783000 {
95                         compatible = "socionext,uniphier-fi2c";
96                         #address-cells = <1>;
97                         #size-cells = <0>;
98                         reg = <0x58783000 0x80>;
99                         clock-frequency = <100000>;
100                         status = "disabled";
101                 };
102
103                 /* i2c4 does not exist */
104
105                 i2c5: i2c@58785000 {
106                         compatible = "socionext,uniphier-fi2c";
107                         #address-cells = <1>;
108                         #size-cells = <0>;
109                         reg = <0x58785000 0x80>;
110                         clock-frequency = <400000>;
111                         status = "ok";
112                 };
113
114                 i2c6: i2c@58786000 {
115                         compatible = "socionext,uniphier-fi2c";
116                         #address-cells = <1>;
117                         #size-cells = <0>;
118                         reg = <0x58786000 0x80>;
119                         clock-frequency = <400000>;
120                         status = "ok";
121                 };
122
123                 usb2: usb@5a800100 {
124                         compatible = "socionext,uniphier-ehci", "generic-ehci";
125                         status = "disabled";
126                         reg = <0x5a800100 0x100>;
127                 };
128
129                 usb3: usb@5a810100 {
130                         compatible = "socionext,uniphier-ehci", "generic-ehci";
131                         status = "disabled";
132                         reg = <0x5a810100 0x100>;
133                 };
134
135                 usb0: usb@65a00000 {
136                         compatible = "socionext,uniphier-xhci", "generic-xhci";
137                         status = "disabled";
138                         reg = <0x65a00000 0x100>;
139                 };
140
141                 usb1: usb@65c00000 {
142                         compatible = "socionext,uniphier-xhci", "generic-xhci";
143                         status = "disabled";
144                         reg = <0x65c00000 0x100>;
145                 };
146
147                 nand: nand@68000000 {
148                         compatible = "denali,denali-nand-dt";
149                         reg = <0x68000000 0x20>, <0x68100000 0x1000>;
150                         reg-names = "nand_data", "denali_reg";
151                 };
152         };
153 };