arch/arm/dts/tegra210.dtsi

   1 #include <dt-bindings/clock/tegra210-car.h>
   2 #include <dt-bindings/gpio/tegra-gpio.h>
   3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
   6
   7 #include "skeleton.dtsi"
   8
   9 / {
  10         compatible = "nvidia,tegra210";
  11         interrupt-parent = <&gic>;
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         pcie-controller@0,01003000 {
  16                 compatible = "nvidia,tegra210-pcie";
  17                 device_type = "pci";
  18                 reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
  19                        0x0 0x01003800 0x0 0x00000800   /* AFI registers */
  20                        0x0 0x02000000 0x0 0x10000000>; /* configuration space */
  21                 reg-names = "pads", "afi", "cs";
  22                 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
  23                              <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
  24                 interrupt-names = "intr", "msi";
  25
  26                 #interrupt-cells = <1>;
  27                 interrupt-map-mask = <0 0 0 0>;
  28                 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
  29
  30                 bus-range = <0x00 0xff>;
  31                 #address-cells = <3>;
  32                 #size-cells = <2>;
  33
  34                 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000   /* port 0 configuration space */
  35                           0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000   /* port 1 configuration space */
  36                           0x81000000 0 0x0        0x0 0x12000000 0 0x00010000   /* downstream I/O (64 KiB) */
  37                           0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000   /* non-prefetchable memory (208 MiB) */
  38                           0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
  39
  40                 clocks = <&tegra_car TEGRA210_CLK_PCIE>,
  41                          <&tegra_car TEGRA210_CLK_AFI>,
  42                          <&tegra_car TEGRA210_CLK_PLL_E>,
  43                          <&tegra_car TEGRA210_CLK_CML0>;
  44                 clock-names = "pex", "afi", "pll_e", "cml";
  45                 resets = <&tegra_car 70>,
  46                          <&tegra_car 72>,
  47                          <&tegra_car 74>;
  48                 reset-names = "pex", "afi", "pcie_x";
  49                 status = "disabled";
  50
  51                 phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
  52                 phy-names = "pcie";
  53
  54                 pci@1,0 {
  55                         device_type = "pci";
  56                         assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
  57                         reg = <0x000800 0 0 0 0>;
  58                         status = "disabled";
  59
  60                         #address-cells = <3>;
  61                         #size-cells = <2>;
  62                         ranges;
  63
  64                         nvidia,num-lanes = <4>;
  65                 };
  66
  67                 pci@2,0 {
  68                         device_type = "pci";
  69                         assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
  70                         reg = <0x001000 0 0 0 0>;
  71                         status = "disabled";
  72
  73                         #address-cells = <3>;
  74                         #size-cells = <2>;
  75                         ranges;
  76
  77                         nvidia,num-lanes = <1>;
  78                 };
  79         };
  80
  81         gic: interrupt-controller@0,50041000 {
  82                 compatible = "arm,gic-400";
  83                 #interrupt-cells = <3>;
  84                 interrupt-controller;
  85                 reg = <0x0 0x50041000 0x0 0x1000>,
  86                       <0x0 0x50042000 0x0 0x2000>,
  87                       <0x0 0x50044000 0x0 0x2000>,
  88                       <0x0 0x50046000 0x0 0x2000>;
  89                 interrupts = <GIC_PPI 9
  90                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  91                 interrupt-parent = <&gic>;
  92         };
  93
  94         tegra_car: clock@0,60006000 {
  95                 compatible = "nvidia,tegra210-car";
  96                 reg = <0x0 0x60006000 0x0 0x1000>;
  97                 #clock-cells = <1>;
  98                 #reset-cells = <1>;
  99         };
 100
 101         gpio: gpio@0,6000d000 {
 102                 compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
 103                 reg = <0x0 0x6000d000 0x0 0x1000>;
 104                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
 105                              <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
 106                              <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
 107                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
 108                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 109                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 110                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
 111                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 112                 #gpio-cells = <2>;
 113                 gpio-controller;
 114                 #interrupt-cells = <2>;
 115                 interrupt-controller;
 116         };
 117
 118         i2c@0,7000c000 {
 119                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 120                 reg = <0x0 0x7000c000 0x0 0x100>;
 121                 interrupts = <0 38 0x04>;
 122                 #address-cells = <1>;
 123                 #size-cells = <0>;
 124                 clocks = <&tegra_car 12>;
 125                 status = "disabled";
 126         };
 127
 128         i2c@0,7000c400 {
 129                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 130                 reg = <0x0 0x7000c400 0x0 0x100>;
 131                 interrupts = <0 84 0x04>;
 132                 #address-cells = <1>;
 133                 #size-cells = <0>;
 134                 clocks = <&tegra_car 54>;
 135                 status = "disabled";
 136         };
 137
 138         i2c@0,7000c500 {
 139                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 140                 reg = <0x0 0x7000c500 0x0 0x100>;
 141                 interrupts = <0 92 0x04>;
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 clocks = <&tegra_car 67>;
 145                 status = "disabled";
 146         };
 147
 148         i2c@0,7000c700 {
 149                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 150                 reg = <0x0 0x7000c700 0x0 0x100>;
 151                 interrupts = <0 120 0x04>;
 152                 #address-cells = <1>;
 153                 #size-cells = <0>;
 154                 clocks = <&tegra_car 103>;
 155                 status = "disabled";
 156         };
 157
 158         i2c@0,7000d000 {
 159                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 160                 reg = <0x0 0x7000d000 0x0 0x100>;
 161                 interrupts = <0 53 0x04>;
 162                 #address-cells = <1>;
 163                 #size-cells = <0>;
 164                 clocks = <&tegra_car 47>;
 165                 status = "disabled";
 166         };
 167
 168         i2c@0,7000d100 {
 169                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 170                 reg = <0x0 0x7000d100 0x0 0x100>;
 171                 interrupts = <0 53 0x04>;
 172                 #address-cells = <1>;
 173                 #size-cells = <0>;
 174                 clocks = <&tegra_car 47>;
 175                 status = "disabled";
 176         };
 177
 178         uarta: serial@0,70006000 {
 179                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 180                 reg = <0x0 0x70006000 0x0 0x40>;
 181                 reg-shift = <2>;
 182                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 183                 clocks = <&tegra_car TEGRA210_CLK_UARTA>;
 184                 resets = <&tegra_car 6>;
 185                 reset-names = "serial";
 186                 status = "disabled";
 187         };
 188
 189         uartb: serial@0,70006040 {
 190                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 191                 reg = <0x0 0x70006040 0x0 0x40>;
 192                 reg-shift = <2>;
 193                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 194                 clocks = <&tegra_car TEGRA210_CLK_UARTB>;
 195                 resets = <&tegra_car 7>;
 196                 reset-names = "serial";
 197                 status = "disabled";
 198         };
 199
 200         uartc: serial@0,70006200 {
 201                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 202                 reg = <0x0 0x70006200 0x0 0x40>;
 203                 reg-shift = <2>;
 204                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 205                 clocks = <&tegra_car TEGRA210_CLK_UARTC>;
 206                 resets = <&tegra_car 55>;
 207                 reset-names = "serial";
 208                 status = "disabled";
 209         };
 210
 211         uartd: serial@0,70006300 {
 212                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 213                 reg = <0x0 0x70006300 0x0 0x40>;
 214                 reg-shift = <2>;
 215                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 216                 clocks = <&tegra_car TEGRA210_CLK_UARTD>;
 217                 resets = <&tegra_car 65>;
 218                 reset-names = "serial";
 219                 status = "disabled";
 220         };
 221
 222         spi@0,7000d400 {
 223                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 224                 reg = <0x0 0x7000d400 0x0 0x200>;
 225                 interrupts = <0 59 0x04>;
 226                 #address-cells = <1>;
 227                 #size-cells = <0>;
 228                 clocks = <&tegra_car TEGRA210_CLK_SBC1>;
 229                 resets = <&tegra_car 41>;
 230                 reset-names = "spi";
 231                 status = "disabled";
 232         };
 233
 234         spi@0,7000d600 {
 235                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 236                 reg = <0x0 0x7000d600 0x0 0x200>;
 237                 interrupts = <0 82 0x04>;
 238                 #address-cells = <1>;
 239                 #size-cells = <0>;
 240                 clocks = <&tegra_car TEGRA210_CLK_SBC2>;
 241                 resets = <&tegra_car 44>;
 242                 reset-names = "spi";
 243                 status = "disabled";
 244         };
 245
 246         spi@0,7000d800 {
 247                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 248                 reg = <0x0 0x7000d800 0x0 0x200>;
 249                 interrupts = <0 83 0x04>;
 250                 #address-cells = <1>;
 251                 #size-cells = <0>;
 252                 clocks = <&tegra_car TEGRA210_CLK_SBC3>;
 253                 resets = <&tegra_car 46>;
 254                 reset-names = "spi";
 255                 status = "disabled";
 256         };
 257
 258         spi@0,7000da00 {
 259                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 260                 reg = <0x0 0x7000da00 0x0 0x200>;
 261                 interrupts = <0 93 0x04>;
 262                 #address-cells = <1>;
 263                 #size-cells = <0>;
 264                 clocks = <&tegra_car TEGRA210_CLK_SBC4>;
 265                 resets = <&tegra_car 68>;
 266                 reset-names = "spi";
 267                 status = "disabled";
 268         };
 269
 270         spi@0,70410000 {
 271                 compatible = "nvidia,tegra210-qspi";
 272                 reg = <0x0 0x70410000 0x0 0x1000>;
 273                 interrupts = <0 10 0x04>;
 274                 #address-cells = <1>;
 275                 #size-cells = <0>;
 276                 clocks = <&tegra_car 211>;
 277                 status = "disabled";
 278         };
 279
 280         padctl: padctl@0,7009f000 {
 281                 compatible = "nvidia,tegra210-xusb-padctl";
 282                 reg = <0x0 0x7009f000 0x0 0x1000>;
 283                 resets = <&tegra_car 142>;
 284                 reset-names = "padctl";
 285                 #phy-cells = <1>;
 286         };
 287
 288         sdhci@0,700b0000 {
 289                 compatible = "nvidia,tegra210-sdhci";
 290                 reg = <0x0 0x700b0000 0x0 0x200>;
 291                 interrupts = <0 14 0x04>;
 292                 clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
 293                 resets = <&tegra_car 14>;
 294                 reset-names = "sdhci";
 295                 status = "disabled";
 296         };
 297
 298         sdhci@0,700b0200 {
 299                 compatible = "nvidia,tegra210-sdhci";
 300                 reg = <0x0 0x700b0200 0x0 0x200>;
 301                 interrupts = <0 15 0x04>;
 302                 clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
 303                 resets = <&tegra_car 9>;
 304                 reset-names = "sdhci";
 305                 status = "disabled";
 306         };
 307
 308         sdhci@0,700b0400 {
 309                 compatible = "nvidia,tegra210-sdhci";
 310                 reg = <0x0 0x700b0400 0x0 0x200>;
 311                 interrupts = <0 19 0x04>;
 312                 clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
 313                 resets = <&tegra_car 69>;
 314                 reset-names = "sdhci";
 315                 status = "disabled";
 316         };
 317
 318         sdhci@0,700b0600 {
 319                 compatible = "nvidia,tegra210-sdhci";
 320                 reg = <0x0 0x700b0600 0x0 0x200>;
 321                 interrupts = <0 31 0x04>;
 322                 clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
 323                 resets = <&tegra_car 15>;
 324                 reset-names = "sdhci";
 325                 status = "disabled";
 326         };
 327
 328         usb@0,7d000000 {
 329                 compatible = "nvidia,tegra210-ehci";
 330                 reg = <0x0 0x7d000000 0x0 0x4000>;
 331                 interrupts = <0 20 0x04>;
 332                 phy_type = "utmi";
 333                 clocks = <&tegra_car TEGRA210_CLK_USBD>;
 334                 resets = <&tegra_car 22>;
 335                 reset-names = "usb";
 336                 status = "disabled";
 337         };
 338
 339         usb@0,7d004000 {
 340                 compatible = "nvidia,tegra210-ehci";
 341                 reg = <0x0 0x7d004000 0x0 0x4000>;
 342                 interrupts = < 53 >;
 343                 phy_type = "utmi";
 344                 clocks = <&tegra_car TEGRA210_CLK_USB2>;
 345                 resets = <&tegra_car 58>;
 346                 reset-names = "usb";
 347                 status = "disabled";
 348         };
 349 };