arm64: zynqmp: Use only earlycon bootargs instead of full one
[oweals/u-boot.git] / arch / arm / dts / tegra20-ventana.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
5
6 / {
7         model = "NVIDIA Tegra20 Ventana evaluation board";
8         compatible = "nvidia,ventana", "nvidia,tegra20";
9
10         chosen {
11                 stdout-path = &uartd;
12         };
13
14         aliases {
15                 rtc0 = "/i2c@7000d000/tps6586x@34";
16                 rtc1 = "/rtc@7000e000";
17                 serial0 = &uartd;
18                 usb0 = "/usb@c5000000";
19                 usb1 = "/usb@c5004000";
20                 usb2 = "/usb@c5008000";
21                 mmc0 = "/sdhci@c8000600";
22                 mmc1 = "/sdhci@c8000400";
23         };
24
25         memory {
26                 reg = <0x00000000 0x40000000>;
27         };
28
29         host1x@50000000 {
30                 status = "okay";
31                 dc@54200000 {
32                         status = "okay";
33                         rgb {
34                                 status = "okay";
35
36                                 nvidia,panel = <&panel>;
37
38                                 display-timings {
39                                         timing@0 {
40                                                 /* Seaboard has 1366x768 */
41                                                 clock-frequency = <70600000>;
42                                                 hactive = <1366>;
43                                                 vactive = <768>;
44                                                 hback-porch = <58>;
45                                                 hfront-porch = <58>;
46                                                 hsync-len = <58>;
47                                                 vback-porch = <4>;
48                                                 vfront-porch = <4>;
49                                                 vsync-len = <4>;
50                                                 hsync-active = <1>;
51                                         };
52                                 };
53                         };
54                 };
55
56                 hdmi@54280000 {
57                         status = "okay";
58
59                         vdd-supply = <&hdmi_vdd_reg>;
60                         pll-supply = <&hdmi_pll_reg>;
61
62                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
63                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
64                                 GPIO_ACTIVE_HIGH>;
65                 };
66         };
67
68         pinmux@70000014 {
69                 pinctrl-names = "default";
70                 pinctrl-0 = <&state_default>;
71
72                 state_default: pinmux {
73                         ata {
74                                 nvidia,pins = "ata";
75                                 nvidia,function = "ide";
76                         };
77                         atb {
78                                 nvidia,pins = "atb", "gma", "gme";
79                                 nvidia,function = "sdio4";
80                         };
81                         atc {
82                                 nvidia,pins = "atc";
83                                 nvidia,function = "nand";
84                         };
85                         atd {
86                                 nvidia,pins = "atd", "ate", "gmb", "spia",
87                                         "spib", "spic";
88                                 nvidia,function = "gmi";
89                         };
90                         cdev1 {
91                                 nvidia,pins = "cdev1";
92                                 nvidia,function = "plla_out";
93                         };
94                         cdev2 {
95                                 nvidia,pins = "cdev2";
96                                 nvidia,function = "pllp_out4";
97                         };
98                         crtp {
99                                 nvidia,pins = "crtp", "lm1";
100                                 nvidia,function = "crt";
101                         };
102                         csus {
103                                 nvidia,pins = "csus";
104                                 nvidia,function = "vi_sensor_clk";
105                         };
106                         dap1 {
107                                 nvidia,pins = "dap1";
108                                 nvidia,function = "dap1";
109                         };
110                         dap2 {
111                                 nvidia,pins = "dap2";
112                                 nvidia,function = "dap2";
113                         };
114                         dap3 {
115                                 nvidia,pins = "dap3";
116                                 nvidia,function = "dap3";
117                         };
118                         dap4 {
119                                 nvidia,pins = "dap4";
120                                 nvidia,function = "dap4";
121                         };
122                         dta {
123                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
124                                 nvidia,function = "vi";
125                         };
126                         dtf {
127                                 nvidia,pins = "dtf";
128                                 nvidia,function = "i2c3";
129                         };
130                         gmc {
131                                 nvidia,pins = "gmc";
132                                 nvidia,function = "uartd";
133                         };
134                         gmd {
135                                 nvidia,pins = "gmd";
136                                 nvidia,function = "sflash";
137                         };
138                         gpu {
139                                 nvidia,pins = "gpu";
140                                 nvidia,function = "pwm";
141                         };
142                         gpu7 {
143                                 nvidia,pins = "gpu7";
144                                 nvidia,function = "rtck";
145                         };
146                         gpv {
147                                 nvidia,pins = "gpv", "slxa", "slxk";
148                                 nvidia,function = "pcie";
149                         };
150                         hdint {
151                                 nvidia,pins = "hdint";
152                                 nvidia,function = "hdmi";
153                         };
154                         i2cp {
155                                 nvidia,pins = "i2cp";
156                                 nvidia,function = "i2cp";
157                         };
158                         irrx {
159                                 nvidia,pins = "irrx", "irtx";
160                                 nvidia,function = "uartb";
161                         };
162                         kbca {
163                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
164                                         "kbce", "kbcf";
165                                 nvidia,function = "kbc";
166                         };
167                         lcsn {
168                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
169                                         "lsdi", "lvp0";
170                                 nvidia,function = "rsvd4";
171                         };
172                         ld0 {
173                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
174                                         "ld5", "ld6", "ld7", "ld8", "ld9",
175                                         "ld10", "ld11", "ld12", "ld13", "ld14",
176                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
177                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
178                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
179                                         "lspi", "lvp1", "lvs";
180                                 nvidia,function = "displaya";
181                         };
182                         owc {
183                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
184                                 nvidia,function = "rsvd2";
185                         };
186                         pmc {
187                                 nvidia,pins = "pmc";
188                                 nvidia,function = "pwr_on";
189                         };
190                         rm {
191                                 nvidia,pins = "rm";
192                                 nvidia,function = "i2c1";
193                         };
194                         sdb {
195                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
196                                 nvidia,function = "sdio3";
197                         };
198                         sdio1 {
199                                 nvidia,pins = "sdio1";
200                                 nvidia,function = "sdio1";
201                         };
202                         slxd {
203                                 nvidia,pins = "slxd";
204                                 nvidia,function = "spdif";
205                         };
206                         spid {
207                                 nvidia,pins = "spid", "spie", "spif";
208                                 nvidia,function = "spi1";
209                         };
210                         spig {
211                                 nvidia,pins = "spig", "spih";
212                                 nvidia,function = "spi2_alt";
213                         };
214                         uaa {
215                                 nvidia,pins = "uaa", "uab", "uda";
216                                 nvidia,function = "ulpi";
217                         };
218                         uad {
219                                 nvidia,pins = "uad";
220                                 nvidia,function = "irda";
221                         };
222                         uca {
223                                 nvidia,pins = "uca", "ucb";
224                                 nvidia,function = "uartc";
225                         };
226                         conf_ata {
227                                 nvidia,pins = "ata", "atb", "atc", "atd",
228                                         "cdev1", "cdev2", "dap1", "dap2",
229                                         "dap4", "ddc", "dtf", "gma", "gmc",
230                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
231                                         "irtx", "pta", "rm", "sdc", "sdd",
232                                         "slxc", "slxd", "slxk", "spdi", "spdo",
233                                         "uac", "uad", "uca", "ucb", "uda";
234                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
236                         };
237                         conf_ate {
238                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
239                                         "gpv", "owc", "spia", "spib", "spic",
240                                         "spid", "spie", "spig";
241                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
242                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
243                         };
244                         conf_ck32 {
245                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
246                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
247                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248                         };
249                         conf_crtp {
250                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
251                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
252                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
253                         };
254                         conf_dta {
255                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
256                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
257                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
258                         };
259                         conf_dte {
260                                 nvidia,pins = "dte", "spif";
261                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
262                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
263                         };
264                         conf_hdint {
265                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
266                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
267                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
268                         };
269                         conf_kbca {
270                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
271                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
272                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
273                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
274                         };
275                         conf_lc {
276                                 nvidia,pins = "lc", "ls";
277                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
278                         };
279                         conf_ld0 {
280                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
281                                         "ld5", "ld6", "ld7", "ld8", "ld9",
282                                         "ld10", "ld11", "ld12", "ld13", "ld14",
283                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
284                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
285                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
286                                         "lvp1", "lvs", "pmc", "sdb";
287                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
288                         };
289                         conf_ld17_0 {
290                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
291                                         "ld23_22";
292                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
293                         };
294                         drive_sdio1 {
295                                 nvidia,pins = "drive_sdio1";
296                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
297                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
298                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
299                                 nvidia,pull-down-strength = <31>;
300                                 nvidia,pull-up-strength = <31>;
301                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
302                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
303                         };
304                 };
305
306                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
307                         ddc {
308                                 nvidia,pins = "ddc";
309                                 nvidia,function = "i2c2";
310                         };
311                         pta {
312                                 nvidia,pins = "pta";
313                                 nvidia,function = "rsvd4";
314                         };
315                 };
316
317                 state_i2cmux_pta: pinmux_i2cmux_pta {
318                         ddc {
319                                 nvidia,pins = "ddc";
320                                 nvidia,function = "rsvd4";
321                         };
322                         pta {
323                                 nvidia,pins = "pta";
324                                 nvidia,function = "i2c2";
325                         };
326                 };
327
328                 state_i2cmux_idle: pinmux_i2cmux_idle {
329                         ddc {
330                                 nvidia,pins = "ddc";
331                                 nvidia,function = "rsvd4";
332                         };
333                         pta {
334                                 nvidia,pins = "pta";
335                                 nvidia,function = "rsvd4";
336                         };
337                 };
338         };
339
340         i2s@70002800 {
341                 status = "okay";
342         };
343
344         serial@70006300 {
345                 status = "okay";
346                 clock-frequency = < 216000000 >;        };
347
348         pwm: pwm@7000a000 {
349                 status = "okay";
350         };
351
352         i2c@7000c000 {
353                 status = "okay";
354                 clock-frequency = <400000>;
355
356                 wm8903: wm8903@1a {
357                         compatible = "wlf,wm8903";
358                         reg = <0x1a>;
359                         interrupt-parent = <&gpio>;
360                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
361
362                         gpio-controller;
363                         #gpio-cells = <2>;
364
365                         micdet-cfg = <0>;
366                         micdet-delay = <100>;
367                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
368                 };
369
370                 /* ALS and proximity sensor */
371                 isl29018@44 {
372                         compatible = "isil,isl29018";
373                         reg = <0x44>;
374                         interrupt-parent = <&gpio>;
375                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
376                 };
377         };
378
379         i2c@7000c400 {
380                 status = "okay";
381                 clock-frequency = <100000>;
382         };
383
384         i2cmux {
385                 compatible = "i2c-mux-pinctrl";
386                 #address-cells = <1>;
387                 #size-cells = <0>;
388
389                 i2c-parent = <&{/i2c@7000c400}>;
390
391                 pinctrl-names = "ddc", "pta", "idle";
392                 pinctrl-0 = <&state_i2cmux_ddc>;
393                 pinctrl-1 = <&state_i2cmux_pta>;
394                 pinctrl-2 = <&state_i2cmux_idle>;
395
396                 hdmi_ddc: i2c@0 {
397                         reg = <0>;
398                         #address-cells = <1>;
399                         #size-cells = <0>;
400                 };
401
402                 lvds_ddc: i2c@1 {
403                         reg = <1>;
404                         #address-cells = <1>;
405                         #size-cells = <0>;
406                 };
407         };
408
409         i2c@7000c500 {
410                 status = "okay";
411                 clock-frequency = <400000>;
412         };
413
414         i2c@7000d000 {
415                 status = "okay";
416                 clock-frequency = <400000>;
417
418                 pmic: tps6586x@34 {
419                         compatible = "ti,tps6586x";
420                         reg = <0x34>;
421                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
422
423                         ti,system-power-controller;
424
425                         #gpio-cells = <2>;
426                         gpio-controller;
427
428                         sys-supply = <&vdd_5v0_reg>;
429                         vin-sm0-supply = <&sys_reg>;
430                         vin-sm1-supply = <&sys_reg>;
431                         vin-sm2-supply = <&sys_reg>;
432                         vinldo01-supply = <&sm2_reg>;
433                         vinldo23-supply = <&sm2_reg>;
434                         vinldo4-supply = <&sm2_reg>;
435                         vinldo678-supply = <&sm2_reg>;
436                         vinldo9-supply = <&sm2_reg>;
437
438                         regulators {
439                                 sys_reg: sys {
440                                         regulator-name = "vdd_sys";
441                                         regulator-always-on;
442                                 };
443
444                                 sm0 {
445                                         regulator-name = "vdd_sm0,vdd_core";
446                                         regulator-min-microvolt = <1200000>;
447                                         regulator-max-microvolt = <1200000>;
448                                         regulator-always-on;
449                                 };
450
451                                 sm1 {
452                                         regulator-name = "vdd_sm1,vdd_cpu";
453                                         regulator-min-microvolt = <1000000>;
454                                         regulator-max-microvolt = <1000000>;
455                                         regulator-always-on;
456                                 };
457
458                                 sm2_reg: sm2 {
459                                         regulator-name = "vdd_sm2,vin_ldo*";
460                                         regulator-min-microvolt = <3700000>;
461                                         regulator-max-microvolt = <3700000>;
462                                         regulator-always-on;
463                                 };
464
465                                 /* LDO0 is not connected to anything */
466
467                                 ldo1 {
468                                         regulator-name = "vdd_ldo1,avdd_pll*";
469                                         regulator-min-microvolt = <1100000>;
470                                         regulator-max-microvolt = <1100000>;
471                                         regulator-always-on;
472                                 };
473
474                                 ldo2 {
475                                         regulator-name = "vdd_ldo2,vdd_rtc";
476                                         regulator-min-microvolt = <1200000>;
477                                         regulator-max-microvolt = <1200000>;
478                                 };
479
480                                 ldo3 {
481                                         regulator-name = "vdd_ldo3,avdd_usb*";
482                                         regulator-min-microvolt = <3300000>;
483                                         regulator-max-microvolt = <3300000>;
484                                         regulator-always-on;
485                                 };
486
487                                 ldo4 {
488                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
489                                         regulator-min-microvolt = <1800000>;
490                                         regulator-max-microvolt = <1800000>;
491                                         regulator-always-on;
492                                 };
493
494                                 ldo5 {
495                                         regulator-name = "vdd_ldo5,vcore_mmc";
496                                         regulator-min-microvolt = <2850000>;
497                                         regulator-max-microvolt = <2850000>;
498                                         regulator-always-on;
499                                 };
500
501                                 ldo6 {
502                                         regulator-name = "vdd_ldo6,avdd_vdac";
503                                         regulator-min-microvolt = <1800000>;
504                                         regulator-max-microvolt = <1800000>;
505                                 };
506
507                                 hdmi_vdd_reg: ldo7 {
508                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
509                                         regulator-min-microvolt = <3300000>;
510                                         regulator-max-microvolt = <3300000>;
511                                 };
512
513                                 hdmi_pll_reg: ldo8 {
514                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
515                                         regulator-min-microvolt = <1800000>;
516                                         regulator-max-microvolt = <1800000>;
517                                 };
518
519                                 ldo9 {
520                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
521                                         regulator-min-microvolt = <2850000>;
522                                         regulator-max-microvolt = <2850000>;
523                                         regulator-always-on;
524                                 };
525
526                                 ldo_rtc {
527                                         regulator-name = "vdd_rtc_out,vdd_cell";
528                                         regulator-min-microvolt = <3300000>;
529                                         regulator-max-microvolt = <3300000>;
530                                         regulator-always-on;
531                                 };
532                         };
533                 };
534
535                 temperature-sensor@4c {
536                         compatible = "onnn,nct1008";
537                         reg = <0x4c>;
538                 };
539         };
540
541         pmc@7000e400 {
542                 nvidia,invert-interrupt;
543                 nvidia,suspend-mode = <1>;
544                 nvidia,cpu-pwr-good-time = <2000>;
545                 nvidia,cpu-pwr-off-time = <100>;
546                 nvidia,core-pwr-good-time = <3845 3845>;
547                 nvidia,core-pwr-off-time = <458>;
548                 nvidia,sys-clock-req-active-high;
549         };
550
551         usb@c5000000 {
552                 status = "okay";
553         };
554
555         usb-phy@c5000000 {
556                 status = "okay";
557         };
558
559         usb@c5004000 {
560                 status = "okay";
561                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
562                         GPIO_ACTIVE_LOW>;
563         };
564
565         usb-phy@c5004000 {
566                 status = "okay";
567                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
568                         GPIO_ACTIVE_LOW>;
569         };
570
571         usb@c5008000 {
572                 status = "okay";
573         };
574
575         usb-phy@c5008000 {
576                 status = "okay";
577         };
578
579         sdhci@c8000000 {
580                 status = "okay";
581                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
582                 bus-width = <4>;
583                 keep-power-in-suspend;
584         };
585
586         sdhci@c8000400 {
587                 status = "okay";
588                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
589                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
590                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
591                 bus-width = <4>;
592         };
593
594         sdhci@c8000600 {
595                 status = "okay";
596                 bus-width = <8>;
597                 non-removable;
598         };
599
600         backlight: backlight {
601                 compatible = "pwm-backlight";
602
603                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
604                 power-supply = <&vdd_bl_reg>;
605                 pwms = <&pwm 2 5000000>;
606
607                 brightness-levels = <0 4 8 16 32 64 128 255>;
608                 default-brightness-level = <6>;
609         };
610
611         clocks {
612                 compatible = "simple-bus";
613                 #address-cells = <1>;
614                 #size-cells = <0>;
615
616                 clk32k_in: clock@0 {
617                         compatible = "fixed-clock";
618                         reg=<0>;
619                         #clock-cells = <0>;
620                         clock-frequency = <32768>;
621                 };
622         };
623
624         gpio-keys {
625                 compatible = "gpio-keys";
626
627                 power {
628                         label = "Power";
629                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
630                         linux,code = <KEY_POWER>;
631                         gpio-key,wakeup;
632                 };
633         };
634
635         panel: panel {
636                 compatible = "chunghwa,claa101wa01a", "simple-panel";
637
638                 power-supply = <&vdd_pnl_reg>;
639                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
640
641                 backlight = <&backlight>;
642                 ddc-i2c-bus = <&lvds_ddc>;
643         };
644
645         regulators {
646                 compatible = "simple-bus";
647                 #address-cells = <1>;
648                 #size-cells = <0>;
649
650                 vdd_5v0_reg: regulator@0 {
651                         compatible = "regulator-fixed";
652                         reg = <0>;
653                         regulator-name = "vdd_5v0";
654                         regulator-min-microvolt = <5000000>;
655                         regulator-max-microvolt = <5000000>;
656                         regulator-always-on;
657                 };
658
659                 regulator@1 {
660                         compatible = "regulator-fixed";
661                         reg = <1>;
662                         regulator-name = "vdd_1v5";
663                         regulator-min-microvolt = <1500000>;
664                         regulator-max-microvolt = <1500000>;
665                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
666                 };
667
668                 regulator@2 {
669                         compatible = "regulator-fixed";
670                         reg = <2>;
671                         regulator-name = "vdd_1v2";
672                         regulator-min-microvolt = <1200000>;
673                         regulator-max-microvolt = <1200000>;
674                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
675                         enable-active-high;
676                 };
677
678                 vdd_pnl_reg: regulator@3 {
679                         compatible = "regulator-fixed";
680                         reg = <3>;
681                         regulator-name = "vdd_pnl";
682                         regulator-min-microvolt = <2800000>;
683                         regulator-max-microvolt = <2800000>;
684                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
685                         enable-active-high;
686                 };
687
688                 vdd_bl_reg: regulator@4 {
689                         compatible = "regulator-fixed";
690                         reg = <4>;
691                         regulator-name = "vdd_bl";
692                         regulator-min-microvolt = <2800000>;
693                         regulator-max-microvolt = <2800000>;
694                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
695                         enable-active-high;
696                 };
697         };
698
699         sound {
700                 compatible = "nvidia,tegra-audio-wm8903-ventana",
701                              "nvidia,tegra-audio-wm8903";
702                 nvidia,model = "NVIDIA Tegra Ventana";
703
704                 nvidia,audio-routing =
705                         "Headphone Jack", "HPOUTR",
706                         "Headphone Jack", "HPOUTL",
707                         "Int Spk", "ROP",
708                         "Int Spk", "RON",
709                         "Int Spk", "LOP",
710                         "Int Spk", "LON",
711                         "Mic Jack", "MICBIAS",
712                         "IN1L", "Mic Jack";
713
714                 nvidia,i2s-controller = <&tegra_i2s1>;
715                 nvidia,audio-codec = <&wm8903>;
716
717                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
718                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
719                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
720                         GPIO_ACTIVE_HIGH>;
721                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
722                         GPIO_ACTIVE_HIGH>;
723
724                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
725                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
726                          <&tegra_car TEGRA20_CLK_CDEV1>;
727                 clock-names = "pll_a", "pll_a_out0", "mclk";
728         };
729 };