3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
7 model = "Toshiba AC100 / Dynabook AZ";
8 compatible = "compal,paz00", "nvidia,tegra20";
15 rtc0 = "/i2c@7000d000/tps6586x@34";
16 rtc1 = "/rtc@7000e000";
19 usb0 = "/usb@c5000000";
20 usb1 = "/usb@c5004000";
21 usb2 = "/usb@c5008000";
22 mmc0 = "/sdhci@c8000600";
23 mmc1 = "/sdhci@c8000000";
27 reg = <0x00000000 0x20000000>;
37 nvidia,panel = <&panel>;
41 /* PAZ00 has 1024x600 */
42 clock-frequency = <54030000>;
60 vdd-supply = <&hdmi_vdd_reg>;
61 pll-supply = <&hdmi_pll_reg>;
63 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
64 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
70 pinctrl-names = "default";
71 pinctrl-0 = <&state_default>;
73 state_default: pinmux {
75 nvidia,pins = "ata", "atc", "atd", "ate",
76 "dap2", "gmb", "gmc", "gmd", "spia",
77 "spib", "spic", "spid", "spie";
78 nvidia,function = "gmi";
81 nvidia,pins = "atb", "gma", "gme";
82 nvidia,function = "sdio4";
85 nvidia,pins = "cdev1";
86 nvidia,function = "plla_out";
89 nvidia,pins = "cdev2";
90 nvidia,function = "pllp_out4";
94 nvidia,function = "crt";
98 nvidia,function = "pllc_out1";
101 nvidia,pins = "dap1";
102 nvidia,function = "dap1";
105 nvidia,pins = "dap3";
106 nvidia,function = "dap3";
109 nvidia,pins = "dap4";
110 nvidia,function = "dap4";
114 nvidia,function = "i2c2";
117 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
118 nvidia,function = "rsvd1";
122 nvidia,function = "i2c3";
125 nvidia,pins = "gpu", "sdb", "sdd";
126 nvidia,function = "pwm";
129 nvidia,pins = "gpu7";
130 nvidia,function = "rtck";
133 nvidia,pins = "gpv", "slxa", "slxk";
134 nvidia,function = "pcie";
137 nvidia,pins = "hdint", "pta";
138 nvidia,function = "hdmi";
141 nvidia,pins = "i2cp";
142 nvidia,function = "i2cp";
145 nvidia,pins = "irrx", "irtx";
146 nvidia,function = "uarta";
149 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
150 nvidia,function = "kbc";
153 nvidia,pins = "kbcb", "kbcd";
154 nvidia,function = "sdio2";
157 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
158 "ld3", "ld4", "ld5", "ld6", "ld7",
159 "ld8", "ld9", "ld10", "ld11", "ld12",
160 "ld13", "ld14", "ld15", "ld16", "ld17",
161 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
162 "lhs", "lm0", "lm1", "lpp", "lpw0",
163 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
164 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
166 nvidia,function = "displaya";
170 nvidia,function = "owr";
174 nvidia,function = "pwr_on";
178 nvidia,function = "i2c1";
182 nvidia,function = "twc";
185 nvidia,pins = "sdio1";
186 nvidia,function = "sdio1";
189 nvidia,pins = "slxc", "slxd";
190 nvidia,function = "spi4";
193 nvidia,pins = "spdi", "spdo";
194 nvidia,function = "rsvd2";
197 nvidia,pins = "spif", "uac";
198 nvidia,function = "rsvd4";
201 nvidia,pins = "spig", "spih";
202 nvidia,function = "spi2_alt";
205 nvidia,pins = "uaa", "uab", "uda";
206 nvidia,function = "ulpi";
210 nvidia,function = "spdif";
213 nvidia,pins = "uca", "ucb";
214 nvidia,function = "uartc";
217 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
218 "cdev1", "cdev2", "dap1", "dap2", "dtf",
219 "gma", "gmb", "gmc", "gmd", "gme",
220 "gpu", "gpu7", "gpv", "i2cp", "pta",
221 "rm", "sdio1", "slxk", "spdo", "uac",
223 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224 nvidia,tristate = <TEGRA_PIN_DISABLE>;
227 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
228 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
229 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
232 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
233 "dtc", "dte", "slxa", "slxc", "slxd",
235 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
236 nvidia,tristate = <TEGRA_PIN_ENABLE>;
239 nvidia,pins = "csus", "spia", "spib", "spid",
241 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
242 nvidia,tristate = <TEGRA_PIN_ENABLE>;
245 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
246 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
247 "spic", "spig", "uaa", "uab";
248 nvidia,pull = <TEGRA_PIN_PULL_UP>;
249 nvidia,tristate = <TEGRA_PIN_DISABLE>;
252 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
253 "spie", "spih", "uad", "uca", "ucb";
254 nvidia,pull = <TEGRA_PIN_PULL_UP>;
255 nvidia,tristate = <TEGRA_PIN_ENABLE>;
258 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
259 "ld3", "ld4", "ld5", "ld6", "ld7",
260 "ld8", "ld9", "ld10", "ld11", "ld12",
261 "ld13", "ld14", "ld15", "ld16", "ld17",
262 "ldc", "ldi", "lhs", "lsc0", "lspi",
264 nvidia,tristate = <TEGRA_PIN_DISABLE>;
267 nvidia,pins = "lc", "ls";
268 nvidia,pull = <TEGRA_PIN_PULL_UP>;
271 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
272 "lm0", "lm1", "lpp", "lpw0", "lpw1",
273 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
274 "lvp0", "lvp1", "sdb";
275 nvidia,tristate = <TEGRA_PIN_ENABLE>;
278 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
280 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
301 lvds_ddc: i2c@7000c000 {
303 clock-frequency = <400000>;
305 alc5632: alc5632@1e {
306 compatible = "realtek,alc5632";
313 hdmi_ddc: i2c@7000c400 {
315 clock-frequency = <100000>;
319 compatible = "nvidia,nvec";
320 reg = <0x7000c500 0x100>;
321 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
322 #address-cells = <1>;
324 clock-frequency = <80000>;
325 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
327 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
328 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
329 clock-names = "div-clk", "fast-clk";
330 resets = <&tegra_car 67>;
336 clock-frequency = <400000>;
339 compatible = "ti,tps6586x";
341 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
346 sys-supply = <&p5valw_reg>;
347 vin-sm0-supply = <&sys_reg>;
348 vin-sm1-supply = <&sys_reg>;
349 vin-sm2-supply = <&sys_reg>;
350 vinldo01-supply = <&sm2_reg>;
351 vinldo23-supply = <&sm2_reg>;
352 vinldo4-supply = <&sm2_reg>;
353 vinldo678-supply = <&sm2_reg>;
354 vinldo9-supply = <&sm2_reg>;
358 regulator-name = "vdd_sys";
363 regulator-name = "+1.2vs_sm0,vdd_core";
364 regulator-min-microvolt = <1200000>;
365 regulator-max-microvolt = <1200000>;
370 regulator-name = "+1.0vs_sm1,vdd_cpu";
371 regulator-min-microvolt = <1000000>;
372 regulator-max-microvolt = <1000000>;
377 regulator-name = "+3.7vs_sm2,vin_ldo*";
378 regulator-min-microvolt = <3700000>;
379 regulator-max-microvolt = <3700000>;
383 /* LDO0 is not connected to anything */
386 regulator-name = "+1.1vs_ldo1,avdd_pll*";
387 regulator-min-microvolt = <1100000>;
388 regulator-max-microvolt = <1100000>;
393 regulator-name = "+1.2vs_ldo2,vdd_rtc";
394 regulator-min-microvolt = <1200000>;
395 regulator-max-microvolt = <1200000>;
399 regulator-name = "+3.3vs_ldo3,avdd_usb*";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
406 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
413 regulator-name = "+2.85vs_ldo5,vcore_mmc";
414 regulator-min-microvolt = <2850000>;
415 regulator-max-microvolt = <2850000>;
421 * Research indicates this should be
422 * 1.8v; other boards that use this
423 * rail for the same purpose need it
424 * set to 1.8v. The schematic signal
425 * name is incorrect; perhaps copied
426 * from an incorrect NVIDIA reference.
428 regulator-name = "+2.85vs_ldo6,avdd_vdac";
429 regulator-min-microvolt = <1800000>;
430 regulator-max-microvolt = <1800000>;
434 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
435 regulator-min-microvolt = <3300000>;
436 regulator-max-microvolt = <3300000>;
440 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
441 regulator-min-microvolt = <1800000>;
442 regulator-max-microvolt = <1800000>;
446 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
447 regulator-min-microvolt = <2850000>;
448 regulator-max-microvolt = <2850000>;
453 regulator-name = "+3.3vs_rtc";
454 regulator-min-microvolt = <3300000>;
455 regulator-max-microvolt = <3300000>;
462 compatible = "adi,adt7461";
468 nvidia,invert-interrupt;
469 nvidia,suspend-mode = <1>;
470 nvidia,cpu-pwr-good-time = <2000>;
471 nvidia,cpu-pwr-off-time = <0>;
472 nvidia,core-pwr-good-time = <3845 3845>;
473 nvidia,core-pwr-off-time = <0>;
474 nvidia,sys-clock-req-active-high;
487 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
493 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
507 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
508 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
509 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
519 backlight: backlight {
520 compatible = "pwm-backlight";
522 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
523 power-supply = <&vdd_bl_reg>;
524 pwms = <&pwm 0 5000000>;
526 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
527 default-brightness-level = <10>;
533 compatible = "simple-bus";
534 #address-cells = <1>;
538 compatible = "fixed-clock";
541 clock-frequency = <32768>;
546 compatible = "gpio-keys";
550 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
551 linux,code = <KEY_POWER>;
557 compatible = "gpio-leds";
561 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
562 linux,default-trigger = "rfkill0";
567 compatible = "samsung,ltn101nt05", "simple-panel";
569 ddc-i2c-bus = <&lvds_ddc>;
570 power-supply = <&vdd_pnl_reg>;
571 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
573 backlight = <&backlight>;
577 compatible = "simple-bus";
578 #address-cells = <1>;
581 p5valw_reg: regulator@0 {
582 compatible = "regulator-fixed";
584 regulator-name = "+5valw";
585 regulator-min-microvolt = <5000000>;
586 regulator-max-microvolt = <5000000>;
590 vdd_pnl_reg: regulator@1 {
591 compatible = "regulator-fixed";
593 regulator-name = "+3VS,vdd_pnl";
594 regulator-min-microvolt = <3300000>;
595 regulator-max-microvolt = <3300000>;
596 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
600 vdd_bl_reg: regulator@2 {
601 compatible = "regulator-fixed";
603 regulator-name = "vdd_bl";
604 regulator-min-microvolt = <2800000>;
605 regulator-max-microvolt = <2800000>;
606 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
612 compatible = "nvidia,tegra-audio-alc5632-paz00",
613 "nvidia,tegra-audio-alc5632";
615 nvidia,model = "Compal PAZ00";
617 nvidia,audio-routing =
619 "Int Spk", "SPKOUTN",
620 "Headset Mic", "MICBIAS1",
621 "MIC1", "Headset Mic",
622 "Headset Stereophone", "HPR",
623 "Headset Stereophone", "HPL",
624 "DMICDAT", "Digital Mic";
626 nvidia,audio-codec = <&alc5632>;
627 nvidia,i2s-controller = <&tegra_i2s1>;
628 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
631 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
632 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
633 <&tegra_car TEGRA20_CLK_CDEV1>;
634 clock-names = "pll_a", "pll_a_out0", "mclk";