1 #include "skeleton.dtsi"
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/mailbox/tegra-hsp.h>
7 compatible = "nvidia,tegra186";
12 compatible = "nvidia,tegra186-gpio";
13 reg-names = "security", "gpio";
15 <0x0 0x2200000 0x0 0x10000>,
16 <0x0 0x2210000 0x0 0x10000>;
18 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
19 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
20 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
21 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
22 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
23 <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
27 #interrupt-cells = <2>;
30 uarta: serial@3100000 {
31 compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
32 reg = <0x0 0x03100000 0x0 0x10000>;
38 compatible = "nvidia,tegra186-sdhci";
39 reg = <0x0 0x03460000 0x0 0x200>;
40 interrupts = <GIC_SPI 31 0x04>;
45 compatible = "nvidia,tegra186-hsp";
46 reg = <0x0 0x03c00000 0x0 0xa0000>;
47 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
48 nvidia,num-SM = <0x8>;
49 nvidia,num-AS = <0x2>;
50 nvidia,num-SS = <0x2>;
51 nvidia,num-DB = <0x7>;
52 nvidia,num-SI = <0x8>;
57 compatible = "nvidia,tegra186-gpio-aon";
58 reg-names = "security", "gpio";
60 <0x0 0xc2f0000 0x0 0x1000>,
61 <0x0 0xc2f1000 0x0 0x1000>;
63 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
67 #interrupt-cells = <2>;