arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2019 Marek Vasut <marex@denx.de>
   4  */
   5
   6 #include "stm32mp15xx-dhcom.dtsi"
   7
   8 / {
   9         model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)";
  10         compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
  11
  12         aliases {
  13                 serial0 = &uart4;
  14                 ethernet0 = &ethernet0;
  15         };
  16
  17         chosen {
  18                 stdout-path = "serial0:115200n8";
  19         };
  20
  21         ethernet_vio: vioregulator {
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "vio";
  24                 regulator-min-microvolt = <3300000>;
  25                 regulator-max-microvolt = <3300000>;
  26                 gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
  27                 regulator-always-on;
  28                 regulator-boot-on;
  29         };
  30 };
  31
  32 &ethernet0 {
  33         status = "okay";
  34         pinctrl-0 = <&ethernet0_rmii_pins_a>;
  35         pinctrl-1 = <&ethernet0_rmii_pins_sleep_a>;
  36         pinctrl-names = "default", "sleep";
  37         phy-mode = "rmii";
  38         max-speed = <100>;
  39         phy-handle = <&phy0>;
  40         st,eth_ref_clk_sel;
  41         phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
  42
  43         mdio0 {
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46                 compatible = "snps,dwmac-mdio";
  47
  48                 phy0: ethernet-phy@1 {
  49                         reg = <1>;
  50                 };
  51         };
  52 };
  53
  54 &pinctrl {
  55         ethernet0_rmii_pins_a: rmii-0 {
  56                 pins1 {
  57                         pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
  58                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
  59                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
  60                                  <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
  61                                  <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
  62                                  <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
  63                         bias-disable;
  64                         drive-push-pull;
  65                         slew-rate = <2>;
  66                 };
  67                 pins2 {
  68                         pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
  69                                  <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
  70                                  <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
  71                         bias-disable;
  72                 };
  73         };
  74
  75         ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
  76                 pins1 {
  77                         pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
  78                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
  79                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
  80                                  <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
  81                                  <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
  82                                  <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
  83                                  <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
  84                                  <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
  85                                  <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
  86                 };
  87         };
  88 };