arch/arm/dts/stm32mp15-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 &pinctrl {
   9         adc1_in6_pins_a: adc1-in6 {
  10                 pins {
  11                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
  12                 };
  13         };
  14
  15         adc12_ain_pins_a: adc12-ain-0 {
  16                 pins {
  17                         pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
  18                                  <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  19                                  <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
  20                                  <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
  21                 };
  22         };
  23
  24         adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
  25                 pins {
  26                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
  27                                  <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
  28                 };
  29         };
  30
  31         cec_pins_a: cec-0 {
  32                 pins {
  33                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
  34                         bias-disable;
  35                         drive-open-drain;
  36                         slew-rate = <0>;
  37                 };
  38         };
  39
  40         cec_pins_sleep_a: cec-sleep-0 {
  41                 pins {
  42                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
  43                 };
  44         };
  45
  46         cec_pins_b: cec-1 {
  47                 pins {
  48                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
  49                         bias-disable;
  50                         drive-open-drain;
  51                         slew-rate = <0>;
  52                 };
  53         };
  54
  55         cec_pins_sleep_b: cec-sleep-1 {
  56                 pins {
  57                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
  58                 };
  59         };
  60
  61         dac_ch1_pins_a: dac-ch1 {
  62                 pins {
  63                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
  64                 };
  65         };
  66
  67         dac_ch2_pins_a: dac-ch2 {
  68                 pins {
  69                         pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
  70                 };
  71         };
  72
  73         dcmi_pins_a: dcmi-0 {
  74                 pins {
  75                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
  76                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
  77                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
  78                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
  79                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
  80                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
  81                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
  82                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
  83                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
  84                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
  85                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
  86                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
  87                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
  88                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
  89                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
  90                         bias-disable;
  91                 };
  92         };
  93
  94         dcmi_sleep_pins_a: dcmi-sleep-0 {
  95                 pins {
  96                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
  97                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
  98                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
  99                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 100                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 101                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 102                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 103                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 104                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 105                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 106                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 107                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 108                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 109                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 110                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 111                 };
 112         };
 113
 114         ethernet0_rgmii_pins_a: rgmii-0 {
 115                 pins1 {
 116                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 117                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 118                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 119                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 120                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 121                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 122                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 123                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 124                         bias-disable;
 125                         drive-push-pull;
 126                         slew-rate = <2>;
 127                 };
 128                 pins2 {
 129                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 130                         bias-disable;
 131                         drive-push-pull;
 132                         slew-rate = <0>;
 133                 };
 134                 pins3 {
 135                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 136                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 137                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 138                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 139                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 140                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 141                         bias-disable;
 142                 };
 143         };
 144
 145         ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
 146                 pins1 {
 147                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 148                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 149                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 150                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 151                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 152                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 153                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 154                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 155                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 156                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 157                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 158                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 159                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 160                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 161                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 162                 };
 163         };
 164
 165         ethernet0_rgmii_pins_b: rgmii-1 {
 166                 pins1 {
 167                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 168                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 169                                  <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
 170                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 171                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 172                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 173                                  <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 174                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 175                         bias-disable;
 176                         drive-push-pull;
 177                         slew-rate = <2>;
 178                 };
 179                 pins2 {
 180                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 181                         bias-disable;
 182                         drive-push-pull;
 183                         slew-rate = <0>;
 184                 };
 185                 pins3 {
 186                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 187                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 188                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 189                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 190                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 191                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 192                         bias-disable;
 193                 };
 194         };
 195
 196         ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 {
 197                 pins1 {
 198                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 199                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 200                                  <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
 201                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 202                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 203                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 204                                  <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 205                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 206                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 207                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 208                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 209                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 210                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 211                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 212                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 213                 };
 214         };
 215
 216         fmc_pins_a: fmc-0 {
 217                 pins1 {
 218                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
 219                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
 220                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
 221                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
 222                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
 223                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
 224                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
 225                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
 226                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
 227                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
 228                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
 229                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
 230                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
 231                         bias-disable;
 232                         drive-push-pull;
 233                         slew-rate = <1>;
 234                 };
 235                 pins2 {
 236                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
 237                         bias-pull-up;
 238                 };
 239         };
 240
 241         fmc_sleep_pins_a: fmc-sleep-0 {
 242                 pins {
 243                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
 244                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
 245                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
 246                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
 247                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
 248                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
 249                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
 250                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
 251                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
 252                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
 253                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
 254                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
 255                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
 256                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
 257                 };
 258         };
 259
 260         i2c1_pins_a: i2c1-0 {
 261                 pins {
 262                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 263                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 264                         bias-disable;
 265                         drive-open-drain;
 266                         slew-rate = <0>;
 267                 };
 268         };
 269
 270         i2c1_pins_sleep_a: i2c1-1 {
 271                 pins {
 272                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 273                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 274                 };
 275         };
 276
 277         i2c1_pins_b: i2c1-2 {
 278                 pins {
 279                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 280                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 281                         bias-disable;
 282                         drive-open-drain;
 283                         slew-rate = <0>;
 284                 };
 285         };
 286
 287         i2c1_pins_sleep_b: i2c1-3 {
 288                 pins {
 289                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 290                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 291                 };
 292         };
 293
 294         i2c2_pins_a: i2c2-0 {
 295                 pins {
 296                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 297                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 298                         bias-disable;
 299                         drive-open-drain;
 300                         slew-rate = <0>;
 301                 };
 302         };
 303
 304         i2c2_pins_sleep_a: i2c2-1 {
 305                 pins {
 306                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 307                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 308                 };
 309         };
 310
 311         i2c2_pins_b1: i2c2-2 {
 312                 pins {
 313                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 314                         bias-disable;
 315                         drive-open-drain;
 316                         slew-rate = <0>;
 317                 };
 318         };
 319
 320         i2c2_pins_sleep_b1: i2c2-3 {
 321                 pins {
 322                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 323                 };
 324         };
 325
 326         i2c5_pins_a: i2c5-0 {
 327                 pins {
 328                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 329                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 330                         bias-disable;
 331                         drive-open-drain;
 332                         slew-rate = <0>;
 333                 };
 334         };
 335
 336         i2c5_pins_sleep_a: i2c5-1 {
 337                 pins {
 338                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 339                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 340
 341                 };
 342         };
 343
 344         i2s2_pins_a: i2s2-0 {
 345                 pins {
 346                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 347                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 348                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 349                         slew-rate = <1>;
 350                         drive-push-pull;
 351                         bias-disable;
 352                 };
 353         };
 354
 355         i2s2_pins_sleep_a: i2s2-1 {
 356                 pins {
 357                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 358                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 359                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 360                 };
 361         };
 362
 363         ltdc_pins_a: ltdc-a-0 {
 364                 pins {
 365                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 366                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 367                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 368                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 369                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 370                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 371                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 372                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 373                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 374                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 375                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 376                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 377                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 378                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 379                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 380                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 381                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 382                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 383                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 384                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 385                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 386                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 387                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 388                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 389                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 390                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 391                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 392                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 393                         bias-disable;
 394                         drive-push-pull;
 395                         slew-rate = <1>;
 396                 };
 397         };
 398
 399         ltdc_pins_sleep_a: ltdc-a-1 {
 400                 pins {
 401                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 402                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 403                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 404                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 405                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 406                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 407                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 408                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 409                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 410                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 411                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 412                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 413                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 414                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 415                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 416                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 417                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 418                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 419                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 420                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 421                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 422                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 423                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 424                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 425                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 426                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 427                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 428                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 429                 };
 430         };
 431
 432         ltdc_pins_b: ltdc-b-0 {
 433                 pins {
 434                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 435                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 436                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 437                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 438                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 439                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 440                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 441                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 442                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 443                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 444                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 445                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 446                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 447                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 448                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 449                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 450                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 451                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 452                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 453                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 454                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 455                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 456                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 457                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 458                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 459                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 460                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 461                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 462                         bias-disable;
 463                         drive-push-pull;
 464                         slew-rate = <1>;
 465                 };
 466         };
 467
 468         ltdc_pins_sleep_b: ltdc-b-1 {
 469                 pins {
 470                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 471                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 472                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 473                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 474                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 475                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 476                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 477                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 478                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 479                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 480                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 481                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 482                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 483                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 484                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 485                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 486                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 487                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 488                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 489                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 490                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 491                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 492                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 493                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 494                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 495                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 496                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 497                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 498                 };
 499         };
 500
 501         m_can1_pins_a: m-can1-0 {
 502                 pins1 {
 503                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 504                         slew-rate = <1>;
 505                         drive-push-pull;
 506                         bias-disable;
 507                 };
 508                 pins2 {
 509                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 510                         bias-disable;
 511                 };
 512         };
 513
 514         m_can1_sleep_pins_a: m_can1-sleep-0 {
 515                 pins {
 516                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 517                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 518                 };
 519         };
 520
 521         pwm1_pins_a: pwm1-0 {
 522                 pins {
 523                         pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
 524                                  <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
 525                                  <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
 526                         bias-pull-down;
 527                         drive-push-pull;
 528                         slew-rate = <0>;
 529                 };
 530         };
 531
 532         pwm1_sleep_pins_a: pwm1-sleep-0 {
 533                 pins {
 534                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
 535                                  <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
 536                                  <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
 537                 };
 538         };
 539
 540         pwm2_pins_a: pwm2-0 {
 541                 pins {
 542                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 543                         bias-pull-down;
 544                         drive-push-pull;
 545                         slew-rate = <0>;
 546                 };
 547         };
 548
 549         pwm2_sleep_pins_a: pwm2-sleep-0 {
 550                 pins {
 551                         pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
 552                 };
 553         };
 554
 555         pwm3_pins_a: pwm3-0 {
 556                 pins {
 557                         pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
 558                         bias-pull-down;
 559                         drive-push-pull;
 560                         slew-rate = <0>;
 561                 };
 562         };
 563
 564         pwm3_sleep_pins_a: pwm3-sleep-0 {
 565                 pins {
 566                         pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
 567                 };
 568         };
 569
 570         pwm4_pins_a: pwm4-0 {
 571                 pins {
 572                         pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
 573                                  <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
 574                         bias-pull-down;
 575                         drive-push-pull;
 576                         slew-rate = <0>;
 577                 };
 578         };
 579
 580         pwm4_sleep_pins_a: pwm4-sleep-0 {
 581                 pins {
 582                         pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
 583                                  <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
 584                 };
 585         };
 586
 587         pwm4_pins_b: pwm4-1 {
 588                 pins {
 589                         pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
 590                         bias-pull-down;
 591                         drive-push-pull;
 592                         slew-rate = <0>;
 593                 };
 594         };
 595
 596         pwm4_sleep_pins_b: pwm4-sleep-1 {
 597                 pins {
 598                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
 599                 };
 600         };
 601
 602         pwm5_pins_a: pwm5-0 {
 603                 pins {
 604                         pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
 605                         bias-pull-down;
 606                         drive-push-pull;
 607                         slew-rate = <0>;
 608                 };
 609         };
 610
 611         pwm5_sleep_pins_a: pwm5-sleep-0 {
 612                 pins {
 613                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
 614                 };
 615         };
 616
 617         pwm8_pins_a: pwm8-0 {
 618                 pins {
 619                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 620                         bias-pull-down;
 621                         drive-push-pull;
 622                         slew-rate = <0>;
 623                 };
 624         };
 625
 626         pwm8_sleep_pins_a: pwm8-sleep-0 {
 627                 pins {
 628                         pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
 629                 };
 630         };
 631
 632         pwm12_pins_a: pwm12-0 {
 633                 pins {
 634                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 635                         bias-pull-down;
 636                         drive-push-pull;
 637                         slew-rate = <0>;
 638                 };
 639         };
 640
 641         pwm12_sleep_pins_a: pwm12-sleep-0 {
 642                 pins {
 643                         pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
 644                 };
 645         };
 646
 647         qspi_clk_pins_a: qspi-clk-0 {
 648                 pins {
 649                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 650                         bias-disable;
 651                         drive-push-pull;
 652                         slew-rate = <3>;
 653                 };
 654         };
 655
 656         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 657                 pins {
 658                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 659                 };
 660         };
 661
 662         qspi_bk1_pins_a: qspi-bk1-0 {
 663                 pins1 {
 664                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
 665                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
 666                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
 667                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
 668                         bias-disable;
 669                         drive-push-pull;
 670                         slew-rate = <1>;
 671                 };
 672                 pins2 {
 673                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
 674                         bias-pull-up;
 675                         drive-push-pull;
 676                         slew-rate = <1>;
 677                 };
 678         };
 679
 680         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
 681                 pins {
 682                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
 683                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
 684                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
 685                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
 686                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
 687                 };
 688         };
 689
 690         qspi_bk2_pins_a: qspi-bk2-0 {
 691                 pins1 {
 692                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
 693                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
 694                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
 695                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
 696                         bias-disable;
 697                         drive-push-pull;
 698                         slew-rate = <1>;
 699                 };
 700                 pins2 {
 701                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
 702                         bias-pull-up;
 703                         drive-push-pull;
 704                         slew-rate = <1>;
 705                 };
 706         };
 707
 708         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
 709                 pins {
 710                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
 711                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
 712                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
 713                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
 714                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
 715                 };
 716         };
 717
 718         sai2a_pins_a: sai2a-0 {
 719                 pins {
 720                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
 721                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
 722                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
 723                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
 724                         slew-rate = <0>;
 725                         drive-push-pull;
 726                         bias-disable;
 727                 };
 728         };
 729
 730         sai2a_sleep_pins_a: sai2a-1 {
 731                 pins {
 732                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
 733                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
 734                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
 735                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
 736                 };
 737         };
 738
 739         sai2b_pins_a: sai2b-0 {
 740                 pins1 {
 741                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
 742                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
 743                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
 744                         slew-rate = <0>;
 745                         drive-push-pull;
 746                         bias-disable;
 747                 };
 748                 pins2 {
 749                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 750                         bias-disable;
 751                 };
 752         };
 753
 754         sai2b_sleep_pins_a: sai2b-1 {
 755                 pins {
 756                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
 757                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
 758                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
 759                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
 760                 };
 761         };
 762
 763         sai2b_pins_b: sai2b-2 {
 764                 pins {
 765                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 766                         bias-disable;
 767                 };
 768         };
 769
 770         sai2b_sleep_pins_b: sai2b-3 {
 771                 pins {
 772                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
 773                 };
 774         };
 775
 776         sai4a_pins_a: sai4a-0 {
 777                 pins {
 778                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
 779                         slew-rate = <0>;
 780                         drive-push-pull;
 781                         bias-disable;
 782                 };
 783         };
 784
 785         sai4a_sleep_pins_a: sai4a-1 {
 786                 pins {
 787                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
 788                 };
 789         };
 790
 791         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
 792                 pins1 {
 793                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 794                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 795                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 796                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
 797                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 798                         slew-rate = <1>;
 799                         drive-push-pull;
 800                         bias-disable;
 801                 };
 802                 pins2 {
 803                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
 804                         slew-rate = <2>;
 805                         drive-push-pull;
 806                         bias-disable;
 807                 };
 808         };
 809
 810         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
 811                 pins1 {
 812                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 813                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 814                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 815                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
 816                         slew-rate = <1>;
 817                         drive-push-pull;
 818                         bias-disable;
 819                 };
 820                 pins2 {
 821                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
 822                         slew-rate = <2>;
 823                         drive-push-pull;
 824                         bias-disable;
 825                 };
 826                 pins3 {
 827                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 828                         slew-rate = <1>;
 829                         drive-open-drain;
 830                         bias-disable;
 831                 };
 832         };
 833
 834         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
 835                 pins {
 836                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
 837                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
 838                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
 839                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
 840                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
 841                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
 842                 };
 843         };
 844
 845         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
 846                 pins1 {
 847                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
 848                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
 849                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
 850                         slew-rate = <1>;
 851                         drive-push-pull;
 852                         bias-pull-up;
 853                 };
 854                 pins2{
 855                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
 856                         bias-pull-up;
 857                 };
 858         };
 859
 860         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
 861                 pins {
 862                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
 863                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
 864                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
 865                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
 866                 };
 867         };
 868
 869         sdmmc1_dir_pins_b: sdmmc1-dir-1 {
 870                 pins1 {
 871                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
 872                                  <STM32_PINMUX('E', 14, AF8)>, /* SDMMC1_D123DIR */
 873                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
 874                         slew-rate = <1>;
 875                         drive-push-pull;
 876                         bias-pull-up;
 877                 };
 878                 pins2{
 879                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
 880                         bias-pull-up;
 881                 };
 882         };
 883
 884         sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
 885                 pins {
 886                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
 887                          <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
 888                          <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
 889                          <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
 890                 };
 891         };
 892
 893         sdmmc2_b4_pins_a: sdmmc2-b4-0 {
 894                 pins1 {
 895                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
 896                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
 897                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
 898                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
 899                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 900                         slew-rate = <1>;
 901                         drive-push-pull;
 902                         bias-pull-up;
 903                 };
 904                 pins2 {
 905                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
 906                         slew-rate = <2>;
 907                         drive-push-pull;
 908                         bias-pull-up;
 909                 };
 910         };
 911
 912         sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
 913                 pins1 {
 914                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
 915                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
 916                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
 917                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
 918                         slew-rate = <1>;
 919                         drive-push-pull;
 920                         bias-pull-up;
 921                 };
 922                 pins2 {
 923                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
 924                         slew-rate = <2>;
 925                         drive-push-pull;
 926                         bias-pull-up;
 927                 };
 928                 pins3 {
 929                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 930                         slew-rate = <1>;
 931                         drive-open-drain;
 932                         bias-pull-up;
 933                 };
 934         };
 935
 936         sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
 937                 pins {
 938                         pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
 939                                  <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
 940                                  <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
 941                                  <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
 942                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
 943                                  <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
 944                 };
 945         };
 946
 947         sdmmc2_b4_pins_b: sdmmc2-b4-1 {
 948                 pins1 {
 949                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
 950                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
 951                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
 952                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
 953                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 954                         slew-rate = <1>;
 955                         drive-push-pull;
 956                         bias-disable;
 957                 };
 958                 pins2 {
 959                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
 960                         slew-rate = <2>;
 961                         drive-push-pull;
 962                         bias-disable;
 963                 };
 964         };
 965
 966         sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
 967                 pins1 {
 968                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
 969                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
 970                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
 971                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
 972                         slew-rate = <1>;
 973                         drive-push-pull;
 974                         bias-disable;
 975                 };
 976                 pins2 {
 977                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
 978                         slew-rate = <2>;
 979                         drive-push-pull;
 980                         bias-disable;
 981                 };
 982                 pins3 {
 983                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 984                         slew-rate = <1>;
 985                         drive-open-drain;
 986                         bias-disable;
 987                 };
 988         };
 989
 990         sdmmc2_d47_pins_a: sdmmc2-d47-0 {
 991                 pins {
 992                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
 993                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
 994                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
 995                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
 996                         slew-rate = <1>;
 997                         drive-push-pull;
 998                         bias-pull-up;
 999                 };
1000         };
1001
1002         sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1003                 pins {
1004                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1005                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1006                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1007                                  <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1008                 };
1009         };
1010
1011         sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1012                 pins {
1013                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1014                                  <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1015                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1016                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1017                         slew-rate = <1>;
1018                         drive-push-pull;
1019                         bias-pull-up;
1020                 };
1021         };
1022
1023         sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1024                 pins {
1025                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1026                                  <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1027                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1028                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1029                 };
1030         };
1031
1032         sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1033                 pins1 {
1034                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1035                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1036                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1037                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1038                                  <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1039                         slew-rate = <1>;
1040                         drive-push-pull;
1041                         bias-pull-up;
1042                 };
1043                 pins2 {
1044                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1045                         slew-rate = <2>;
1046                         drive-push-pull;
1047                         bias-pull-up;
1048                 };
1049         };
1050
1051         sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1052                 pins1 {
1053                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1054                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1055                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1056                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1057                         slew-rate = <1>;
1058                         drive-push-pull;
1059                         bias-pull-up;
1060                 };
1061                 pins2 {
1062                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1063                         slew-rate = <2>;
1064                         drive-push-pull;
1065                         bias-pull-up;
1066                 };
1067                 pins3 {
1068                         pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1069                         slew-rate = <1>;
1070                         drive-open-drain;
1071                         bias-pull-up;
1072                 };
1073         };
1074
1075         sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1076                 pins {
1077                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1078                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1079                                  <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1080                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1081                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1082                                  <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1083                 };
1084         };
1085
1086         spdifrx_pins_a: spdifrx-0 {
1087                 pins {
1088                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1089                         bias-disable;
1090                 };
1091         };
1092
1093         spdifrx_sleep_pins_a: spdifrx-1 {
1094                 pins {
1095                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1096                 };
1097         };
1098
1099         spi2_pins_a: spi2-0 {
1100                 pins1 {
1101                         pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
1102                                  <STM32_PINMUX('I', 0, AF5)>, /* SPI2_NSS */
1103                                  <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
1104                         bias-disable;
1105                         drive-push-pull;
1106                         slew-rate = <3>;
1107                 };
1108                 pins2 {
1109                         pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
1110                         bias-disable;
1111                 };
1112         };
1113
1114         stusb1600_pins_a: stusb1600-0 {
1115                         pins {
1116                                 pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
1117                                 bias-pull-up;
1118                 };
1119         };
1120
1121         uart4_pins_a: uart4-0 {
1122                 pins1 {
1123                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1124                         bias-disable;
1125                         drive-push-pull;
1126                         slew-rate = <0>;
1127                 };
1128                 pins2 {
1129                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1130                         bias-disable;
1131                 };
1132         };
1133
1134         uart4_pins_b: uart4-1 {
1135                 pins1 {
1136                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1137                         bias-disable;
1138                         drive-push-pull;
1139                         slew-rate = <0>;
1140                 };
1141                 pins2 {
1142                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1143                         bias-disable;
1144                 };
1145         };
1146
1147         uart7_pins_a: uart7-0 {
1148                 pins1 {
1149                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
1150                         bias-disable;
1151                         drive-push-pull;
1152                         slew-rate = <0>;
1153                 };
1154                 pins2 {
1155                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
1156                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
1157                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
1158                         bias-disable;
1159                 };
1160         };
1161 };
1162
1163 &pinctrl_z {
1164         i2c2_pins_b2: i2c2-0 {
1165                 pins {
1166                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
1167                         bias-disable;
1168                         drive-open-drain;
1169                         slew-rate = <0>;
1170                 };
1171         };
1172
1173         i2c2_pins_sleep_b2: i2c2-1 {
1174                 pins {
1175                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
1176                 };
1177         };
1178
1179         i2c4_pins_a: i2c4-0 {
1180                 pins {
1181                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
1182                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
1183                         bias-disable;
1184                         drive-open-drain;
1185                         slew-rate = <0>;
1186                 };
1187         };
1188
1189         i2c4_pins_sleep_a: i2c4-1 {
1190                 pins {
1191                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
1192                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
1193                 };
1194         };
1195
1196         spi1_pins_a: spi1-0 {
1197                 pins1 {
1198                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
1199                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
1200                         bias-disable;
1201                         drive-push-pull;
1202                         slew-rate = <1>;
1203                 };
1204
1205                 pins2 {
1206                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
1207                         bias-disable;
1208                 };
1209         };
1210 };