2 * Copyright : STMicroelectronics 2018
4 * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
12 compatible = "st,stm32mp1-ddr";
14 reg = <0x5A003000 0x550
17 clocks = <&rcc_clk AXIDCG>,
22 <&rcc_clk DDRPHYCAPB>;
24 clock-names = "axidcg",
31 st,mem-name = DDR_MEM_NAME;
32 st,mem-speed = <DDR_MEM_SPEED>;
33 st,mem-size = <DDR_MEM_SIZE>;