1 // SPDX-License-Identifier: GPL-2.0+
3 #include <dt-bindings/memory/stm32-sdram.h>
9 compatible = "st,stm32-fmc";
10 reg = <0xA0000000 0x1000>;
11 clocks = <&rcc 0 STM32F7_AHB3_CLOCK(FMC)>;
12 pinctrl-0 = <&fmc_pins>;
13 pinctrl-names = "default";
18 mac: ethernet@40028000 {
19 compatible = "st,stm32-dwmac";
20 reg = <0x40028000 0x8000>;
21 reg-names = "stmmaceth";
22 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(ETHMAC)>,
23 <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACTX)>,
24 <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACRX)>;
25 interrupts = <61>, <62>;
26 interrupt-names = "macirq", "eth_wake_irq";
30 pinctrl-0 = <ðernet_mii>;
39 compatible = "snps,dwmac-mdio";
40 phy0: ethernet-phy@0 {
46 qspi: quadspi@A0001000 {
47 compatible = "st,stm32-qspi";
50 reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>;
51 reg-names = "qspi", "qspi_mm";
53 spi-max-frequency = <108000000>;
54 clocks = <&rcc 0 STM32F7_AHB3_CLOCK(QSPI)>;
55 resets = <&rcc STM32F7_AHB3_RESET(QSPI)>;
56 pinctrl-0 = <&qspi_pins>;
68 compatible = "st,stm32-gpio";
73 compatible = "st,stm32-gpio";
78 compatible = "st,stm32-gpio";
83 compatible = "st,stm32-gpio";
88 compatible = "st,stm32-gpio";
93 compatible = "st,stm32-gpio";
98 compatible = "st,stm32-gpio";
103 compatible = "st,stm32-gpio";
108 compatible = "st,stm32-gpio";
113 compatible = "st,stm32-gpio";
117 compatible = "st,stm32-gpio";
146 clocks = <&rcc 0 STM32F7_APB2_CLOCK(USART1)>;