arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
   2 /*
   3  * U-Boot additions
   4  *
   5  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
   6  * Copyright (c) 2018 Simon Goldschmidt
   7  */
   8
   9 /{
  10         aliases {
  11                 spi0 = "/soc/spi@ff705000";
  12                 udc0 = &usb0;
  13         };
  14
  15         soc {
  16                 u-boot,dm-pre-reloc;
  17         };
  18 };
  19
  20 &watchdog0 {
  21         status = "disabled";
  22 };
  23
  24 &mmc {
  25         u-boot,dm-pre-reloc;
  26 };
  27
  28 &qspi {
  29         u-boot,dm-pre-reloc;
  30
  31         n25q128@0 {
  32                 compatible = "n25q128", "spi-flash";
  33                 u-boot,dm-pre-reloc;
  34         };
  35         n25q00@1 {
  36                 compatible = "n25q00", "spi-flash";
  37                 u-boot,dm-pre-reloc;
  38         };
  39 };
  40
  41 &uart0 {
  42         clock-frequency = <100000000>;
  43         u-boot,dm-pre-reloc;
  44 };
  45
  46 &uart1 {
  47         clock-frequency = <100000000>;
  48 };
  49
  50 &porta {
  51         bank-name = "porta";
  52 };
  53
  54 &portb {
  55         bank-name = "portb";
  56 };
  57
  58 &portc {
  59         bank-name = "portc";
  60 };