arch/arm/dts/socfpga_cyclone5_sr1500.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
   4  */
   5
   6 #include "socfpga_cyclone5.dtsi"
   7 #include "socfpga-common-u-boot.dtsi"
   8
   9 / {
  10         model = "SoCFPGA Cyclone V SR1500";
  11         compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
  12
  13         chosen {
  14                 bootargs = "console=ttyS0,115200";
  15                 stdout-path = "serial0:115200n8";
  16         };
  17
  18         aliases {
  19                 /*
  20                  * This allows the ethaddr uboot environment variable
  21                  * contents to be added to the gmac1 device tree blob.
  22                  */
  23                 ethernet0 = &gmac1;
  24         };
  25
  26         memory@0 {
  27                 name = "memory";
  28                 device_type = "memory";
  29                 reg = <0x0 0x40000000>; /* 1GB */
  30         };
  31 };
  32
  33 &gmac1 {
  34         status = "okay";
  35         phy-mode = "rgmii";
  36 };
  37
  38 &gpio0 {
  39         status = "okay";
  40 };
  41
  42 &gpio1 {
  43         status = "okay";
  44 };
  45
  46 &gpio2 {
  47         status = "okay";
  48 };
  49
  50 &porta {
  51         bank-name = "porta";
  52 };
  53
  54 &portb {
  55         bank-name = "portb";
  56 };
  57
  58 &portc {
  59         bank-name = "portc";
  60 };
  61
  62 &i2c0 {
  63         status = "okay";
  64         speed-mode = <0>;
  65 };
  66
  67 &i2c1 {
  68         status = "okay";
  69         speed-mode = <0>;
  70 };
  71
  72 &mmc0 {
  73         status = "okay";
  74         bus-width = <8>;
  75         u-boot,dm-pre-reloc;
  76 };
  77
  78 &uart0 {
  79         status = "okay";
  80         u-boot,dm-pre-reloc;
  81 };
  82
  83 &usb1 {
  84         status = "okay";
  85 };
  86
  87 &watchdog0 {
  88         status = "okay";
  89 };
  90
  91 &qspi {
  92         status = "okay";
  93         u-boot,dm-pre-reloc;
  94
  95         flash0: n25q00@0 {
  96                 u-boot,dm-pre-reloc;
  97                 #address-cells = <1>;
  98                 #size-cells = <1>;
  99                 compatible = "n25q00", "jedec,spi-nor";
 100                 reg = <0>;      /* chip select */
 101                 spi-max-frequency = <100000000>;
 102                 m25p,fast-read;
 103                 page-size = <256>;
 104                 block-size = <16>; /* 2^16, 64KB */
 105                 cdns,tshsl-ns = <50>;
 106                 cdns,tsd2d-ns = <50>;
 107                 cdns,tchsh-ns = <4>;
 108                 cdns,tslch-ns = <4>;
 109         };
 110 };