arch/arm/dts/socfpga_cyclone5_socrates.dts

   1 /*
   2  *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "socfpga_cyclone5.dtsi"
   8
   9 / {
  10         model = "EBV SOCrates";
  11         compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
  12
  13         chosen {
  14                 bootargs = "console=ttyS0,115200";
  15         };
  16
  17         memory {
  18                 name = "memory";
  19                 device_type = "memory";
  20                 reg = <0x0 0x40000000>; /* 1GB */
  21         };
  22
  23         soc {
  24                 u-boot,dm-pre-reloc;
  25         };
  26 };
  27
  28 &gmac1 {
  29         status = "okay";
  30         phy-mode = "rgmii";
  31 };
  32
  33 &i2c0 {
  34         status = "okay";
  35
  36         rtc: rtc@68 {
  37                 compatible = "stm,m41t82";
  38                 reg = <0x68>;
  39         };
  40 };
  41
  42 &mmc0 {
  43         status = "okay";
  44         u-boot,dm-pre-reloc;
  45 };
  46
  47 &qspi {
  48         status = "okay";
  49
  50         flash0: n25q00@0 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 compatible = "n25q00";
  54                 reg = <0>;      /* chip select */
  55                 spi-max-frequency = <50000000>;
  56                 m25p,fast-read;
  57                 page-size = <256>;
  58                 block-size = <16>; /* 2^16, 64KB */
  59                 read-delay = <4>;  /* delay value in read data capture register */
  60                 tshsl-ns = <50>;
  61                 tsd2d-ns = <50>;
  62                 tchsh-ns = <4>;
  63                 tslch-ns = <4>;
  64         };
  65 };