arch/arm/dts/socfpga_cyclone5_de10_nano.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017, Intel Corporation
   4  *
   5  * based on socfpga_cyclone5_de0_nano_soc.dts
   6  */
   7
   8 #include "socfpga_cyclone5.dtsi"
   9
  10 / {
  11         model = "Terasic DE10-Nano";
  12         compatible = "altr,socfpga-cyclone5", "altr,socfpga";
  13
  14         chosen {
  15                 bootargs = "console=ttyS0,115200";
  16                 stdout-path = "serial0:115200n8";
  17         };
  18
  19         aliases {
  20                 ethernet0 = &gmac1;
  21                 udc0 = &usb1;
  22         };
  23
  24         memory {
  25                 name = "memory";
  26                 device_type = "memory";
  27                 reg = <0x0 0x40000000>; /* 1GB */
  28         };
  29
  30         soc {
  31                 u-boot,dm-pre-reloc;
  32         };
  33 };
  34
  35 &gmac1 {
  36         status = "okay";
  37         phy-mode = "rgmii";
  38
  39         rxd0-skew-ps = <420>;
  40         rxd1-skew-ps = <420>;
  41         rxd2-skew-ps = <420>;
  42         rxd3-skew-ps = <420>;
  43         txen-skew-ps = <0>;
  44         txc-skew-ps = <1860>;
  45         rxdv-skew-ps = <420>;
  46         rxc-skew-ps = <1680>;
  47 };
  48
  49 &gpio0 {
  50         status = "okay";
  51 };
  52
  53 &gpio1 {
  54         status = "okay";
  55 };
  56
  57 &gpio2 {
  58         status = "okay";
  59 };
  60
  61 &porta {
  62         bank-name = "porta";
  63 };
  64
  65 &portb {
  66         bank-name = "portb";
  67 };
  68
  69 &portc {
  70         bank-name = "portc";
  71 };
  72
  73 &mmc0 {
  74         status = "okay";
  75         u-boot,dm-pre-reloc;
  76 };
  77
  78 &usb1 {
  79         status = "okay";
  80 };
  81
  82 &uart0 {
  83         u-boot,dm-pre-reloc;
  84 };
  85
  86 &watchdog0 {
  87         status = "disabled";
  88 };