arch/arm/dts/socfpga_cyclone5_de10_nano.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017, Intel Corporation
   4  *
   5  * based on socfpga_cyclone5_de0_nano_soc.dts
   6  */
   7
   8 #include "socfpga_cyclone5.dtsi"
   9 #include "socfpga-common-u-boot.dtsi"
  10
  11 / {
  12         model = "Terasic DE10-Nano";
  13         compatible = "altr,socfpga-cyclone5", "altr,socfpga";
  14
  15         chosen {
  16                 bootargs = "console=ttyS0,115200";
  17                 stdout-path = "serial0:115200n8";
  18         };
  19
  20         aliases {
  21                 ethernet0 = &gmac1;
  22                 udc0 = &usb1;
  23         };
  24
  25         memory {
  26                 name = "memory";
  27                 device_type = "memory";
  28                 reg = <0x0 0x40000000>; /* 1GB */
  29         };
  30 };
  31
  32 &gmac1 {
  33         status = "okay";
  34         phy-mode = "rgmii";
  35
  36         rxd0-skew-ps = <420>;
  37         rxd1-skew-ps = <420>;
  38         rxd2-skew-ps = <420>;
  39         rxd3-skew-ps = <420>;
  40         txen-skew-ps = <0>;
  41         txc-skew-ps = <1860>;
  42         rxdv-skew-ps = <420>;
  43         rxc-skew-ps = <1680>;
  44 };
  45
  46 &gpio0 {
  47         status = "okay";
  48 };
  49
  50 &gpio1 {
  51         status = "okay";
  52 };
  53
  54 &gpio2 {
  55         status = "okay";
  56 };
  57
  58 &porta {
  59         bank-name = "porta";
  60 };
  61
  62 &portb {
  63         bank-name = "portb";
  64 };
  65
  66 &portc {
  67         bank-name = "portc";
  68 };
  69
  70 &mmc0 {
  71         status = "okay";
  72         u-boot,dm-pre-reloc;
  73 };
  74
  75 &usb1 {
  76         status = "okay";
  77 };
  78
  79 &uart0 {
  80         clock-frequency = <100000000>;
  81         u-boot,dm-pre-reloc;
  82 };
  83
  84 &watchdog0 {
  85         status = "disabled";
  86 };