arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts

   1 /*
   2  * Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /dts-v1/;
  19 #include "socfpga_arria10_socdk.dtsi"
  20 #include "socfpga_arria10_socdk_sdmmc_handoff.dtsi"
  21 #include "socfpga_arria10_handoff_u-boot.dtsi"
  22
  23 / {
  24         chosen {
  25                 firmware-loader = <&fs_loader0>;
  26         };
  27
  28         fs_loader0: fs-loader {
  29                 u-boot,dm-pre-reloc;
  30                 compatible = "u-boot,fs-loader";
  31                 phandlepart = <&mmc 1>;
  32         };
  33 };
  34
  35 &fpga_mgr {
  36         u-boot,dm-pre-reloc;
  37         altr,bitstream = "fit_spl_fpga.itb";
  38 };
  39
  40 &mmc {
  41         u-boot,dm-pre-reloc;
  42         status = "okay";
  43         num-slots = <1>;
  44         cap-sd-highspeed;
  45         broken-cd;
  46         bus-width = <4>;
  47 };
  48
  49 &eccmgr {
  50         sdmmca-ecc@ff8c2c00 {
  51                 compatible = "altr,socfpga-sdmmc-ecc";
  52                 reg = <0xff8c2c00 0x400>;
  53                 altr,ecc-parent = <&mmc>;
  54                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
  55                              <47 IRQ_TYPE_LEVEL_HIGH>,
  56                              <16 IRQ_TYPE_LEVEL_HIGH>,
  57                              <48 IRQ_TYPE_LEVEL_HIGH>;
  58         };
  59 };
  60
  61 /* Clock available early */
  62 &main_sdmmc_clk {
  63         u-boot,dm-pre-reloc;
  64 };
  65
  66 &peri_sdmmc_clk {
  67         u-boot,dm-pre-reloc;
  68 };
  69
  70 &sdmmc_free_clk {
  71         u-boot,dm-pre-reloc;
  72 };
  73
  74 &sdmmc_clk {
  75         u-boot,dm-pre-reloc;
  76 };