arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2
   3 / {
   4         chosen {
   5                 u-boot,dm-pre-reloc;
   6         };
   7
   8         clocks {
   9                 u-boot,dm-pre-reloc;
  10
  11                 altera_arria10_hps_eosc1 {
  12                         u-boot,dm-pre-reloc;
  13                 };
  14
  15                 altera_arria10_hps_cb_intosc_ls {
  16                         u-boot,dm-pre-reloc;
  17                 };
  18
  19                 altera_arria10_hps_f2h_free {
  20                         u-boot,dm-pre-reloc;
  21                 };
  22         };
  23
  24         clock_manager@0xffd04000 {
  25                 u-boot,dm-pre-reloc;
  26
  27                 mainpll {
  28                         u-boot,dm-pre-reloc;
  29                 };
  30
  31                 perpll {
  32                         u-boot,dm-pre-reloc;
  33                 };
  34
  35                 alteragrp {
  36                         u-boot,dm-pre-reloc;
  37                 };
  38         };
  39
  40         pinmux@0xffd07000 {
  41                 u-boot,dm-pre-reloc;
  42
  43                 shared {
  44                         u-boot,dm-pre-reloc;
  45                 };
  46
  47                 dedicated {
  48                         u-boot,dm-pre-reloc;
  49                 };
  50
  51                 dedicated_cfg {
  52                         u-boot,dm-pre-reloc;
  53                 };
  54
  55                 fpga {
  56                         u-boot,dm-pre-reloc;
  57                 };
  58         };
  59
  60         noc@0xffd10000 {
  61                 u-boot,dm-pre-reloc;
  62
  63                 firewall {
  64                         u-boot,dm-pre-reloc;
  65                 };
  66         };
  67
  68         fpgabridge@0 {
  69                 u-boot,dm-pre-reloc;
  70         };
  71
  72         fpgabridge@1 {
  73                 u-boot,dm-pre-reloc;
  74         };
  75
  76         fpgabridge@2 {
  77                 u-boot,dm-pre-reloc;
  78         };
  79
  80         fpgabridge@3 {
  81                 u-boot,dm-pre-reloc;
  82         };
  83
  84         fpgabridge@4 {
  85                 u-boot,dm-pre-reloc;
  86         };
  87
  88         fpgabridge@5 {
  89                 u-boot,dm-pre-reloc;
  90         };
  91 };