arch/arm/dts/sama5d4.dtsi

   1 /*
   2  * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
   3  *
   4  *  Copyright (C) 2014 Atmel,
   5  *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License as
  14  *     published by the Free Software Foundation; either version 2 of the
  15  *     License, or (at your option) any later version.
  16  *
  17  *     This file is distributed in the hope that it will be useful,
  18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *     GNU General Public License for more details.
  21  *
  22  * Or, alternatively,
  23  *
  24  *  b) Permission is hereby granted, free of charge, to any person
  25  *     obtaining a copy of this software and associated documentation
  26  *     files (the "Software"), to deal in the Software without
  27  *     restriction, including without limitation the rights to use,
  28  *     copy, modify, merge, publish, distribute, sublicense, and/or
  29  *     sell copies of the Software, and to permit persons to whom the
  30  *     Software is furnished to do so, subject to the following
  31  *     conditions:
  32  *
  33  *     The above copyright notice and this permission notice shall be
  34  *     included in all copies or substantial portions of the Software.
  35  *
  36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43  *     OTHER DEALINGS IN THE SOFTWARE.
  44  */
  45
  46 #include "skeleton.dtsi"
  47 #include <dt-bindings/clock/at91.h>
  48 #include <dt-bindings/dma/at91.h>
  49 #include <dt-bindings/pinctrl/at91.h>
  50 #include <dt-bindings/interrupt-controller/irq.h>
  51 #include <dt-bindings/gpio/gpio.h>
  52
  53 / {
  54         model = "Atmel SAMA5D4 family SoC";
  55         compatible = "atmel,sama5d4";
  56         interrupt-parent = <&aic>;
  57
  58         aliases {
  59                 serial0 = &usart3;
  60                 serial1 = &usart4;
  61                 serial2 = &usart2;
  62                 serial3 = &usart0;
  63                 serial4 = &usart1;
  64                 serial5 = &uart0;
  65                 serial6 = &uart1;
  66                 gpio0 = &pioA;
  67                 gpio1 = &pioB;
  68                 gpio2 = &pioC;
  69                 gpio3 = &pioD;
  70                 gpio4 = &pioE;
  71                 pwm0 = &pwm0;
  72                 ssc0 = &ssc0;
  73                 ssc1 = &ssc1;
  74                 tcb0 = &tcb0;
  75                 tcb1 = &tcb1;
  76                 i2c0 = &i2c0;
  77                 i2c1 = &i2c1;
  78                 i2c2 = &i2c2;
  79         };
  80         cpus {
  81                 #address-cells = <1>;
  82                 #size-cells = <0>;
  83
  84                 cpu@0 {
  85                         device_type = "cpu";
  86                         compatible = "arm,cortex-a5";
  87                         reg = <0>;
  88                         next-level-cache = <&L2>;
  89                 };
  90         };
  91
  92         memory {
  93                 reg = <0x20000000 0x20000000>;
  94         };
  95
  96         clocks {
  97                 slow_xtal: slow_xtal {
  98                         compatible = "fixed-clock";
  99                         #clock-cells = <0>;
 100                         clock-frequency = <0>;
 101                 };
 102
 103                 main_xtal: main_xtal {
 104                         compatible = "fixed-clock";
 105                         #clock-cells = <0>;
 106                         clock-frequency = <0>;
 107                 };
 108
 109                 adc_op_clk: adc_op_clk{
 110                         compatible = "fixed-clock";
 111                         #clock-cells = <0>;
 112                         clock-frequency = <1000000>;
 113                 };
 114         };
 115
 116         ns_sram: sram@00210000 {
 117                 compatible = "mmio-sram";
 118                 reg = <0x00210000 0x10000>;
 119         };
 120
 121         ahb {
 122                 compatible = "simple-bus";
 123                 #address-cells = <1>;
 124                 #size-cells = <1>;
 125                 ranges;
 126                 u-boot,dm-pre-reloc;
 127
 128                 usb0: gadget@00400000 {
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         compatible = "atmel,sama5d3-udc";
 132                         reg = <0x00400000 0x100000
 133                                0xfc02c000 0x4000>;
 134                         interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
 135                         clocks = <&udphs_clk>, <&utmi>;
 136                         clock-names = "pclk", "hclk";
 137                         status = "disabled";
 138
 139                         ep0: endpoint@0 {
 140                                 reg = <0>;
 141                                 atmel,fifo-size = <64>;
 142                                 atmel,nb-banks = <1>;
 143                         };
 144
 145                         ep1: endpoint@1 {
 146                                 reg = <1>;
 147                                 atmel,fifo-size = <1024>;
 148                                 atmel,nb-banks = <3>;
 149                                 atmel,can-dma;
 150                                 atmel,can-isoc;
 151                         };
 152
 153                         ep2: endpoint@2 {
 154                                 reg = <2>;
 155                                 atmel,fifo-size = <1024>;
 156                                 atmel,nb-banks = <3>;
 157                                 atmel,can-dma;
 158                                 atmel,can-isoc;
 159                         };
 160
 161                         ep3: endpoint@3 {
 162                                 reg = <3>;
 163                                 atmel,fifo-size = <1024>;
 164                                 atmel,nb-banks = <2>;
 165                                 atmel,can-dma;
 166                                 atmel,can-isoc;
 167                         };
 168
 169                         ep4: endpoint@4 {
 170                                 reg = <4>;
 171                                 atmel,fifo-size = <1024>;
 172                                 atmel,nb-banks = <2>;
 173                                 atmel,can-dma;
 174                                 atmel,can-isoc;
 175                         };
 176
 177                         ep5: endpoint@5 {
 178                                 reg = <5>;
 179                                 atmel,fifo-size = <1024>;
 180                                 atmel,nb-banks = <2>;
 181                                 atmel,can-dma;
 182                                 atmel,can-isoc;
 183                         };
 184
 185                         ep6: endpoint@6 {
 186                                 reg = <6>;
 187                                 atmel,fifo-size = <1024>;
 188                                 atmel,nb-banks = <2>;
 189                                 atmel,can-dma;
 190                                 atmel,can-isoc;
 191                         };
 192
 193                         ep7: endpoint@7 {
 194                                 reg = <7>;
 195                                 atmel,fifo-size = <1024>;
 196                                 atmel,nb-banks = <2>;
 197                                 atmel,can-dma;
 198                                 atmel,can-isoc;
 199                         };
 200
 201                         ep8: endpoint@8 {
 202                                 reg = <8>;
 203                                 atmel,fifo-size = <1024>;
 204                                 atmel,nb-banks = <2>;
 205                                 atmel,can-isoc;
 206                         };
 207
 208                         ep9: endpoint@9 {
 209                                 reg = <9>;
 210                                 atmel,fifo-size = <1024>;
 211                                 atmel,nb-banks = <2>;
 212                                 atmel,can-isoc;
 213                         };
 214
 215                         ep10: endpoint@10 {
 216                                 reg = <10>;
 217                                 atmel,fifo-size = <1024>;
 218                                 atmel,nb-banks = <2>;
 219                                 atmel,can-isoc;
 220                         };
 221
 222                         ep11: endpoint@11 {
 223                                 reg = <11>;
 224                                 atmel,fifo-size = <1024>;
 225                                 atmel,nb-banks = <2>;
 226                                 atmel,can-isoc;
 227                         };
 228
 229                         ep12: endpoint@12 {
 230                                 reg = <12>;
 231                                 atmel,fifo-size = <1024>;
 232                                 atmel,nb-banks = <2>;
 233                                 atmel,can-isoc;
 234                         };
 235
 236                         ep13: endpoint@13 {
 237                                 reg = <13>;
 238                                 atmel,fifo-size = <1024>;
 239                                 atmel,nb-banks = <2>;
 240                                 atmel,can-isoc;
 241                         };
 242
 243                         ep14: endpoint@14 {
 244                                 reg = <14>;
 245                                 atmel,fifo-size = <1024>;
 246                                 atmel,nb-banks = <2>;
 247                                 atmel,can-isoc;
 248                         };
 249
 250                         ep15: endpoint@15 {
 251                                 reg = <15>;
 252                                 atmel,fifo-size = <1024>;
 253                                 atmel,nb-banks = <2>;
 254                                 atmel,can-isoc;
 255                         };
 256                 };
 257
 258                 usb1: ohci@00500000 {
 259                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 260                         reg = <0x00500000 0x100000>;
 261                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 262                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
 263                         clock-names = "ohci_clk", "hclk", "uhpck";
 264                         status = "disabled";
 265                 };
 266
 267                 usb2: ehci@00600000 {
 268                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 269                         reg = <0x00600000 0x100000>;
 270                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 271                         clocks = <&utmi>, <&uhphs_clk>;
 272                         clock-names = "usb_clk", "ehci_clk";
 273                         status = "disabled";
 274                 };
 275
 276                 L2: cache-controller@00a00000 {
 277                         compatible = "arm,pl310-cache";
 278                         reg = <0x00a00000 0x1000>;
 279                         interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
 280                         cache-unified;
 281                         cache-level = <2>;
 282                 };
 283
 284                 nand0: nand@80000000 {
 285                         compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 286                         #address-cells = <1>;
 287                         #size-cells = <1>;
 288                         ranges;
 289                         reg = < 0x80000000 0x08000000   /* EBI CS3 */
 290                                 0xfc05c070 0x00000490   /* SMC PMECC regs */
 291                                 0xfc05c500 0x00000100   /* SMC PMECC Error Location regs */
 292                                 >;
 293                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
 294                         atmel,nand-addr-offset = <21>;
 295                         atmel,nand-cmd-offset = <22>;
 296                         atmel,nand-has-dma;
 297                         pinctrl-names = "default";
 298                         pinctrl-0 = <&pinctrl_nand>;
 299                         status = "disabled";
 300
 301                         nfc@90000000 {
 302                                 compatible = "atmel,sama5d3-nfc";
 303                                 #address-cells = <1>;
 304                                 #size-cells = <1>;
 305                                 reg = <
 306                                         0x90000000 0x08000000   /* NFC Command Registers */
 307                                         0xfc05c000 0x00000070   /* NFC HSMC regs */
 308                                         0x00100000 0x00100000   /* NFC SRAM banks */
 309                                          >;
 310                                 clocks = <&hsmc_clk>;
 311                                 atmel,write-by-sram;
 312                         };
 313                 };
 314
 315                 apb {
 316                         compatible = "simple-bus";
 317                         #address-cells = <1>;
 318                         #size-cells = <1>;
 319                         ranges;
 320                         u-boot,dm-pre-reloc;
 321
 322                         hlcdc: hlcdc@f0000000 {
 323                                 compatible = "atmel,sama5d4-hlcdc";
 324                                 reg = <0xf0000000 0x4000>;
 325                                 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
 326                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 327                                 clock-names = "periph_clk","sys_clk", "slow_clk";
 328                                 status = "disabled";
 329
 330                                 hlcdc-display-controller {
 331                                         compatible = "atmel,hlcdc-display-controller";
 332                                         #address-cells = <1>;
 333                                         #size-cells = <0>;
 334
 335                                         port@0 {
 336                                                 #address-cells = <1>;
 337                                                 #size-cells = <0>;
 338                                                 reg = <0>;
 339                                         };
 340                                 };
 341
 342                                 hlcdc_pwm: hlcdc-pwm {
 343                                         compatible = "atmel,hlcdc-pwm";
 344                                         pinctrl-names = "default";
 345                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 346                                         #pwm-cells = <3>;
 347                                 };
 348                         };
 349
 350                         dma1: dma-controller@f0004000 {
 351                                 compatible = "atmel,sama5d4-dma";
 352                                 reg = <0xf0004000 0x200>;
 353                                 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
 354                                 #dma-cells = <1>;
 355                                 clocks = <&dma1_clk>;
 356                                 clock-names = "dma_clk";
 357                         };
 358
 359                         isi: isi@f0008000 {
 360                                 compatible = "atmel,at91sam9g45-isi";
 361                                 reg = <0xf0008000 0x4000>;
 362                                 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
 363                                 pinctrl-names = "default";
 364                                 pinctrl-0 = <&pinctrl_isi_data_0_7>;
 365                                 clocks = <&isi_clk>;
 366                                 clock-names = "isi_clk";
 367                                 status = "disabled";
 368                                 port {
 369                                         #address-cells = <1>;
 370                                         #size-cells = <0>;
 371                                 };
 372                         };
 373
 374                         ramc0: ramc@f0010000 {
 375                                 compatible = "atmel,sama5d3-ddramc";
 376                                 reg = <0xf0010000 0x200>;
 377                                 clocks = <&ddrck>, <&mpddr_clk>;
 378                                 clock-names = "ddrck", "mpddr";
 379                         };
 380
 381                         dma0: dma-controller@f0014000 {
 382                                 compatible = "atmel,sama5d4-dma";
 383                                 reg = <0xf0014000 0x200>;
 384                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
 385                                 #dma-cells = <1>;
 386                                 clocks = <&dma0_clk>;
 387                                 clock-names = "dma_clk";
 388                         };
 389
 390                         pmc: pmc@f0018000 {
 391                                 compatible = "atmel,sama5d3-pmc", "syscon";
 392                                 reg = <0xf0018000 0x120>;
 393                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 394                                 interrupt-controller;
 395                                 #address-cells = <1>;
 396                                 #size-cells = <0>;
 397                                 #interrupt-cells = <1>;
 398                                 u-boot,dm-pre-reloc;
 399
 400                                 main_rc_osc: main_rc_osc {
 401                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 402                                         #clock-cells = <0>;
 403                                         interrupt-parent = <&pmc>;
 404                                         interrupts = <AT91_PMC_MOSCRCS>;
 405                                         clock-frequency = <12000000>;
 406                                         clock-accuracy = <100000000>;
 407                                 };
 408
 409                                 main_osc: main_osc {
 410                                         compatible = "atmel,at91rm9200-clk-main-osc";
 411                                         #clock-cells = <0>;
 412                                         interrupt-parent = <&pmc>;
 413                                         interrupts = <AT91_PMC_MOSCS>;
 414                                         clocks = <&main_xtal>;
 415                                 };
 416
 417                                 main: mainck {
 418                                         compatible = "atmel,at91sam9x5-clk-main";
 419                                         #clock-cells = <0>;
 420                                         interrupt-parent = <&pmc>;
 421                                         interrupts = <AT91_PMC_MOSCSELS>;
 422                                         clocks = <&main_rc_osc &main_osc>;
 423                                         u-boot,dm-pre-reloc;
 424                                 };
 425
 426                                 plla: pllack@0 {
 427                                         compatible = "atmel,sama5d3-clk-pll";
 428                                         #clock-cells = <0>;
 429                                         interrupt-parent = <&pmc>;
 430                                         interrupts = <AT91_PMC_LOCKA>;
 431                                         clocks = <&main>;
 432                                         reg = <0>;
 433                                         atmel,clk-input-range = <12000000 12000000>;
 434                                         #atmel,pll-clk-output-range-cells = <4>;
 435                                         atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
 436                                 };
 437
 438                                 plladiv: plladivck {
 439                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 440                                         #clock-cells = <0>;
 441                                         clocks = <&plla>;
 442                                 };
 443
 444                                 utmi: utmick {
 445                                         compatible = "atmel,at91sam9x5-clk-utmi";
 446                                         #clock-cells = <0>;
 447                                         interrupt-parent = <&pmc>;
 448                                         interrupts = <AT91_PMC_LOCKU>;
 449                                         clocks = <&main>;
 450                                         u-boot,dm-pre-reloc;
 451                                 };
 452
 453                                 mck: masterck {
 454                                         compatible = "atmel,at91sam9x5-clk-master";
 455                                         #clock-cells = <0>;
 456                                         interrupt-parent = <&pmc>;
 457                                         interrupts = <AT91_PMC_MCKRDY>;
 458                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 459                                         atmel,clk-output-range = <125000000 200000000>;
 460                                         atmel,clk-divisors = <1 2 4 3>;
 461                                 };
 462
 463                                 h32ck: h32mxck {
 464                                         #clock-cells = <0>;
 465                                         compatible = "atmel,sama5d4-clk-h32mx";
 466                                         clocks = <&mck>;
 467                                         u-boot,dm-pre-reloc;
 468                                 };
 469
 470                                 usb: usbck {
 471                                         compatible = "atmel,at91sam9x5-clk-usb";
 472                                         #clock-cells = <0>;
 473                                         clocks = <&plladiv>, <&utmi>;
 474                                 };
 475
 476                                 prog: progck {
 477                                         compatible = "atmel,at91sam9x5-clk-programmable";
 478                                         #address-cells = <1>;
 479                                         #size-cells = <0>;
 480                                         interrupt-parent = <&pmc>;
 481                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 482
 483                                         prog0: prog@0 {
 484                                                 #clock-cells = <0>;
 485                                                 reg = <0>;
 486                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 487                                         };
 488
 489                                         prog1: prog@1 {
 490                                                 #clock-cells = <0>;
 491                                                 reg = <1>;
 492                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 493                                         };
 494
 495                                         prog2: prog@2 {
 496                                                 #clock-cells = <0>;
 497                                                 reg = <2>;
 498                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 499                                         };
 500                                 };
 501
 502                                 smd: smdclk {
 503                                         compatible = "atmel,at91sam9x5-clk-smd";
 504                                         #clock-cells = <0>;
 505                                         clocks = <&plladiv>, <&utmi>;
 506                                 };
 507
 508                                 systemck {
 509                                         compatible = "atmel,at91rm9200-clk-system";
 510                                         #address-cells = <1>;
 511                                         #size-cells = <0>;
 512                                         u-boot,dm-pre-reloc;
 513
 514                                         ddrck: ddrck@2 {
 515                                                 #clock-cells = <0>;
 516                                                 reg = <2>;
 517                                                 clocks = <&mck>;
 518                                         };
 519
 520                                         lcdck: lcdck@3 {
 521                                                 #clock-cells = <0>;
 522                                                 reg = <3>;
 523                                                 clocks = <&mck>;
 524                                         };
 525
 526                                         smdck: smdck@4 {
 527                                                 #clock-cells = <0>;
 528                                                 reg = <4>;
 529                                                 clocks = <&smd>;
 530                                         };
 531
 532                                         uhpck: uhpcki@6 {
 533                                                 #clock-cells = <0>;
 534                                                 reg = <6>;
 535                                                 clocks = <&usb>;
 536                                         };
 537
 538                                         udpck: udpck@7 {
 539                                                 #clock-cells = <0>;
 540                                                 reg = <7>;
 541                                                 clocks = <&usb>;
 542                                         };
 543
 544                                         pck0: pck0@8 {
 545                                                 #clock-cells = <0>;
 546                                                 reg = <8>;
 547                                                 clocks = <&prog0>;
 548                                         };
 549
 550                                         pck1: pck1@9 {
 551                                                 #clock-cells = <0>;
 552                                                 reg = <9>;
 553                                                 clocks = <&prog1>;
 554                                         };
 555
 556                                         pck2: pck2@10 {
 557                                                 #clock-cells = <0>;
 558                                                 reg = <10>;
 559                                                 clocks = <&prog2>;
 560                                         };
 561                                 };
 562
 563                                 periph32ck {
 564                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 565                                         #address-cells = <1>;
 566                                         #size-cells = <0>;
 567                                         clocks = <&h32ck>;
 568                                         u-boot,dm-pre-reloc;
 569
 570                                         pioD_clk: pioD_clk@5 {
 571                                                 u-boot,dm-pre-reloc;
 572                                                 #clock-cells = <0>;
 573                                                 reg = <5>;
 574                                         };
 575
 576                                         usart0_clk: usart0_clk@6 {
 577                                                 #clock-cells = <0>;
 578                                                 reg = <6>;
 579                                         };
 580
 581                                         usart1_clk: usart1_clk@7 {
 582                                                 #clock-cells = <0>;
 583                                                 reg = <7>;
 584                                         };
 585
 586                                         icm_clk: icm_clk@9 {
 587                                                 #clock-cells = <0>;
 588                                                 reg = <9>;
 589                                         };
 590
 591                                         aes_clk: aes_clk@12 {
 592                                                 #clock-cells = <0>;
 593                                                 reg = <12>;
 594                                         };
 595
 596                                         tdes_clk: tdes_clk@14 {
 597                                                 #clock-cells = <0>;
 598                                                 reg = <14>;
 599                                         };
 600
 601                                         sha_clk: sha_clk@15 {
 602                                                 #clock-cells = <0>;
 603                                                 reg = <15>;
 604                                         };
 605
 606                                         matrix1_clk: matrix1_clk@17 {
 607                                                 #clock-cells = <0>;
 608                                                 reg = <17>;
 609                                         };
 610
 611                                         hsmc_clk: hsmc_clk@22 {
 612                                                 #clock-cells = <0>;
 613                                                 reg = <22>;
 614                                         };
 615
 616                                         pioA_clk: pioA_clk@23 {
 617                                                 u-boot,dm-pre-reloc;
 618                                                 #clock-cells = <0>;
 619                                                 reg = <23>;
 620                                         };
 621
 622                                         pioB_clk: pioB_clk@24 {
 623                                                 u-boot,dm-pre-reloc;
 624                                                 #clock-cells = <0>;
 625                                                 reg = <24>;
 626                                         };
 627
 628                                         pioC_clk: pioC_clk@25 {
 629                                                 u-boot,dm-pre-reloc;
 630                                                 #clock-cells = <0>;
 631                                                 reg = <25>;
 632                                         };
 633
 634                                         pioE_clk: pioE_clk@26 {
 635                                                 u-boot,dm-pre-reloc;
 636                                                 #clock-cells = <0>;
 637                                                 reg = <26>;
 638                                         };
 639
 640                                         uart0_clk: uart0_clk@27 {
 641                                                 #clock-cells = <0>;
 642                                                 reg = <27>;
 643                                         };
 644
 645                                         uart1_clk: uart1_clk@28 {
 646                                                 #clock-cells = <0>;
 647                                                 reg = <28>;
 648                                         };
 649
 650                                         usart2_clk: usart2_clk@29 {
 651                                                 #clock-cells = <0>;
 652                                                 reg = <29>;
 653                                         };
 654
 655                                         usart3_clk: usart3_clk@30 {
 656                                                 u-boot,dm-pre-reloc;
 657                                                 #clock-cells = <0>;
 658                                                 reg = <30>;
 659                                         };
 660
 661                                         usart4_clk: usart4_clk@31 {
 662                                                 #clock-cells = <0>;
 663                                                 reg = <31>;
 664                                         };
 665
 666                                         twi0_clk: twi0_clk@32 {
 667                                                 reg = <32>;
 668                                                 #clock-cells = <0>;
 669                                         };
 670
 671                                         twi1_clk: twi1_clk@33 {
 672                                                 #clock-cells = <0>;
 673                                                 reg = <33>;
 674                                         };
 675
 676                                         twi2_clk: twi2_clk@34 {
 677                                                 #clock-cells = <0>;
 678                                                 reg = <34>;
 679                                         };
 680
 681                                         mci0_clk: mci0_clk@35 {
 682                                                 #clock-cells = <0>;
 683                                                 reg = <35>;
 684                                         };
 685
 686                                         mci1_clk: mci1_clk@36 {
 687                                                 u-boot,dm-pre-reloc;
 688                                                 #clock-cells = <0>;
 689                                                 reg = <36>;
 690                                         };
 691
 692                                         spi0_clk: spi0_clk@37 {
 693                                                 u-boot,dm-pre-reloc;
 694                                                 #clock-cells = <0>;
 695                                                 reg = <37>;
 696                                         };
 697
 698                                         spi1_clk: spi1_clk@38 {
 699                                                 #clock-cells = <0>;
 700                                                 reg = <38>;
 701                                         };
 702
 703                                         spi2_clk: spi2_clk@39 {
 704                                                 #clock-cells = <0>;
 705                                                 reg = <39>;
 706                                         };
 707
 708                                         tcb0_clk: tcb0_clk@40 {
 709                                                 #clock-cells = <0>;
 710                                                 reg = <40>;
 711                                         };
 712
 713                                         tcb1_clk: tcb1_clk@41 {
 714                                                 #clock-cells = <0>;
 715                                                 reg = <41>;
 716                                         };
 717
 718                                         tcb2_clk: tcb2_clk@42 {
 719                                                 #clock-cells = <0>;
 720                                                 reg = <42>;
 721                                         };
 722
 723                                         pwm_clk: pwm_clk@43 {
 724                                                 #clock-cells = <0>;
 725                                                 reg = <43>;
 726                                         };
 727
 728                                         adc_clk: adc_clk@44 {
 729                                                 #clock-cells = <0>;
 730                                                 reg = <44>;
 731                                         };
 732
 733                                         dbgu_clk: dbgu_clk@45 {
 734                                                 #clock-cells = <0>;
 735                                                 reg = <45>;
 736                                         };
 737
 738                                         uhphs_clk: uhphs_clk@46 {
 739                                                 #clock-cells = <0>;
 740                                                 reg = <46>;
 741                                         };
 742
 743                                         udphs_clk: udphs_clk@47 {
 744                                                 #clock-cells = <0>;
 745                                                 reg = <47>;
 746                                         };
 747
 748                                         ssc0_clk: ssc0_clki@48 {
 749                                                 #clock-cells = <0>;
 750                                                 reg = <48>;
 751                                         };
 752
 753                                         ssc1_clk: ssc1_clk@49 {
 754                                                 #clock-cells = <0>;
 755                                                 reg = <49>;
 756                                         };
 757
 758                                         trng_clk: trng_clk@53 {
 759                                                 #clock-cells = <0>;
 760                                                 reg = <53>;
 761                                         };
 762
 763                                         macb0_clk: macb0_clk@54 {
 764                                                 #clock-cells = <0>;
 765                                                 reg = <54>;
 766                                         };
 767
 768                                         macb1_clk: macb1_clk@55 {
 769                                                 #clock-cells = <0>;
 770                                                 reg = <55>;
 771                                         };
 772
 773                                         fuse_clk: fuse_clk@57 {
 774                                                 #clock-cells = <0>;
 775                                                 reg = <57>;
 776                                         };
 777
 778                                         securam_clk: securam_clk@59 {
 779                                                 #clock-cells = <0>;
 780                                                 reg = <59>;
 781                                         };
 782
 783                                         smd_clk: smd_clk@61 {
 784                                                 #clock-cells = <0>;
 785                                                 reg = <61>;
 786                                         };
 787
 788                                         twi3_clk: twi3_clk@62 {
 789                                                 #clock-cells = <0>;
 790                                                 reg = <62>;
 791                                         };
 792
 793                                         catb_clk: catb_clk@63 {
 794                                                 #clock-cells = <0>;
 795                                                 reg = <63>;
 796                                         };
 797                                 };
 798
 799                                 periph64ck {
 800                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 801                                         #address-cells = <1>;
 802                                         #size-cells = <0>;
 803                                         clocks = <&mck>;
 804
 805                                         dma0_clk: dma0_clk@8 {
 806                                                 #clock-cells = <0>;
 807                                                 reg = <8>;
 808                                         };
 809
 810                                         cpkcc_clk: cpkcc_clk@10 {
 811                                                 #clock-cells = <0>;
 812                                                 reg = <10>;
 813                                         };
 814
 815                                         aesb_clk: aesb_clk@13 {
 816                                                 #clock-cells = <0>;
 817                                                 reg = <13>;
 818                                         };
 819
 820                                         mpddr_clk: mpddr_clk@16 {
 821                                                 #clock-cells = <0>;
 822                                                 reg = <16>;
 823                                         };
 824
 825                                         matrix0_clk: matrix0_clk@18 {
 826                                                 #clock-cells = <0>;
 827                                                 reg = <18>;
 828                                         };
 829
 830                                         vdec_clk: vdec_clk@19 {
 831                                                 #clock-cells = <0>;
 832                                                 reg = <19>;
 833                                         };
 834
 835                                         dma1_clk: dma1_clk@50 {
 836                                                 #clock-cells = <0>;
 837                                                 reg = <50>;
 838                                         };
 839
 840                                         lcdc_clk: lcdc_clk@51 {
 841                                                 #clock-cells = <0>;
 842                                                 reg = <51>;
 843                                         };
 844
 845                                         isi_clk: isi_clk@52 {
 846                                                 #clock-cells = <0>;
 847                                                 reg = <52>;
 848                                         };
 849                                 };
 850                         };
 851
 852                         mmc0: mmc@f8000000 {
 853                                 compatible = "atmel,hsmci";
 854                                 reg = <0xf8000000 0x600>;
 855                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 856                                 dmas = <&dma1
 857                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 858                                         | AT91_XDMAC_DT_PERID(0))>;
 859                                 dma-names = "rxtx";
 860                                 pinctrl-names = "default";
 861                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
 862                                 status = "disabled";
 863                                 #address-cells = <1>;
 864                                 #size-cells = <0>;
 865                                 clocks = <&mci0_clk>;
 866                                 clock-names = "mci_clk";
 867                         };
 868
 869                         uart0: serial@f8004000 {
 870                                 compatible = "atmel,at91sam9260-usart";
 871                                 reg = <0xf8004000 0x100>;
 872                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
 873                                 dmas = <&dma1
 874                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 875                                         | AT91_XDMAC_DT_PERID(22))>,
 876                                        <&dma1
 877                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 878                                         | AT91_XDMAC_DT_PERID(23))>;
 879                                 dma-names = "tx", "rx";
 880                                 pinctrl-names = "default";
 881                                 pinctrl-0 = <&pinctrl_uart0>;
 882                                 clocks = <&uart0_clk>;
 883                                 clock-names = "usart";
 884                                 status = "disabled";
 885                         };
 886
 887                         ssc0: ssc@f8008000 {
 888                                 compatible = "atmel,at91sam9g45-ssc";
 889                                 reg = <0xf8008000 0x4000>;
 890                                 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
 891                                 pinctrl-names = "default";
 892                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 893                                 dmas = <&dma1
 894                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 895                                         | AT91_XDMAC_DT_PERID(26))>,
 896                                        <&dma1
 897                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 898                                         | AT91_XDMAC_DT_PERID(27))>;
 899                                 dma-names = "tx", "rx";
 900                                 clocks = <&ssc0_clk>;
 901                                 clock-names = "pclk";
 902                                 status = "disabled";
 903                         };
 904
 905                         pwm0: pwm@f800c000 {
 906                                 compatible = "atmel,sama5d3-pwm";
 907                                 reg = <0xf800c000 0x300>;
 908                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
 909                                 #pwm-cells = <3>;
 910                                 clocks = <&pwm_clk>;
 911                                 status = "disabled";
 912                         };
 913
 914                         spi0: spi@f8010000 {
 915                                 #address-cells = <1>;
 916                                 #size-cells = <0>;
 917                                 compatible = "atmel,at91rm9200-spi";
 918                                 reg = <0xf8010000 0x100>;
 919                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
 920                                 dmas = <&dma1
 921                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 922                                         | AT91_XDMAC_DT_PERID(10))>,
 923                                        <&dma1
 924                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 925                                         | AT91_XDMAC_DT_PERID(11))>;
 926                                 dma-names = "tx", "rx";
 927                                 pinctrl-names = "default";
 928                                 pinctrl-0 = <&pinctrl_spi0>;
 929                                 clocks = <&spi0_clk>;
 930                                 clock-names = "spi_clk";
 931                                 status = "disabled";
 932                         };
 933
 934                         i2c0: i2c@f8014000 {
 935                                 compatible = "atmel,sama5d4-i2c";
 936                                 reg = <0xf8014000 0x4000>;
 937                                 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
 938                                 dmas = <&dma1
 939                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 940                                         | AT91_XDMAC_DT_PERID(2))>,
 941                                        <&dma1
 942                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 943                                         | AT91_XDMAC_DT_PERID(3))>;
 944                                 dma-names = "tx", "rx";
 945                                 pinctrl-names = "default";
 946                                 pinctrl-0 = <&pinctrl_i2c0>;
 947                                 #address-cells = <1>;
 948                                 #size-cells = <0>;
 949                                 clocks = <&twi0_clk>;
 950                                 status = "disabled";
 951                         };
 952
 953                         i2c1: i2c@f8018000 {
 954                                 compatible = "atmel,sama5d4-i2c";
 955                                 reg = <0xf8018000 0x4000>;
 956                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
 957                                 dmas = <&dma1
 958                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 959                                         | AT91_XDMAC_DT_PERID(4))>,
 960                                        <&dma1
 961                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 962                                         | AT91_XDMAC_DT_PERID(5))>;
 963                                 dma-names = "tx", "rx";
 964                                 pinctrl-names = "default";
 965                                 pinctrl-0 = <&pinctrl_i2c1>;
 966                                 #address-cells = <1>;
 967                                 #size-cells = <0>;
 968                                 clocks = <&twi1_clk>;
 969                                 status = "disabled";
 970                         };
 971
 972                         tcb0: timer@f801c000 {
 973                                 compatible = "atmel,at91sam9x5-tcb";
 974                                 reg = <0xf801c000 0x100>;
 975                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
 976                                 clocks = <&tcb0_clk>, <&clk32k>;
 977                                 clock-names = "t0_clk", "slow_clk";
 978                         };
 979
 980                         macb0: ethernet@f8020000 {
 981                                 compatible = "atmel,sama5d4-gem";
 982                                 reg = <0xf8020000 0x100>;
 983                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
 984                                 pinctrl-names = "default";
 985                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
 986                                 #address-cells = <1>;
 987                                 #size-cells = <0>;
 988                                 clocks = <&macb0_clk>, <&macb0_clk>;
 989                                 clock-names = "hclk", "pclk";
 990                                 status = "disabled";
 991                         };
 992
 993                         i2c2: i2c@f8024000 {
 994                                 compatible = "atmel,sama5d4-i2c";
 995                                 reg = <0xf8024000 0x4000>;
 996                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
 997                                 dmas = <&dma1
 998                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 999                                         | AT91_XDMAC_DT_PERID(6))>,
1000                                        <&dma1
1001                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1002                                         | AT91_XDMAC_DT_PERID(7))>;
1003                                 dma-names = "tx", "rx";
1004                                 pinctrl-names = "default";
1005                                 pinctrl-0 = <&pinctrl_i2c2>;
1006                                 #address-cells = <1>;
1007                                 #size-cells = <0>;
1008                                 clocks = <&twi2_clk>;
1009                                 status = "disabled";
1010                         };
1011
1012                         sfr: sfr@f8028000 {
1013                                 compatible = "atmel,sama5d4-sfr", "syscon";
1014                                 reg = <0xf8028000 0x60>;
1015                         };
1016
1017                         usart0: serial@f802c000 {
1018                                 compatible = "atmel,at91sam9260-usart";
1019                                 reg = <0xf802c000 0x100>;
1020                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
1021                                 dmas = <&dma0
1022                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1023                                         | AT91_XDMAC_DT_PERID(36))>,
1024                                        <&dma0
1025                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1026                                         | AT91_XDMAC_DT_PERID(37))>;
1027                                 dma-names = "tx", "rx";
1028                                 pinctrl-names = "default";
1029                                 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
1030                                 clocks = <&usart0_clk>;
1031                                 clock-names = "usart";
1032                                 status = "disabled";
1033                         };
1034
1035                         usart1: serial@f8030000 {
1036                                 compatible = "atmel,at91sam9260-usart";
1037                                 reg = <0xf8030000 0x100>;
1038                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
1039                                 dmas = <&dma0
1040                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1041                                         | AT91_XDMAC_DT_PERID(38))>,
1042                                        <&dma0
1043                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1044                                         | AT91_XDMAC_DT_PERID(39))>;
1045                                 dma-names = "tx", "rx";
1046                                 pinctrl-names = "default";
1047                                 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
1048                                 clocks = <&usart1_clk>;
1049                                 clock-names = "usart";
1050                                 status = "disabled";
1051                         };
1052
1053                         mmc1: mmc@fc000000 {
1054                                 compatible = "atmel,hsmci";
1055                                 reg = <0xfc000000 0x600>;
1056                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
1057                                 dmas = <&dma1
1058                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1059                                         | AT91_XDMAC_DT_PERID(1))>;
1060                                 dma-names = "rxtx";
1061                                 pinctrl-names = "default";
1062                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
1063                                 status = "disabled";
1064                                 #address-cells = <1>;
1065                                 #size-cells = <0>;
1066                                 clocks = <&mci1_clk>;
1067                                 clock-names = "mci_clk";
1068                         };
1069
1070                         uart1: serial@fc004000 {
1071                                 compatible = "atmel,at91sam9260-usart";
1072                                 reg = <0xfc004000 0x100>;
1073                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
1074                                 dmas = <&dma1
1075                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1076                                         | AT91_XDMAC_DT_PERID(24))>,
1077                                        <&dma1
1078                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1079                                         | AT91_XDMAC_DT_PERID(25))>;
1080                                 dma-names = "tx", "rx";
1081                                 pinctrl-names = "default";
1082                                 pinctrl-0 = <&pinctrl_uart1>;
1083                                 clocks = <&uart1_clk>;
1084                                 clock-names = "usart";
1085                                 status = "disabled";
1086                         };
1087
1088                         usart2: serial@fc008000 {
1089                                 compatible = "atmel,at91sam9260-usart";
1090                                 reg = <0xfc008000 0x100>;
1091                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
1092                                 dmas = <&dma1
1093                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1094                                         | AT91_XDMAC_DT_PERID(16))>,
1095                                        <&dma1
1096                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1097                                         | AT91_XDMAC_DT_PERID(17))>;
1098                                 dma-names = "tx", "rx";
1099                                 pinctrl-names = "default";
1100                                 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
1101                                 clocks = <&usart2_clk>;
1102                                 clock-names = "usart";
1103                                 status = "disabled";
1104                         };
1105
1106                         usart3: serial@fc00c000 {
1107                                 compatible = "atmel,at91sam9260-usart";
1108                                 reg = <0xfc00c000 0x100>;
1109                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
1110                                 dmas = <&dma1
1111                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1112                                         | AT91_XDMAC_DT_PERID(18))>,
1113                                        <&dma1
1114                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1115                                         | AT91_XDMAC_DT_PERID(19))>;
1116                                 dma-names = "tx", "rx";
1117                                 pinctrl-names = "default";
1118                                 pinctrl-0 = <&pinctrl_usart3>;
1119                                 clocks = <&usart3_clk>;
1120                                 clock-names = "usart";
1121                                 status = "disabled";
1122                         };
1123
1124                         usart4: serial@fc010000 {
1125                                 compatible = "atmel,at91sam9260-usart";
1126                                 reg = <0xfc010000 0x100>;
1127                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
1128                                 dmas = <&dma1
1129                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1130                                         | AT91_XDMAC_DT_PERID(20))>,
1131                                        <&dma1
1132                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1133                                         | AT91_XDMAC_DT_PERID(21))>;
1134                                 dma-names = "tx", "rx";
1135                                 pinctrl-names = "default";
1136                                 pinctrl-0 = <&pinctrl_usart4>;
1137                                 clocks = <&usart4_clk>;
1138                                 clock-names = "usart";
1139                                 status = "disabled";
1140                         };
1141
1142                         ssc1: ssc@fc014000 {
1143                                 compatible = "atmel,at91sam9g45-ssc";
1144                                 reg = <0xfc014000 0x4000>;
1145                                 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
1146                                 pinctrl-names = "default";
1147                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1148                                 dmas = <&dma1
1149                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1150                                         | AT91_XDMAC_DT_PERID(28))>,
1151                                        <&dma1
1152                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1153                                         | AT91_XDMAC_DT_PERID(29))>;
1154                                 dma-names = "tx", "rx";
1155                                 clocks = <&ssc1_clk>;
1156                                 clock-names = "pclk";
1157                                 status = "disabled";
1158                         };
1159
1160                         spi1: spi@fc018000 {
1161                                 #address-cells = <1>;
1162                                 #size-cells = <0>;
1163                                 compatible = "atmel,at91rm9200-spi";
1164                                 reg = <0xfc018000 0x100>;
1165                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
1166                                 dmas = <&dma1
1167                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1168                                         | AT91_XDMAC_DT_PERID(12))>,
1169                                        <&dma1
1170                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1171                                         | AT91_XDMAC_DT_PERID(13))>;
1172                                 dma-names = "tx", "rx";
1173                                 pinctrl-names = "default";
1174                                 pinctrl-0 = <&pinctrl_spi1>;
1175                                 clocks = <&spi1_clk>;
1176                                 clock-names = "spi_clk";
1177                                 status = "disabled";
1178                         };
1179
1180                         spi2: spi@fc01c000 {
1181                                 #address-cells = <1>;
1182                                 #size-cells = <0>;
1183                                 compatible = "atmel,at91rm9200-spi";
1184                                 reg = <0xfc01c000 0x100>;
1185                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
1186                                 dmas = <&dma1
1187                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1188                                         | AT91_XDMAC_DT_PERID(14))>,
1189                                        <&dma1
1190                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1191                                         | AT91_XDMAC_DT_PERID(15))>;
1192                                 dma-names = "tx", "rx";
1193                                 pinctrl-names = "default";
1194                                 pinctrl-0 = <&pinctrl_spi2>;
1195                                 clocks = <&spi2_clk>;
1196                                 clock-names = "spi_clk";
1197                                 status = "disabled";
1198                         };
1199
1200                         tcb1: timer@fc020000 {
1201                                 compatible = "atmel,at91sam9x5-tcb";
1202                                 reg = <0xfc020000 0x100>;
1203                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
1204                                 clocks = <&tcb1_clk>, <&clk32k>;
1205                                 clock-names = "t0_clk", "slow_clk";
1206                         };
1207
1208                         macb1: ethernet@fc028000 {
1209                                 compatible = "atmel,sama5d4-gem";
1210                                 reg = <0xfc028000 0x100>;
1211                                 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
1212                                 pinctrl-names = "default";
1213                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
1214                                 #address-cells = <1>;
1215                                 #size-cells = <0>;
1216                                 clocks = <&macb1_clk>, <&macb1_clk>;
1217                                 clock-names = "hclk", "pclk";
1218                                 status = "disabled";
1219                         };
1220
1221                         trng@fc030000 {
1222                                 compatible = "atmel,at91sam9g45-trng";
1223                                 reg = <0xfc030000 0x100>;
1224                                 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
1225                                 clocks = <&trng_clk>;
1226                         };
1227
1228                         adc0: adc@fc034000 {
1229                                 compatible = "atmel,at91sam9x5-adc";
1230                                 reg = <0xfc034000 0x100>;
1231                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
1232                                 clocks = <&adc_clk>,
1233                                          <&adc_op_clk>;
1234                                 clock-names = "adc_clk", "adc_op_clk";
1235                                 atmel,adc-channels-used = <0x01f>;
1236                                 atmel,adc-startup-time = <40>;
1237                                 atmel,adc-use-external-triggers;
1238                                 atmel,adc-vref = <3000>;
1239                                 atmel,adc-res = <8 10>;
1240                                 atmel,adc-sample-hold-time = <11>;
1241                                 atmel,adc-res-names = "lowres", "highres";
1242                                 atmel,adc-ts-pressure-threshold = <10000>;
1243                                 #address-cells = <1>;
1244                                 #size-cells = <0>;
1245                                 status = "disabled";
1246
1247                                 trigger@0 {
1248                                         trigger-name = "external-rising";
1249                                         trigger-value = <0x1>;
1250                                         trigger-external;
1251                                         reg = <0>;
1252                                 };
1253                                 trigger@1 {
1254                                         trigger-name = "external-falling";
1255                                         trigger-value = <0x2>;
1256                                         trigger-external;
1257                                         reg = <1>;
1258                                 };
1259                                 trigger@2 {
1260                                         trigger-name = "external-any";
1261                                         trigger-value = <0x3>;
1262                                         trigger-external;
1263                                         reg = <2>;
1264                                 };
1265                                 trigger@3 {
1266                                         trigger-name = "continuous";
1267                                         trigger-value = <0x6>;
1268                                         reg = <3>;
1269                                 };
1270                         };
1271
1272                         aes@fc044000 {
1273                                 compatible = "atmel,at91sam9g46-aes";
1274                                 reg = <0xfc044000 0x100>;
1275                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
1276                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1277                                         | AT91_XDMAC_DT_PERID(41))>,
1278                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1279                                         | AT91_XDMAC_DT_PERID(40))>;
1280                                 dma-names = "tx", "rx";
1281                                 clocks = <&aes_clk>;
1282                                 clock-names = "aes_clk";
1283                                 status = "okay";
1284                         };
1285
1286                         tdes@fc04c000 {
1287                                 compatible = "atmel,at91sam9g46-tdes";
1288                                 reg = <0xfc04c000 0x100>;
1289                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
1290                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1291                                         | AT91_XDMAC_DT_PERID(42))>,
1292                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1293                                         | AT91_XDMAC_DT_PERID(43))>;
1294                                 dma-names = "tx", "rx";
1295                                 clocks = <&tdes_clk>;
1296                                 clock-names = "tdes_clk";
1297                                 status = "okay";
1298                         };
1299
1300                         sha@fc050000 {
1301                                 compatible = "atmel,at91sam9g46-sha";
1302                                 reg = <0xfc050000 0x100>;
1303                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
1304                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1305                                         | AT91_XDMAC_DT_PERID(44))>;
1306                                 dma-names = "tx";
1307                                 clocks = <&sha_clk>;
1308                                 clock-names = "sha_clk";
1309                                 status = "okay";
1310                         };
1311
1312                         rstc@fc068600 {
1313                                 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1314                                 reg = <0xfc068600 0x10>;
1315                                 clocks = <&clk32k>;
1316                         };
1317
1318                         shdwc@fc068610 {
1319                                 compatible = "atmel,at91sam9x5-shdwc";
1320                                 reg = <0xfc068610 0x10>;
1321                                 clocks = <&clk32k>;
1322                         };
1323
1324                         pit: timer@fc068630 {
1325                                 compatible = "atmel,at91sam9260-pit";
1326                                 reg = <0xfc068630 0x10>;
1327                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1328                                 clocks = <&h32ck>;
1329                         };
1330
1331                         watchdog@fc068640 {
1332                                 compatible = "atmel,sama5d4-wdt";
1333                                 reg = <0xfc068640 0x10>;
1334                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1335                                 clocks = <&clk32k>;
1336                                 status = "disabled";
1337                         };
1338
1339                         sckc@fc068650 {
1340                                 compatible = "atmel,at91sam9x5-sckc";
1341                                 reg = <0xfc068650 0x4>;
1342
1343                                 slow_rc_osc: slow_rc_osc {
1344                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1345                                         #clock-cells = <0>;
1346                                         clock-frequency = <32768>;
1347                                         clock-accuracy = <250000000>;
1348                                         atmel,startup-time-usec = <75>;
1349                                 };
1350
1351                                 slow_osc: slow_osc {
1352                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1353                                         #clock-cells = <0>;
1354                                         clocks = <&slow_xtal>;
1355                                         atmel,startup-time-usec = <1200000>;
1356                                 };
1357
1358                                 clk32k: slowck {
1359                                         compatible = "atmel,at91sam9x5-clk-slow";
1360                                         #clock-cells = <0>;
1361                                         clocks = <&slow_rc_osc &slow_osc>;
1362                                 };
1363                         };
1364
1365                         rtc@fc0686b0 {
1366                                 compatible = "atmel,at91rm9200-rtc";
1367                                 reg = <0xfc0686b0 0x30>;
1368                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1369                                 clocks = <&clk32k>;
1370                         };
1371
1372                         dbgu: serial@fc069000 {
1373                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
1374                                 reg = <0xfc069000 0x200>;
1375                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1376                                 pinctrl-names = "default";
1377                                 pinctrl-0 = <&pinctrl_dbgu>;
1378                                 clocks = <&dbgu_clk>;
1379                                 clock-names = "usart";
1380                                 status = "disabled";
1381                         };
1382
1383                         pioA: gpio@fc06a000 {
1384                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1385                                 reg = <0xfc06a000 0x100>;
1386                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1387                                 #gpio-cells = <2>;
1388                                 gpio-controller;
1389                                 interrupt-controller;
1390                                 #interrupt-cells = <2>;
1391                                 clocks = <&pioA_clk>;
1392                         };
1393
1394                         pioB: gpio@fc06b000 {
1395                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1396                                 reg = <0xfc06b000 0x100>;
1397                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1398                                 #gpio-cells = <2>;
1399                                 gpio-controller;
1400                                 interrupt-controller;
1401                                 #interrupt-cells = <2>;
1402                                 clocks = <&pioB_clk>;
1403                         };
1404
1405                         pioC: gpio@fc06c000 {
1406                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1407                                 reg = <0xfc06c000 0x100>;
1408                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1409                                 #gpio-cells = <2>;
1410                                 gpio-controller;
1411                                 interrupt-controller;
1412                                 #interrupt-cells = <2>;
1413                                 clocks = <&pioC_clk>;
1414                                 u-boot,dm-pre-reloc;
1415                         };
1416
1417                         pioD: gpio@fc068000 {
1418                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1419                                 reg = <0xfc068000 0x100>;
1420                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
1421                                 #gpio-cells = <2>;
1422                                 gpio-controller;
1423                                 interrupt-controller;
1424                                 #interrupt-cells = <2>;
1425                                 clocks = <&pioD_clk>;
1426                         };
1427
1428                         pioE: gpio@fc06d000 {
1429                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1430                                 reg = <0xfc06d000 0x100>;
1431                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1432                                 #gpio-cells = <2>;
1433                                 gpio-controller;
1434                                 interrupt-controller;
1435                                 #interrupt-cells = <2>;
1436                                 clocks = <&pioE_clk>;
1437                         };
1438
1439                         pinctrl@fc06a000 {
1440                                 u-boot,dm-pre-reloc;
1441                                 #address-cells = <1>;
1442                                 #size-cells = <1>;
1443                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1444                                 ranges = <0xfc068000 0xfc068000 0x100
1445                                           0xfc06a000 0xfc06a000 0x4000>;
1446                                 /* WARNING: revisit as pin spec has changed */
1447                                 atmel,mux-mask = <
1448                                         /*   A          B          C  */
1449                                         0xffffffff 0x3ffcfe7c 0x1c010101        /* pioA */
1450                                         0x7fffffff 0xfffccc3a 0x3f00cc3a        /* pioB */
1451                                         0xffffffff 0x3ff83fff 0xff00ffff        /* pioC */
1452                                         0x0003ff00 0x8002a800 0x00000000        /* pioD */
1453                                         0xffffffff 0x7fffffff 0x76fff1bf        /* pioE */
1454                                         >;
1455                                 reg = < 0xfc06a000 0x100
1456                                         0xfc06b000 0x100
1457                                         0xfc06c000 0x100
1458                                         0xfc068000 0x100
1459                                         0xfc06d000 0x100
1460                                         >;
1461
1462                                 /* pinctrl pin settings */
1463                                 adc0 {
1464                                         pinctrl_adc0_adtrg: adc0_adtrg {
1465                                                 atmel,pins =
1466                                                         <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1467                                         };
1468                                         pinctrl_adc0_ad0: adc0_ad0 {
1469                                                 atmel,pins =
1470                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1471                                         };
1472                                         pinctrl_adc0_ad1: adc0_ad1 {
1473                                                 atmel,pins =
1474                                                         <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1475                                         };
1476                                         pinctrl_adc0_ad2: adc0_ad2 {
1477                                                 atmel,pins =
1478                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1479                                         };
1480                                         pinctrl_adc0_ad3: adc0_ad3 {
1481                                                 atmel,pins =
1482                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1483                                         };
1484                                         pinctrl_adc0_ad4: adc0_ad4 {
1485                                                 atmel,pins =
1486                                                         <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1487                                         };
1488                                 };
1489
1490                                 dbgu {
1491                                         pinctrl_dbgu: dbgu-0 {
1492                                                 atmel,pins =
1493                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,     /* conflicts with D14 and TDI */
1494                                                         <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;  /* conflicts with D15 and TDO */
1495                                         };
1496                                 };
1497
1498                                 i2c0 {
1499                                         pinctrl_i2c0: i2c0-0 {
1500                                                 atmel,pins =
1501                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1502                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1503                                         };
1504                                 };
1505
1506                                 i2c1 {
1507                                         pinctrl_i2c1: i2c1-0 {
1508                                                 atmel,pins =
1509                                                         <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* TWD1, conflicts with UART0 RX and DIBP */
1510                                                          AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1511                                         };
1512                                 };
1513
1514                                 i2c2 {
1515                                         pinctrl_i2c2: i2c2-0 {
1516                                                 atmel,pins =
1517                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* TWD2, conflicts with RD0 and PWML1 */
1518                                                          AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1519                                         };
1520                                 };
1521
1522                                 isi {
1523                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
1524                                                 atmel,pins =
1525                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D0 */
1526                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D1 */
1527                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D2 */
1528                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D3 */
1529                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D4 */
1530                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D5 */
1531                                                          AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D6 */
1532                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D7 */
1533                                                          AT91_PIOB  1 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_PCK, conflict with G0_RXCK */
1534                                                          AT91_PIOB  3 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_VSYNC */
1535                                                          AT91_PIOB  4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1536                                         };
1537                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
1538                                                 atmel,pins =
1539                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1540                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1541                                         };
1542                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
1543                                                 atmel,pins =
1544                                                         <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1545                                                          AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1546                                         };
1547                                 };
1548
1549                                 lcd {
1550                                         pinctrl_lcd_base: lcd-base-0 {
1551                                                 atmel,pins =
1552                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
1553                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
1554                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
1555                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1556                                         };
1557                                         pinctrl_lcd_pwm: lcd-pwm-0 {
1558                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
1559                                         };
1560                                         pinctrl_lcd_rgb444: lcd-rgb-0 {
1561                                                 atmel,pins =
1562                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1563                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1564                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1565                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1566                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1567                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1568                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1569                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1570                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1571                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1572                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1573                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1574                                         };
1575                                         pinctrl_lcd_rgb565: lcd-rgb-1 {
1576                                                 atmel,pins =
1577                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1578                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1579                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1580                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1581                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1582                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1583                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1584                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1585                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1586                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1587                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1588                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1589                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1590                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1591                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1592                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1593                                         };
1594                                         pinctrl_lcd_rgb666: lcd-rgb-2 {
1595                                                 atmel,pins =
1596                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1597                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1598                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1599                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1600                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1601                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1602                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1603                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1604                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1605                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1606                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1607                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1608                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1609                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1610                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1611                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1612                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1613                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1614                                         };
1615                                         pinctrl_lcd_rgb777: lcd-rgb-3 {
1616                                                 atmel,pins =
1617                                                          /* LCDDAT0 conflicts with TMS */
1618                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1619                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1620                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1621                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1622                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1623                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1624                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1625                                                          /* LCDDAT8 conflicts with TCK */
1626                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1627                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1628                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1629                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1630                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1631                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1632                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1633                                                          /* LCDDAT16 conflicts with NTRST */
1634                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1635                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1636                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1637                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1638                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1639                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1640                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1641                                         };
1642                                         pinctrl_lcd_rgb888: lcd-rgb-4 {
1643                                                 atmel,pins =
1644                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1645                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1646                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1647                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1648                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1649                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1650                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1651                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1652                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1653                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1654                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1655                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1656                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1657                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1658                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1659                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1660                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
1661                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1662                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1663                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1664                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1665                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1666                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1667                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1668                                         };
1669                                 };
1670
1671                                 macb0 {
1672                                         pinctrl_macb0_rmii: macb0_rmii-0 {
1673                                                 atmel,pins =
1674                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX0 */
1675                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX1 */
1676                                                          AT91_PIOB  8 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX0 */
1677                                                          AT91_PIOB  9 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX1 */
1678                                                          AT91_PIOB  6 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXDV */
1679                                                          AT91_PIOB  7 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXER */
1680                                                          AT91_PIOB  2 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXEN */
1681                                                          AT91_PIOB  0 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXCK */
1682                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDC */
1683                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDIO */
1684                                                         >;
1685                                         };
1686                                 };
1687
1688                                 macb1 {
1689                                         pinctrl_macb1_rmii: macb1_rmii-0 {
1690                                                 atmel,pins =
1691                                                         <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX0 */
1692                                                          AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX1 */
1693                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX0 */
1694                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX1 */
1695                                                          AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXDV */
1696                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXER */
1697                                                          AT91_PIOA  4 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXEN */
1698                                                          AT91_PIOA  2 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXCK */
1699                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDC */
1700                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDIO */
1701                                                         >;
1702                                         };
1703                                 };
1704
1705                                 mmc0 {
1706                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1707                                                 atmel,pins =
1708                                                         <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1709                                                          AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1710                                                          AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1711                                                         >;
1712                                         };
1713                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1714                                                 atmel,pins =
1715                                                         <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1716                                                          AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1717                                                          AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1718                                                         >;
1719                                         };
1720                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1721                                                 atmel,pins =
1722                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA4, conflict with NAND_D5 */
1723                                                          AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA5, conflict with NAND_D6 */
1724                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA6, conflict with NAND_D7 */
1725                                                          AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA7, conflict with NAND_OE */
1726                                                         >;
1727                                         };
1728                                 };
1729
1730                                 mmc1 {
1731                                         u-boot,dm-pre-reloc;
1732                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1733                                                 u-boot,dm-pre-reloc;
1734                                                 atmel,pins =
1735                                                         <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE           /* MCI1_CK */
1736                                                          AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_CDA */
1737                                                          AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA0 */
1738                                                         >;
1739                                         };
1740                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1741                                                 u-boot,dm-pre-reloc;
1742                                                 atmel,pins =
1743                                                         <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA1 */
1744                                                          AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA2 */
1745                                                          AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA3 */
1746                                                         >;
1747                                         };
1748                                 };
1749
1750                                 nand0 {
1751                                         pinctrl_nand: nand-0 {
1752                                                 atmel,pins =
1753                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC13 periph A Read Enable */
1754                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A Write Enable */
1755
1756                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC17 ALE */
1757                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC18 CLE */
1758
1759                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC15 NCS3/Chip Enable */
1760                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC16 NANDRDY */
1761                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC5 Data bit 0 */
1762                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 Data bit 1 */
1763                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 Data bit 2 */
1764                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 Data bit 3 */
1765                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 Data bit 4 */
1766                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 Data bit 5 */
1767                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A Data bit 6 */
1768                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1769                                         };
1770                                 };
1771
1772                                 spi0 {
1773                                         u-boot,dm-pre-reloc;
1774                                         pinctrl_spi0: spi0-0 {
1775                                                 u-boot,dm-pre-reloc;
1776                                                 atmel,pins =
1777                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MISO */
1778                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MOSI */
1779                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_SPCK */
1780                                                         >;
1781                                         };
1782                                 };
1783
1784                                 ssc0 {
1785                                         pinctrl_ssc0_tx: ssc0_tx {
1786                                                 atmel,pins =
1787                                                         <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK0 */
1788                                                          AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF0 */
1789                                                          AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1790                                         };
1791
1792                                         pinctrl_ssc0_rx: ssc0_rx {
1793                                                 atmel,pins =
1794                                                         <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK0 */
1795                                                          AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF0 */
1796                                                          AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1797                                         };
1798                                 };
1799
1800                                 ssc1 {
1801                                         pinctrl_ssc1_tx: ssc1_tx {
1802                                                 atmel,pins =
1803                                                         <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK1 */
1804                                                          AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF1 */
1805                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1806                                         };
1807
1808                                         pinctrl_ssc1_rx: ssc1_rx {
1809                                                 atmel,pins =
1810                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK1 */
1811                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF1 */
1812                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1813                                         };
1814                                 };
1815
1816                                 spi1 {
1817                                         pinctrl_spi1: spi1-0 {
1818                                                 atmel,pins =
1819                                                         <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MISO */
1820                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MOSI */
1821                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_SPCK */
1822                                                         >;
1823                                         };
1824                                 };
1825
1826                                 spi2 {
1827                                         pinctrl_spi2: spi2-0 {
1828                                                 atmel,pins =
1829                                                         <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MISO conflicts with RTS0 */
1830                                                          AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MOSI conflicts with TXD0 */
1831                                                          AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_SPCK conflicts with RTS1 */
1832                                                         >;
1833                                         };
1834                                 };
1835
1836                                 uart0 {
1837                                         pinctrl_uart0: uart0-0 {
1838                                                 atmel,pins =
1839                                                         <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1840                                                          AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1841                                                         >;
1842                                         };
1843                                 };
1844
1845                                 uart1 {
1846                                         pinctrl_uart1: uart1-0 {
1847                                                 atmel,pins =
1848                                                         <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE           /* RXD */
1849                                                          AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* TXD */
1850                                                         >;
1851                                         };
1852                                 };
1853
1854                                 usart0 {
1855                                         pinctrl_usart0: usart0-0 {
1856                                                 atmel,pins =
1857                                                         <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE           /* RXD */
1858                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* TXD */
1859                                                         >;
1860                                         };
1861                                         pinctrl_usart0_rts: usart0_rts-0 {
1862                                                 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1863                                         };
1864                                         pinctrl_usart0_cts: usart0_cts-0 {
1865                                                 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1866                                         };
1867                                 };
1868
1869                                 usart1 {
1870                                         pinctrl_usart1: usart1-0 {
1871                                                 atmel,pins =
1872                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE           /* RXD */
1873                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* TXD */
1874                                                         >;
1875                                         };
1876                                         pinctrl_usart1_rts: usart1_rts-0 {
1877                                                 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1878                                         };
1879                                         pinctrl_usart1_cts: usart1_cts-0 {
1880                                                 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1881                                         };
1882                                 };
1883
1884                                 usart2 {
1885                                         pinctrl_usart2: usart2-0 {
1886                                                 atmel,pins =
1887                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE            /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1888                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP         /* TXD - conflicts with G0_COL, PCK2 */
1889                                                         >;
1890                                         };
1891                                         pinctrl_usart2_rts: usart2_rts-0 {
1892                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with G0_RX3, PWMH1 */
1893                                         };
1894                                         pinctrl_usart2_cts: usart2_cts-0 {
1895                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;     /* conflicts with G0_TXER, ISI_VSYNC */
1896                                         };
1897                                 };
1898
1899                                 usart3 {
1900                                         u-boot,dm-pre-reloc;
1901                                         pinctrl_usart3: usart3-0 {
1902                                                 u-boot,dm-pre-reloc;
1903                                                 atmel,pins =
1904                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1905                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1906                                                         >;
1907                                         };
1908                                 };
1909
1910                                 usart4 {
1911                                         pinctrl_usart4: usart4-0 {
1912                                                 atmel,pins =
1913                                                         <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1914                                                          AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1915                                                         >;
1916                                         };
1917                                         pinctrl_usart4_rts: usart4_rts-0 {
1918                                                 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with NWAIT, A19 */
1919                                         };
1920                                         pinctrl_usart4_cts: usart4_cts-0 {
1921                                                 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>;     /* conflicts with A0/NBS0, MCI0_CDB */
1922                                         };
1923                                 };
1924                         };
1925
1926                         aic: interrupt-controller@fc06e000 {
1927                                 #interrupt-cells = <3>;
1928                                 compatible = "atmel,sama5d4-aic";
1929                                 interrupt-controller;
1930                                 reg = <0xfc06e000 0x200>;
1931                                 atmel,external-irqs = <56>;
1932                         };
1933                 };
1934         };
1935 };