1 #include "skeleton.dtsi"
4 model = "Atmel SAMA5D2 family SoC";
5 compatible = "atmel,sama5d2";
15 slow_xtal: slow_xtal {
16 compatible = "fixed-clock";
18 clock-frequency = <0>;
21 main_xtal: main_xtal {
22 compatible = "fixed-clock";
24 clock-frequency = <0>;
29 compatible = "simple-bus";
35 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
36 reg = <0x00400000 0x100000>;
37 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
38 clock-names = "ohci_clk", "hclk", "uhpck";
43 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
44 reg = <0x00500000 0x100000>;
45 clocks = <&utmi>, <&uhphs_clk>;
46 clock-names = "usb_clk", "ehci_clk";
50 sdmmc0: sdio-host@a0000000 {
51 compatible = "atmel,sama5d2-sdhci";
52 reg = <0xa0000000 0x300>;
53 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
54 clock-names = "hclock", "multclk", "baseclk";
58 sdmmc1: sdio-host@b0000000 {
59 compatible = "atmel,sama5d2-sdhci";
60 reg = <0xb0000000 0x300>;
61 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
62 clock-names = "hclock", "multclk", "baseclk";
67 compatible = "simple-bus";
72 hlcdc: hlcdc@f0000000 {
73 compatible = "atmel,at91sam9x5-hlcdc";
74 reg = <0xf0000000 0x2000>;
80 compatible = "atmel,sama5d2-pmc", "syscon";
81 reg = <0xf0014000 0x160>;
84 #interrupt-cells = <1>;
88 compatible = "atmel,at91sam9x5-clk-main";
94 compatible = "atmel,sama5d3-clk-pll";
98 atmel,clk-input-range = <12000000 12000000>;
99 #atmel,pll-clk-output-range-cells = <4>;
100 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
105 compatible = "atmel,at91sam9x5-clk-plldiv";
110 audio_pll_frac: audiopll_fracck {
111 compatible = "atmel,sama5d2-clk-audio-pll-frac";
116 audio_pll_pad: audiopll_padck {
117 compatible = "atmel,sama5d2-clk-audio-pll-pad";
119 clocks = <&audio_pll_frac>;
122 audio_pll_pmc: audiopll_pmcck {
123 compatible = "atmel,sama5d2-clk-audio-pll-pmc";
125 clocks = <&audio_pll_frac>;
129 compatible = "atmel,at91sam9x5-clk-utmi";
137 compatible = "atmel,at91sam9x5-clk-master";
139 clocks = <&main>, <&plladiv>, <&utmi>;
140 atmel,clk-output-range = <124000000 166000000>;
141 atmel,clk-divisors = <1 2 4 3>;
147 compatible = "atmel,sama5d4-clk-h32mx";
153 compatible = "atmel,at91sam9x5-clk-usb";
155 clocks = <&plladiv>, <&utmi>;
159 compatible = "atmel,at91sam9x5-clk-programmable";
160 #address-cells = <1>;
162 interrupt-parent = <&pmc>;
163 clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
182 compatible = "atmel,at91rm9200-clk-system";
183 #address-cells = <1>;
236 compatible = "atmel,at91sam9x5-clk-peripheral";
237 #address-cells = <1>;
242 macb0_clk: macb0_clk@5 {
245 atmel,clk-output-range = <0 83000000>;
248 tdes_clk: tdes_clk@11 {
251 atmel,clk-output-range = <0 83000000>;
254 matrix1_clk: matrix1_clk@14 {
259 hsmc_clk: hsmc_clk@17 {
264 pioA_clk: pioA_clk@18 {
267 atmel,clk-output-range = <0 83000000>;
271 flx0_clk: flx0_clk@19 {
274 atmel,clk-output-range = <0 83000000>;
277 flx1_clk: flx1_clk@20 {
280 atmel,clk-output-range = <0 83000000>;
283 flx2_clk: flx2_clk@21 {
286 atmel,clk-output-range = <0 83000000>;
289 flx3_clk: flx3_clk@22 {
292 atmel,clk-output-range = <0 83000000>;
295 flx4_clk: flx4_clk@23 {
298 atmel,clk-output-range = <0 83000000>;
301 uart0_clk: uart0_clk@24 {
304 atmel,clk-output-range = <0 83000000>;
308 uart1_clk: uart1_clk@25 {
311 atmel,clk-output-range = <0 83000000>;
315 uart2_clk: uart2_clk@26 {
318 atmel,clk-output-range = <0 83000000>;
322 uart3_clk: uart3_clk@27 {
325 atmel,clk-output-range = <0 83000000>;
328 uart4_clk: uart4_clk@28 {
331 atmel,clk-output-range = <0 83000000>;
334 twi0_clk: twi0_clk@29 {
337 atmel,clk-output-range = <0 83000000>;
340 twi1_clk: twi1_clk@30 {
343 atmel,clk-output-range = <0 83000000>;
346 spi0_clk: spi0_clk@33 {
349 atmel,clk-output-range = <0 83000000>;
353 spi1_clk: spi1_clk@34 {
356 atmel,clk-output-range = <0 83000000>;
359 tcb0_clk: tcb0_clk@35 {
362 atmel,clk-output-range = <0 83000000>;
365 tcb1_clk: tcb1_clk@36 {
368 atmel,clk-output-range = <0 83000000>;
371 pwm_clk: pwm_clk@38 {
374 atmel,clk-output-range = <0 83000000>;
377 adc_clk: adc_clk@40 {
380 atmel,clk-output-range = <0 83000000>;
383 uhphs_clk: uhphs_clk@41 {
386 atmel,clk-output-range = <0 83000000>;
389 udphs_clk: udphs_clk@42 {
392 atmel,clk-output-range = <0 83000000>;
395 ssc0_clk: ssc0_clk@43 {
398 atmel,clk-output-range = <0 83000000>;
401 ssc1_clk: ssc1_clk@44 {
404 atmel,clk-output-range = <0 83000000>;
407 trng_clk: trng_clk@47 {
410 atmel,clk-output-range = <0 83000000>;
413 pdmic_clk: pdmic_clk@48 {
416 atmel,clk-output-range = <0 83000000>;
419 i2s0_clk: i2s0_clk@54 {
422 atmel,clk-output-range = <0 83000000>;
425 i2s1_clk: i2s1_clk@55 {
428 atmel,clk-output-range = <0 83000000>;
431 can0_clk: can0_clk@56 {
434 atmel,clk-output-range = <0 83000000>;
437 can1_clk: can1_clk@57 {
440 atmel,clk-output-range = <0 83000000>;
443 classd_clk: classd_clk@59 {
446 atmel,clk-output-range = <0 83000000>;
451 compatible = "atmel,at91sam9x5-clk-peripheral";
452 #address-cells = <1>;
457 dma0_clk: dma0_clk@6 {
462 dma1_clk: dma1_clk@7 {
472 aesb_clk: aesb_clk@10 {
477 sha_clk: sha_clk@12 {
482 mpddr_clk: mpddr_clk@13 {
487 matrix0_clk: matrix0_clk@15 {
492 sdmmc0_hclk: sdmmc0_hclk@31 {
498 sdmmc1_hclk: sdmmc1_hclk@32 {
504 lcdc_clk: lcdc_clk@45 {
509 isc_clk: isc_clk@46 {
514 qspi0_clk: qspi0_clk@52 {
520 qspi1_clk: qspi1_clk@53 {
528 compatible = "atmel,sama5d2-clk-generated";
529 #address-cells = <1>;
531 interrupt-parent = <&pmc>;
532 clocks = <&main>, <&plla>, <&utmi>, <&mck>;
535 sdmmc0_gclk: sdmmc0_gclk@31 {
541 sdmmc1_gclk: sdmmc1_gclk@32 {
547 tcb0_gclk: tcb0_gclk@35 {
550 atmel,clk-output-range = <0 83000000>;
553 tcb1_gclk: tcb1_gclk@36 {
556 atmel,clk-output-range = <0 83000000>;
559 pwm_gclk: pwm_gclk@38 {
562 atmel,clk-output-range = <0 83000000>;
565 pdmic_gclk: pdmic_gclk@48 {
570 i2s0_gclk: i2s0_gclk@54 {
575 i2s1_gclk: i2s1_gclk@55 {
580 can0_gclk: can0_gclk@56 {
583 atmel,clk-output-range = <0 80000000>;
586 can1_gclk: can1_gclk@57 {
589 atmel,clk-output-range = <0 80000000>;
592 classd_gclk: classd_gclk@59 {
595 atmel,clk-output-range = <0 100000000>;
600 qspi0: spi@f0020000 {
601 compatible = "atmel,sama5d2-qspi";
602 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
603 reg-names = "qspi_base", "qspi_mmap";
604 #address-cells = <1>;
606 clocks = <&qspi0_clk>;
610 qspi1: spi@f0024000 {
611 compatible = "atmel,sama5d2-qspi";
612 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
613 reg-names = "qspi_base", "qspi_mmap";
614 #address-cells = <1>;
616 clocks = <&qspi1_clk>;
621 compatible = "atmel,at91rm9200-spi";
622 reg = <0xf8000000 0x100>;
623 clocks = <&spi0_clk>;
624 clock-names = "spi_clk";
625 #address-cells = <1>;
630 macb0: ethernet@f8008000 {
631 compatible = "cdns,macb";
632 reg = <0xf8008000 0x1000>;
633 #address-cells = <1>;
635 clocks = <&macb0_clk>, <&macb0_clk>;
636 clock-names = "hclk", "pclk";
640 uart0: serial@f801c000 {
641 compatible = "atmel,at91sam9260-usart";
642 reg = <0xf801c000 0x100>;
643 clocks = <&uart0_clk>;
644 clock-names = "usart";
648 uart1: serial@f8020000 {
649 compatible = "atmel,at91sam9260-usart";
650 reg = <0xf8020000 0x100>;
651 clocks = <&uart1_clk>;
652 clock-names = "usart";
656 uart2: serial@f8024000 {
657 compatible = "atmel,at91sam9260-usart";
658 reg = <0xf8024000 0x100>;
659 clocks = <&uart2_clk>;
660 clock-names = "usart";
665 compatible = "atmel,sama5d2-i2c";
666 reg = <0xf8028000 0x100>;
667 #address-cells = <1>;
669 clocks = <&twi0_clk>;
674 compatible = "atmel,sama5d3-rstc";
675 reg = <0xf8048000 0x10>;
680 compatible = "atmel,sama5d2-shdwc";
681 reg = <0xf8048010 0x10>;
683 #address-cells = <1>;
685 atmel,wakeup-rtc-timer;
688 pit: timer@f8048030 {
689 compatible = "atmel,at91sam9260-pit";
690 reg = <0xf8048030 0x10>;
695 compatible = "atmel,sama5d4-wdt";
696 reg = <0xf8048040 0x10>;
702 compatible = "atmel,sama5d2-sfr", "syscon";
703 reg = <0xf8030000 0x98>;
707 compatible = "atmel,at91sam9x5-sckc";
708 reg = <0xf8048050 0x4>;
710 slow_rc_osc: slow_rc_osc {
711 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
713 clock-frequency = <32768>;
714 clock-accuracy = <250000000>;
715 atmel,startup-time-usec = <75>;
719 compatible = "atmel,at91sam9x5-clk-slow-osc";
721 clocks = <&slow_xtal>;
722 atmel,startup-time-usec = <1200000>;
726 compatible = "atmel,at91sam9x5-clk-slow";
728 clocks = <&slow_rc_osc &slow_osc>;
733 compatible = "atmel,at91rm9200-spi";
734 reg = <0xfc000000 0x100>;
735 #address-cells = <1>;
740 uart3: serial@fc008000 {
741 compatible = "atmel,at91sam9260-usart";
742 reg = <0xfc008000 0x100>;
743 clocks = <&uart3_clk>;
744 clock-names = "usart";
749 compatible = "atmel,sama5d2-i2c";
750 reg = <0xfc028000 0x100>;
751 #address-cells = <1>;
753 clocks = <&twi1_clk>;
757 pioA: gpio@fc038000 {
758 compatible = "atmel,sama5d2-gpio";
759 reg = <0xfc038000 0x600>;
760 clocks = <&pioA_clk>;
766 compatible = "atmel,sama5d2-pinctrl";
773 onewire_tm: onewire {
774 compatible = "w1-gpio";