2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
4 * SPDX-License-Identifier: GPL-2.0+ X11
7 #include <dt-bindings/pwm/pwm.h>
11 model = "Theobroma Systems RK3399-Q7 SoM";
12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
15 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
16 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
17 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
18 u-boot,boot-led = "module_led";
22 stdout-path = "serial0:115200n8";
23 u-boot,spl-boot-order = \
24 "same-as-spl", &spiflash, &sdhci, &sdmmc;
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&leds_pins_puma>;
39 gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
40 linux,default-trigger = "heartbeat";
44 label = "sd_card_led";
45 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
46 linux,default-trigger = "mmc0";
50 clkin_gmac: external-gmac-clock {
51 compatible = "fixed-clock";
52 clock-frequency = <125000000>;
53 clock-output-names = "clkin_gmac";
57 dw_hdmi_audio: dw-hdmi-audio {
59 compatible = "rockchip,dw-hdmi-audio";
60 #sound-dai-cells = <0>;
63 hdmi_codec: hdmi-codec {
64 compatible = "simple-audio-card";
65 simple-audio-card,format = "i2s";
66 simple-audio-card,mclk-fs = <256>;
67 simple-audio-card,name = "HDMI-CODEC";
69 simple-audio-card,cpu {
73 simple-audio-card,codec {
78 hdmi_sound: hdmi-sound {
80 compatible = "simple-audio-card";
81 simple-audio-card,format = "i2s";
82 simple-audio-card,mclk-fs = <256>;
83 simple-audio-card,name = "rockchip,hdmi";
85 simple-audio-card,cpu {
88 simple-audio-card,codec {
93 usbhub_enable: usbhub_enable {
94 compatible = "regulator-fixed";
95 regulator-name = "usbhub_enable";
97 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
105 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
106 * eMMC and SPI flash powered-down initially (in fact it keeps the
107 * reset signal asserted). Even though it is an enable signal, we
108 * model this as a regulator.
110 bios_enable: bios_enable {
111 compatible = "regulator-fixed";
113 regulator-name = "bios_enable";
115 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
118 regulator-min-microvolt = <1800000>;
119 regulator-max-microvolt = <1800000>;
122 vccadc_ref: vccadc-ref {
123 compatible = "regulator-fixed";
124 regulator-name = "vcc1v8_sys";
127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <1800000>;
131 vcc3v3_sys: vcc3v3-sys {
132 compatible = "regulator-fixed";
133 regulator-name = "vcc3v3_sys";
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
140 vcc5v0_otg: vcc5v0-otg-regulator {
141 compatible = "regulator-fixed";
143 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&otg_vbus_drv>;
146 regulator-name = "vcc5v0_otg";
150 vcc5v0_host: vcc5v0-host-regulator {
151 compatible = "regulator-fixed";
153 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&host_vbus_drv>;
156 regulator-name = "vcc5v0_host";
160 vcc5v0_sys: vcc5v0-sys {
161 compatible = "regulator-fixed";
162 regulator-name = "vcc5v0_sys";
165 regulator-min-microvolt = <5000000>;
166 regulator-max-microvolt = <5000000>;
169 vcc_phy: vcc-phy-regulator {
170 compatible = "regulator-fixed";
171 regulator-name = "vcc_phy";
177 compatible = "pwm-regulator";
178 pwms = <&pwm2 0 25000 1>;
179 regulator-name = "vdd_log";
180 regulator-min-microvolt = <800000>;
181 regulator-max-microvolt = <1400000>;
185 /* for rockchip boot on */
186 rockchip,pwm_id= <2>;
187 rockchip,pwm_voltage = <1000000>;
196 phy-supply = <&vcc_phy>;
198 clock_in_out = "input";
199 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
200 snps,reset-active-low;
201 snps,reset-delays-us = <2 10000 50000>;
202 assigned-clocks = <&cru SCLK_RMII_SRC>;
203 assigned-clock-parents = <&clkin_gmac>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&rgmii_pins>;
212 #address-cells = <1>;
214 #sound-dai-cells = <0>;
220 i2c-scl-rising-time-ns = <168>;
221 i2c-scl-falling-time-ns = <4>;
222 clock-frequency = <400000>;
224 vdd_gpu: fan535555@60 {
225 compatible = "fcs,fan53555";
227 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
228 vin-supply = <&vcc5v0_sys>;
229 regulator-compatible = "fan53555-reg";
230 regulator-name = "vdd_gpu";
231 regulator-min-microvolt = <600000>;
232 regulator-max-microvolt = <1230000>;
233 regulator-ramp-delay = <1000>;
234 fcs,suspend-voltage-selector = <1>;
237 regulator-initial-state = <3>;
238 regulator-state-mem {
239 regulator-off-in-suspend;
244 compatible = "rockchip,rk808";
246 interrupt-parent = <&gpio1>;
247 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt?
248 pinctrl-names = "default";
249 pinctrl-0 = <&pmic_int_l>;
250 rockchip,system-power-controller;
253 clock-output-names = "xin32k", "rk808-clkout2";
255 vcc1-supply = <&vcc5v0_sys>;
256 vcc2-supply = <&vcc5v0_sys>;
257 vcc3-supply = <&vcc5v0_sys>;
258 vcc4-supply = <&vcc5v0_sys>;
259 vcc6-supply = <&vcc5v0_sys>;
260 vcc7-supply = <&vcc5v0_sys>;
261 vcc8-supply = <&vcc3v3_sys>;
262 vcc9-supply = <&vcc5v0_sys>;
263 vcc10-supply = <&vcc5v0_sys>;
264 vcc11-supply = <&vcc5v0_sys>;
265 vcc12-supply = <&vcc3v3_sys>;
266 vddio-supply = <&vcc1v8_pmu>;
269 vdd_center: DCDC_REG1 {
272 regulator-min-microvolt = <750000>;
273 regulator-max-microvolt = <1350000>;
274 regulator-ramp-delay = <6001>;
275 regulator-name = "vdd_center";
276 regulator-state-mem {
277 regulator-off-in-suspend;
281 vdd_cpu_l: DCDC_REG2 {
284 regulator-min-microvolt = <750000>;
285 regulator-max-microvolt = <1350000>;
286 regulator-ramp-delay = <6001>;
287 regulator-name = "vdd_cpu_l";
288 regulator-state-mem {
289 regulator-off-in-suspend;
296 regulator-name = "vcc_ddr";
297 regulator-state-mem {
298 regulator-on-in-suspend;
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-name = "vcc_1v8";
308 regulator-state-mem {
309 regulator-on-in-suspend;
310 regulator-suspend-microvolt = <1800000>;
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <1800000>;
318 regulator-name = "vcc_ldo1";
319 regulator-state-mem {
320 regulator-off-in-suspend;
324 vcc1v8_hdmi: LDO_REG2 {
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <1800000>;
329 regulator-name = "vcc1v8_hdmi";
330 regulator-state-mem {
331 regulator-off-in-suspend;
335 vcc1v8_pmu: LDO_REG3 {
338 regulator-min-microvolt = <1800000>;
339 regulator-max-microvolt = <1800000>;
340 regulator-name = "vcc1v8_pmu";
341 regulator-state-mem {
342 regulator-on-in-suspend;
343 regulator-suspend-microvolt = <1800000>;
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <3300000>;
352 regulator-name = "vcc_sd";
353 regulator-state-mem {
354 regulator-on-in-suspend;
355 regulator-suspend-microvolt = <3300000>;
361 regulator-min-microvolt = <3000000>;
362 regulator-max-microvolt = <3000000>;
363 regulator-name = "vcc_ldo5";
364 regulator-state-mem {
365 regulator-off-in-suspend;
371 regulator-min-microvolt = <1500000>;
372 regulator-max-microvolt = <1500000>;
373 regulator-name = "vcc_ldo6";
374 regulator-state-mem {
375 regulator-off-in-suspend;
379 vcc0v9_hdmi: LDO_REG7 {
382 regulator-min-microvolt = <900000>;
383 regulator-max-microvolt = <900000>;
384 regulator-name = "vcc0v9_hdmi";
385 regulator-state-mem {
386 regulator-off-in-suspend;
390 vcc_efuse: LDO_REG8 {
393 regulator-min-microvolt = <1800000>;
394 regulator-max-microvolt = <1800000>;
395 regulator-name = "vcc_efuse";
396 regulator-state-mem {
397 regulator-off-in-suspend;
401 vcc3v3_s3: SWITCH_REG1 {
404 regulator-name = "vcc3v3_s3";
405 regulator-state-mem {
406 regulator-off-in-suspend;
410 vcc3v3_s0: SWITCH_REG2 {
413 regulator-name = "vcc3v3_s0";
414 regulator-state-mem {
415 regulator-off-in-suspend;
424 clock-frequency = <400000>;
426 vdd_cpu_b: fan53555@60 {
427 compatible = "fcs,fan53555";
429 vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
430 vin-supply = <&vcc5v0_sys>;
431 regulator-compatible = "fan53555-reg";
432 regulator-name = "vdd_cpu_b";
433 regulator-min-microvolt = <600000>;
434 regulator-max-microvolt = <1230000>;
435 regulator-ramp-delay = <1000>;
436 fcs,suspend-voltage-selector = <1>;
439 regulator-initial-state = <3>;
440 regulator-state-mem {
441 regulator-off-in-suspend;
448 rockchip,i2s-broken-burst-len;
449 rockchip,playback-channels = <8>;
450 rockchip,capture-channels = <8>;
451 #sound-dai-cells = <0>;
455 #sound-dai-cells = <0>;
462 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */
463 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */
464 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
465 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */
469 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
470 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
471 assigned-clock-rates = <100000000>;
472 ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pcie_clkreqn>;
485 pmu1830-supply = <&vcc_1v8>;
501 keep-power-in-suspend;
502 mmc-hs400-enhanced-strobe;
508 clock-frequency = <150000000>;
509 clock-freq-min-max = <100000 150000000>;
516 vqmmc-supply = <&vcc_sd>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
559 /* Pins that are not explicitely used by any devices */
560 pinctrl-names = "default";
561 pinctrl-0 = <&puma_pin_hog>;
564 puma_pin_hog: puma_pin_hog {
566 /* We need pull-ups on Q7 buttons */
567 <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
568 <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
569 <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
570 <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
575 pmic_int_l: pmic-int-l {
577 <1 22 RK_FUNC_GPIO &pcfg_pull_up>;
581 leds_pins_puma: led_pins@0 {
583 <2 25 RK_FUNC_GPIO &pcfg_pull_none>,
584 <1 2 RK_FUNC_GPIO &pcfg_pull_none>;
588 otg_vbus_drv: otg-vbus-drv {
590 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
593 host_vbus_drv: host-vbus-drv {
595 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
600 i2c8_xfer_a: i2c8-xfer {
601 rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
602 <1 20 RK_FUNC_1 &pcfg_pull_up>;
609 clock-frequency = <400000>;
613 clock-frequency = <400000>;
617 clock-frequency = <400000>;
621 clock-frequency = <400000>;
625 /* Enable pull-ups, the pins would float otherwise. */
627 <2 10 RK_FUNC_2 &pcfg_pull_up>,
628 <2 9 RK_FUNC_2 &pcfg_pull_up>;
633 clock-frequency = <400000>;
636 compatible = "isil,isl1208";
640 compatible = "ti,amc6821";
642 cooling-min-state = <0>;
643 cooling-max-state = <9>;
644 #cooling-cells = <2>;
650 pinctrl-names = "default";
651 pinctrl-0 = <&uart0_xfer &uart0_cts>;
661 #address-cells = <1>;
664 spiflash: w25q32dw@0 {
667 compatible = "spi-flash";
669 spi-max-frequency = <49500000>;