2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-ddr3-1600.dtsi"
14 model = "Firefly-RK3399 Board";
15 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
19 u-boot,spl-boot-order = &sdhci, &sdmmc;
22 backlight: backlight {
23 compatible = "pwm-backlight";
24 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
25 pwms = <&pwm0 0 25000 0>;
29 16 17 18 19 20 21 22 23
30 24 25 26 27 28 29 30 31
31 32 33 34 35 36 37 38 39
32 40 41 42 43 44 45 46 47
33 48 49 50 51 52 53 54 55
34 56 57 58 59 60 61 62 63
35 64 65 66 67 68 69 70 71
36 72 73 74 75 76 77 78 79
37 80 81 82 83 84 85 86 87
38 88 89 90 91 92 93 94 95
39 96 97 98 99 100 101 102 103
40 104 105 106 107 108 109 110 111
41 112 113 114 115 116 117 118 119
42 120 121 122 123 124 125 126 127
43 128 129 130 131 132 133 134 135
44 136 137 138 139 140 141 142 143
45 144 145 146 147 148 149 150 151
46 152 153 154 155 156 157 158 159
47 160 161 162 163 164 165 166 167
48 168 169 170 171 172 173 174 175
49 176 177 178 179 180 181 182 183
50 184 185 186 187 188 189 190 191
51 192 193 194 195 196 197 198 199
52 200 201 202 203 204 205 206 207
53 208 209 210 211 212 213 214 215
54 216 217 218 219 220 221 222 223
55 224 225 226 227 228 229 230 231
56 232 233 234 235 236 237 238 239
57 240 241 242 243 244 245 246 247
58 248 249 250 251 252 253 254 255>;
59 default-brightness-level = <200>;
62 clkin_gmac: external-gmac-clock {
63 compatible = "fixed-clock";
64 clock-frequency = <125000000>;
65 clock-output-names = "clkin_gmac";
70 compatible = "simple-audio-card";
71 simple-audio-card,name = "rockchip,rt5640-codec";
72 simple-audio-card,format = "i2s";
73 simple-audio-card,mclk-fs = <256>;
74 simple-audio-card,widgets =
75 "Microphone", "Mic Jack",
76 "Headphone", "Headphone Jack";
77 simple-audio-card,routing =
78 "Mic Jack", "MICBIAS1",
80 "Headphone Jack", "HPOL",
81 "Headphone Jack", "HPOR";
83 simple-audio-card,cpu {
87 simple-audio-card,codec {
88 sound-dai = <&rt5640>;
92 sdio_pwrseq: sdio-pwrseq {
93 compatible = "mmc-pwrseq-simple";
95 clock-names = "ext_clock";
96 pinctrl-names = "default";
97 pinctrl-0 = <&wifi_enable_h>;
100 * On the module itself this is one of these (depending
101 * on the actual card populated):
102 * - SDIO_RESET_L_WL_REG_ON
103 * - PDN (power down when low)
105 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
108 vcc3v3_pcie: vcc3v3-pcie-regulator {
109 compatible = "regulator-fixed";
111 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pcie_drv>;
114 regulator-name = "vcc3v3_pcie";
119 vcc3v3_sys: vcc3v3-sys {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc3v3_sys";
124 regulator-min-microvolt = <3300000>;
125 regulator-max-microvolt = <3300000>;
128 vcc5v0_host: vcc5v0-host-regulator {
129 compatible = "regulator-fixed";
131 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&host_vbus_drv>;
134 regulator-name = "vcc5v0_host";
138 vcc5v0_sys: vcc5v0-sys {
139 compatible = "regulator-fixed";
140 regulator-name = "vcc5v0_sys";
143 regulator-min-microvolt = <5000000>;
144 regulator-max-microvolt = <5000000>;
147 vcc_phy: vcc-phy-regulator {
148 compatible = "regulator-fixed";
149 regulator-name = "vcc_phy";
155 compatible = "pwm-regulator";
156 pwms = <&pwm2 0 25000 1>;
157 regulator-name = "vdd_log";
160 regulator-min-microvolt = <430000>;
161 regulator-max-microvolt = <1400000>;
162 regulator-init-microvolt = <950000>;
165 vccadc_ref: vccadc-ref {
166 compatible = "regulator-fixed";
167 regulator-name = "vcc1v8_sys";
170 regulator-min-microvolt = <1800000>;
171 regulator-max-microvolt = <1800000>;
176 cpu-supply = <&vdd_cpu_l>;
180 cpu-supply = <&vdd_cpu_l>;
184 cpu-supply = <&vdd_cpu_l>;
188 cpu-supply = <&vdd_cpu_l>;
192 cpu-supply = <&vdd_cpu_b>;
196 cpu-supply = <&vdd_cpu_b>;
204 assigned-clocks = <&cru SCLK_RMII_SRC>;
205 assigned-clock-parents = <&clkin_gmac>;
206 clock_in_out = "input";
207 phy-supply = <&vcc_phy>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&rgmii_pins>;
211 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
212 snps,reset-active-low;
213 snps,reset-delays-us = <0 10000 50000>;
220 clock-frequency = <400000>;
221 i2c-scl-rising-time-ns = <168>;
222 i2c-scl-falling-time-ns = <4>;
226 compatible = "rockchip,rk808";
228 interrupt-parent = <&gpio1>;
229 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
231 clock-output-names = "xin32k", "rk808-clkout2";
232 pinctrl-names = "default";
233 pinctrl-0 = <&pmic_int_l>;
234 rockchip,system-power-controller;
237 vcc1-supply = <&vcc3v3_sys>;
238 vcc2-supply = <&vcc3v3_sys>;
239 vcc3-supply = <&vcc3v3_sys>;
240 vcc4-supply = <&vcc3v3_sys>;
241 vcc6-supply = <&vcc3v3_sys>;
242 vcc7-supply = <&vcc3v3_sys>;
243 vcc8-supply = <&vcc3v3_sys>;
244 vcc9-supply = <&vcc3v3_sys>;
245 vcc10-supply = <&vcc3v3_sys>;
246 vcc11-supply = <&vcc3v3_sys>;
247 vcc12-supply = <&vcc3v3_sys>;
248 vddio-supply = <&vcc1v8_pmu>;
251 vdd_center: DCDC_REG1 {
252 regulator-name = "vdd_center";
255 regulator-min-microvolt = <750000>;
256 regulator-max-microvolt = <1350000>;
257 regulator-ramp-delay = <6001>;
258 regulator-state-mem {
259 regulator-off-in-suspend;
263 vdd_cpu_l: DCDC_REG2 {
264 regulator-name = "vdd_cpu_l";
267 regulator-min-microvolt = <750000>;
268 regulator-max-microvolt = <1350000>;
269 regulator-ramp-delay = <6001>;
270 regulator-state-mem {
271 regulator-off-in-suspend;
276 regulator-name = "vcc_ddr";
279 regulator-state-mem {
280 regulator-on-in-suspend;
285 regulator-name = "vcc_1v8";
288 regulator-min-microvolt = <1800000>;
289 regulator-max-microvolt = <1800000>;
290 regulator-state-mem {
291 regulator-on-in-suspend;
292 regulator-suspend-microvolt = <1800000>;
296 vcc1v8_dvp: LDO_REG1 {
297 regulator-name = "vcc1v8_dvp";
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <1800000>;
302 regulator-state-mem {
303 regulator-off-in-suspend;
307 vcc3v0_tp: LDO_REG2 {
308 regulator-name = "vcc3v0_tp";
311 regulator-min-microvolt = <3000000>;
312 regulator-max-microvolt = <3000000>;
313 regulator-state-mem {
314 regulator-off-in-suspend;
318 vcc1v8_pmu: LDO_REG3 {
319 regulator-name = "vcc1v8_pmu";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
324 regulator-state-mem {
325 regulator-on-in-suspend;
326 regulator-suspend-microvolt = <1800000>;
331 regulator-name = "vcc_sd";
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <3000000>;
336 regulator-state-mem {
337 regulator-on-in-suspend;
338 regulator-suspend-microvolt = <3000000>;
342 vcca3v0_codec: LDO_REG5 {
343 regulator-name = "vcca3v0_codec";
346 regulator-min-microvolt = <3000000>;
347 regulator-max-microvolt = <3000000>;
348 regulator-state-mem {
349 regulator-off-in-suspend;
354 regulator-name = "vcc_1v5";
357 regulator-min-microvolt = <1500000>;
358 regulator-max-microvolt = <1500000>;
359 regulator-state-mem {
360 regulator-on-in-suspend;
361 regulator-suspend-microvolt = <1500000>;
365 vcca1v8_codec: LDO_REG7 {
366 regulator-name = "vcca1v8_codec";
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <1800000>;
371 regulator-state-mem {
372 regulator-off-in-suspend;
377 regulator-name = "vcc_3v0";
380 regulator-min-microvolt = <3000000>;
381 regulator-max-microvolt = <3000000>;
382 regulator-state-mem {
383 regulator-on-in-suspend;
384 regulator-suspend-microvolt = <3000000>;
388 vcc3v3_s3: SWITCH_REG1 {
389 regulator-name = "vcc3v3_s3";
392 regulator-state-mem {
393 regulator-off-in-suspend;
397 vcc3v3_s0: SWITCH_REG2 {
398 regulator-name = "vcc3v3_s0";
401 regulator-state-mem {
402 regulator-off-in-suspend;
408 vdd_cpu_b: regulator@40 {
409 compatible = "silergy,syr827";
411 fcs,suspend-voltage-selector = <0>;
412 regulator-name = "vdd_cpu_b";
413 regulator-min-microvolt = <712500>;
414 regulator-max-microvolt = <1500000>;
415 regulator-ramp-delay = <1000>;
418 vin-supply = <&vcc5v0_sys>;
420 regulator-state-mem {
421 regulator-off-in-suspend;
425 vdd_gpu: regulator@41 {
426 compatible = "silergy,syr828";
428 fcs,suspend-voltage-selector = <1>;
429 regulator-name = "vdd_gpu";
430 regulator-min-microvolt = <712500>;
431 regulator-max-microvolt = <1500000>;
432 regulator-ramp-delay = <1000>;
435 vin-supply = <&vcc5v0_sys>;
437 regulator-state-mem {
438 regulator-off-in-suspend;
444 i2c-scl-rising-time-ns = <300>;
445 i2c-scl-falling-time-ns = <15>;
449 compatible = "realtek,rt5640";
451 clocks = <&cru SCLK_I2S_8CH_OUT>;
452 clock-names = "mclk";
453 realtek,in1-differential;
454 #sound-dai-cells = <0>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&rt5640_hpcon>;
461 i2c-scl-rising-time-ns = <450>;
462 i2c-scl-falling-time-ns = <15>;
467 i2c-scl-rising-time-ns = <600>;
468 i2c-scl-falling-time-ns = <20>;
472 compatible = "invensense,mpu6500";
474 interrupt-parent = <&gpio1>;
475 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
480 rockchip,playback-channels = <8>;
481 rockchip,capture-channels = <8>;
482 #sound-dai-cells = <0>;
487 rockchip,playback-channels = <2>;
488 rockchip,capture-channels = <2>;
489 #sound-dai-cells = <0>;
494 #sound-dai-cells = <0>;
501 bt656-supply = <&vcc1v8_dvp>;
502 audio-supply = <&vcca1v8_codec>;
503 sdmmc-supply = <&vcc_sd>;
504 gpio1830-supply = <&vcc_3v0>;
512 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&pcie_clkreqn>;
520 pmu1830-supply = <&vcc_3v0>;
527 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
532 lcd_panel_reset: lcd-panel-reset {
533 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
539 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
542 pcie_3g_drv: pcie-3g-drv {
543 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
548 vsel1_gpio: vsel1-gpio {
549 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
552 vsel2_gpio: vsel2-gpio {
553 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
558 wifi_enable_h: wifi-enable-h {
559 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
564 rt5640_hpcon: rt5640-hpcon {
565 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
570 pmic_int_l: pmic-int-l {
571 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
576 host_vbus_drv: host-vbus-drv {
577 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
591 vref-supply = <&vccadc_ref>;
603 keep-power-in-suspend;
605 mmc-hs400-enhanced-strobe;
611 /* tshut mode 0:CRU 1:GPIO */
612 rockchip,hw-tshut-mode = <1>;
613 /* tshut polarity 0:LOW 1:HIGH */
614 rockchip,hw-tshut-polarity = <1>;
621 u2phy0_otg: otg-port {
625 u2phy0_host: host-port {
626 phy-supply = <&vcc5v0_host>;
634 u2phy1_otg: otg-port {
638 u2phy1_host: host-port {
639 phy-supply = <&vcc5v0_host>;
645 pinctrl-names = "default";
646 pinctrl-0 = <&uart0_xfer &uart0_cts>;