1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
12 model = "Firefly-RK3399 Board";
13 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
19 backlight: backlight {
20 compatible = "pwm-backlight";
21 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
22 pwms = <&pwm0 0 25000 0>;
26 16 17 18 19 20 21 22 23
27 24 25 26 27 28 29 30 31
28 32 33 34 35 36 37 38 39
29 40 41 42 43 44 45 46 47
30 48 49 50 51 52 53 54 55
31 56 57 58 59 60 61 62 63
32 64 65 66 67 68 69 70 71
33 72 73 74 75 76 77 78 79
34 80 81 82 83 84 85 86 87
35 88 89 90 91 92 93 94 95
36 96 97 98 99 100 101 102 103
37 104 105 106 107 108 109 110 111
38 112 113 114 115 116 117 118 119
39 120 121 122 123 124 125 126 127
40 128 129 130 131 132 133 134 135
41 136 137 138 139 140 141 142 143
42 144 145 146 147 148 149 150 151
43 152 153 154 155 156 157 158 159
44 160 161 162 163 164 165 166 167
45 168 169 170 171 172 173 174 175
46 176 177 178 179 180 181 182 183
47 184 185 186 187 188 189 190 191
48 192 193 194 195 196 197 198 199
49 200 201 202 203 204 205 206 207
50 208 209 210 211 212 213 214 215
51 216 217 218 219 220 221 222 223
52 224 225 226 227 228 229 230 231
53 232 233 234 235 236 237 238 239
54 240 241 242 243 244 245 246 247
55 248 249 250 251 252 253 254 255>;
56 default-brightness-level = <200>;
59 clkin_gmac: external-gmac-clock {
60 compatible = "fixed-clock";
61 clock-frequency = <125000000>;
62 clock-output-names = "clkin_gmac";
67 compatible = "simple-audio-card";
68 simple-audio-card,name = "rockchip,rt5640-codec";
69 simple-audio-card,format = "i2s";
70 simple-audio-card,mclk-fs = <256>;
71 simple-audio-card,widgets =
72 "Microphone", "Mic Jack",
73 "Headphone", "Headphone Jack";
74 simple-audio-card,routing =
75 "Mic Jack", "MICBIAS1",
77 "Headphone Jack", "HPOL",
78 "Headphone Jack", "HPOR";
80 simple-audio-card,cpu {
84 simple-audio-card,codec {
85 sound-dai = <&rt5640>;
89 sdio_pwrseq: sdio-pwrseq {
90 compatible = "mmc-pwrseq-simple";
92 clock-names = "ext_clock";
93 pinctrl-names = "default";
94 pinctrl-0 = <&wifi_enable_h>;
97 * On the module itself this is one of these (depending
98 * on the actual card populated):
99 * - SDIO_RESET_L_WL_REG_ON
100 * - PDN (power down when low)
102 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
105 vcc3v3_pcie: vcc3v3-pcie-regulator {
106 compatible = "regulator-fixed";
108 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pcie_drv>;
111 regulator-name = "vcc3v3_pcie";
116 vcc3v3_sys: vcc3v3-sys {
117 compatible = "regulator-fixed";
118 regulator-name = "vcc3v3_sys";
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
125 vcc5v0_host: vcc5v0-host-regulator {
126 compatible = "regulator-fixed";
128 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&host_vbus_drv>;
131 regulator-name = "vcc5v0_host";
135 vcc5v0_sys: vcc5v0-sys {
136 compatible = "regulator-fixed";
137 regulator-name = "vcc5v0_sys";
140 regulator-min-microvolt = <5000000>;
141 regulator-max-microvolt = <5000000>;
144 vcc_phy: vcc-phy-regulator {
145 compatible = "regulator-fixed";
146 regulator-name = "vcc_phy";
152 compatible = "pwm-regulator";
153 pwms = <&pwm2 0 25000 1>;
154 regulator-name = "vdd_log";
157 regulator-min-microvolt = <430000>;
158 regulator-max-microvolt = <1400000>;
159 regulator-init-microvolt = <950000>;
162 vccadc_ref: vccadc-ref {
163 compatible = "regulator-fixed";
164 regulator-name = "vcc1v8_sys";
167 regulator-min-microvolt = <1800000>;
168 regulator-max-microvolt = <1800000>;
173 cpu-supply = <&vdd_cpu_l>;
177 cpu-supply = <&vdd_cpu_l>;
181 cpu-supply = <&vdd_cpu_l>;
185 cpu-supply = <&vdd_cpu_l>;
189 cpu-supply = <&vdd_cpu_b>;
193 cpu-supply = <&vdd_cpu_b>;
201 assigned-clocks = <&cru SCLK_RMII_SRC>;
202 assigned-clock-parents = <&clkin_gmac>;
203 clock_in_out = "input";
204 phy-supply = <&vcc_phy>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&rgmii_pins>;
208 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
209 snps,reset-active-low;
210 snps,reset-delays-us = <0 10000 50000>;
217 clock-frequency = <400000>;
218 i2c-scl-rising-time-ns = <168>;
219 i2c-scl-falling-time-ns = <4>;
223 compatible = "rockchip,rk808";
225 interrupt-parent = <&gpio1>;
226 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
228 clock-output-names = "xin32k", "rk808-clkout2";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pmic_int_l>;
231 rockchip,system-power-controller;
234 vcc1-supply = <&vcc3v3_sys>;
235 vcc2-supply = <&vcc3v3_sys>;
236 vcc3-supply = <&vcc3v3_sys>;
237 vcc4-supply = <&vcc3v3_sys>;
238 vcc6-supply = <&vcc3v3_sys>;
239 vcc7-supply = <&vcc3v3_sys>;
240 vcc8-supply = <&vcc3v3_sys>;
241 vcc9-supply = <&vcc3v3_sys>;
242 vcc10-supply = <&vcc3v3_sys>;
243 vcc11-supply = <&vcc3v3_sys>;
244 vcc12-supply = <&vcc3v3_sys>;
245 vddio-supply = <&vcc1v8_pmu>;
248 vdd_center: DCDC_REG1 {
249 regulator-name = "vdd_center";
252 regulator-min-microvolt = <750000>;
253 regulator-max-microvolt = <1350000>;
254 regulator-ramp-delay = <6001>;
255 regulator-state-mem {
256 regulator-off-in-suspend;
260 vdd_cpu_l: DCDC_REG2 {
261 regulator-name = "vdd_cpu_l";
264 regulator-min-microvolt = <750000>;
265 regulator-max-microvolt = <1350000>;
266 regulator-ramp-delay = <6001>;
267 regulator-state-mem {
268 regulator-off-in-suspend;
273 regulator-name = "vcc_ddr";
276 regulator-state-mem {
277 regulator-on-in-suspend;
282 regulator-name = "vcc_1v8";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 regulator-state-mem {
288 regulator-on-in-suspend;
289 regulator-suspend-microvolt = <1800000>;
293 vcc1v8_dvp: LDO_REG1 {
294 regulator-name = "vcc1v8_dvp";
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <1800000>;
299 regulator-state-mem {
300 regulator-off-in-suspend;
304 vcc3v0_tp: LDO_REG2 {
305 regulator-name = "vcc3v0_tp";
308 regulator-min-microvolt = <3000000>;
309 regulator-max-microvolt = <3000000>;
310 regulator-state-mem {
311 regulator-off-in-suspend;
315 vcc1v8_pmu: LDO_REG3 {
316 regulator-name = "vcc1v8_pmu";
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-state-mem {
322 regulator-on-in-suspend;
323 regulator-suspend-microvolt = <1800000>;
328 regulator-name = "vcc_sd";
331 regulator-min-microvolt = <1800000>;
332 regulator-max-microvolt = <3000000>;
333 regulator-state-mem {
334 regulator-on-in-suspend;
335 regulator-suspend-microvolt = <3000000>;
339 vcca3v0_codec: LDO_REG5 {
340 regulator-name = "vcca3v0_codec";
343 regulator-min-microvolt = <3000000>;
344 regulator-max-microvolt = <3000000>;
345 regulator-state-mem {
346 regulator-off-in-suspend;
351 regulator-name = "vcc_1v5";
354 regulator-min-microvolt = <1500000>;
355 regulator-max-microvolt = <1500000>;
356 regulator-state-mem {
357 regulator-on-in-suspend;
358 regulator-suspend-microvolt = <1500000>;
362 vcca1v8_codec: LDO_REG7 {
363 regulator-name = "vcca1v8_codec";
366 regulator-min-microvolt = <1800000>;
367 regulator-max-microvolt = <1800000>;
368 regulator-state-mem {
369 regulator-off-in-suspend;
374 regulator-name = "vcc_3v0";
377 regulator-min-microvolt = <3000000>;
378 regulator-max-microvolt = <3000000>;
379 regulator-state-mem {
380 regulator-on-in-suspend;
381 regulator-suspend-microvolt = <3000000>;
385 vcc3v3_s3: SWITCH_REG1 {
386 regulator-name = "vcc3v3_s3";
389 regulator-state-mem {
390 regulator-off-in-suspend;
394 vcc3v3_s0: SWITCH_REG2 {
395 regulator-name = "vcc3v3_s0";
398 regulator-state-mem {
399 regulator-off-in-suspend;
405 vdd_cpu_b: regulator@40 {
406 compatible = "silergy,syr827";
408 fcs,suspend-voltage-selector = <0>;
409 regulator-name = "vdd_cpu_b";
410 regulator-min-microvolt = <712500>;
411 regulator-max-microvolt = <1500000>;
412 regulator-ramp-delay = <1000>;
415 vin-supply = <&vcc5v0_sys>;
417 regulator-state-mem {
418 regulator-off-in-suspend;
422 vdd_gpu: regulator@41 {
423 compatible = "silergy,syr828";
425 fcs,suspend-voltage-selector = <1>;
426 regulator-name = "vdd_gpu";
427 regulator-min-microvolt = <712500>;
428 regulator-max-microvolt = <1500000>;
429 regulator-ramp-delay = <1000>;
432 vin-supply = <&vcc5v0_sys>;
434 regulator-state-mem {
435 regulator-off-in-suspend;
441 i2c-scl-rising-time-ns = <300>;
442 i2c-scl-falling-time-ns = <15>;
446 compatible = "realtek,rt5640";
448 clocks = <&cru SCLK_I2S_8CH_OUT>;
449 clock-names = "mclk";
450 realtek,in1-differential;
451 #sound-dai-cells = <0>;
452 pinctrl-names = "default";
453 pinctrl-0 = <&rt5640_hpcon>;
458 i2c-scl-rising-time-ns = <450>;
459 i2c-scl-falling-time-ns = <15>;
464 i2c-scl-rising-time-ns = <600>;
465 i2c-scl-falling-time-ns = <20>;
469 compatible = "invensense,mpu6500";
471 interrupt-parent = <&gpio1>;
472 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
477 rockchip,playback-channels = <8>;
478 rockchip,capture-channels = <8>;
479 #sound-dai-cells = <0>;
484 rockchip,playback-channels = <2>;
485 rockchip,capture-channels = <2>;
486 #sound-dai-cells = <0>;
491 #sound-dai-cells = <0>;
498 bt656-supply = <&vcc1v8_dvp>;
499 audio-supply = <&vcca1v8_codec>;
500 sdmmc-supply = <&vcc_sd>;
501 gpio1830-supply = <&vcc_3v0>;
509 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
511 pinctrl-names = "default";
512 pinctrl-0 = <&pcie_clkreqn>;
517 pmu1830-supply = <&vcc_3v0>;
524 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
529 lcd_panel_reset: lcd-panel-reset {
530 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
536 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
539 pcie_3g_drv: pcie-3g-drv {
540 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
545 vsel1_gpio: vsel1-gpio {
546 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
549 vsel2_gpio: vsel2-gpio {
550 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
555 wifi_enable_h: wifi-enable-h {
556 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
561 rt5640_hpcon: rt5640-hpcon {
562 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
567 pmic_int_l: pmic-int-l {
568 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
573 host_vbus_drv: host-vbus-drv {
574 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
588 vref-supply = <&vccadc_ref>;
599 keep-power-in-suspend;
601 mmc-hs400-enhanced-strobe;
607 /* tshut mode 0:CRU 1:GPIO */
608 rockchip,hw-tshut-mode = <1>;
609 /* tshut polarity 0:LOW 1:HIGH */
610 rockchip,hw-tshut-polarity = <1>;
617 u2phy0_otg: otg-port {
621 u2phy0_host: host-port {
622 phy-supply = <&vcc5v0_host>;
630 u2phy1_otg: otg-port {
634 u2phy1_host: host-port {
635 phy-supply = <&vcc5v0_host>;
641 pinctrl-names = "default";
642 pinctrl-0 = <&uart0_xfer &uart0_cts>;