1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Collabora Ltd.
4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
6 * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw
10 #include "rk3399-rock960.dtsi"
13 model = "96boards RK3399 Ficus";
14 compatible = "vamrs,ficus", "rockchip,rk3399";
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
29 assigned-clocks = <&cru SCLK_RMII_SRC>;
30 assigned-clock-parents = <&clkin_gmac>;
31 clock_in_out = "input";
32 phy-supply = <&vcc3v3_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&rgmii_pins>;
36 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
37 snps,reset-active-low;
38 snps,reset-delays-us = <0 10000 50000>;
45 ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
50 rgmii_sleep_pins: rgmii-sleep-pins {
52 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
59 <1 24 RK_FUNC_GPIO &pcfg_pull_none>;
64 host_vbus_drv: host-vbus-drv {
66 <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
72 gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
76 gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;