2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
14 model = "Rockchip RK3399 Evaluation Board";
15 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
16 "google,rk3399evb-rev2";
22 vdd_center: vdd-center {
23 compatible = "pwm-regulator";
24 pwms = <&pwm3 0 25000 1>;
25 regulator-name = "vdd_center";
26 regulator-min-microvolt = <800000>;
27 regulator-max-microvolt = <1400000>;
28 regulator-init-microvolt = <950000>;
35 compatible = "regulator-fixed";
36 regulator-name = "vccsys";
41 vcc3v3_sys: vcc3v3-sys {
42 compatible = "regulator-fixed";
43 regulator-name = "vcc3v3_sys";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
50 vcc_phy: vcc-phy-regulator {
51 compatible = "regulator-fixed";
52 regulator-name = "vcc_phy";
57 vcc5v0_host: vcc5v0-host-en {
58 compatible = "regulator-fixed";
59 regulator-name = "vcc5v0_host";
60 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
63 clkin_gmac: external-gmac-clock {
64 compatible = "fixed-clock";
65 clock-frequency = <125000000>;
66 clock-output-names = "clkin_gmac";
95 mmc-hs400-enhanced-strobe;
113 rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
126 rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
132 clock-frequency = <400000>;
133 i2c-scl-falling-time-ns = <50>;
134 i2c-scl-rising-time-ns = <100>;
138 compatible = "rockchip,rk808";
139 clock-output-names = "xin32k", "wifibt_32kin";
140 interrupt-parent = <&gpio0>;
141 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pmic_int_l>;
145 rockchip,system-power-controller;
150 vcc12-supply = <&vcc3v3_sys>;
152 vcc33_lcd: SWITCH_REG2 {
155 regulator-name = "vcc33_lcd";
163 pmic_int_l: pmic-int-l {
165 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
168 pmic_dvs2: pmic-dvs2 {
170 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
176 phy-supply = <&vcc_phy>;
178 clock_in_out = "input";
179 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
180 snps,reset-active-low;
181 snps,reset-delays-us = <0 10000 50000>;
182 assigned-clocks = <&cru SCLK_RMII_SRC>;
183 assigned-clock-parents = <&clkin_gmac>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&rgmii_pins>;
192 phy-supply = <&vcc_phy>;
194 clock_in_out = "input";
195 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
196 snps,reset-active-low;
197 snps,reset-delays-us = <0 10000 50000>;
198 assigned-clocks = <&cru SCLK_RMII_SRC>;
199 assigned-clock-parents = <&clkin_gmac>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&rgmii_pins>;