1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
12 model = "Rockchip RK3399 Evaluation Board";
13 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
14 "google,rk3399evb-rev2";
20 vdd_center: vdd-center {
21 compatible = "pwm-regulator";
22 pwms = <&pwm3 0 25000 1>;
23 regulator-name = "vdd_center";
24 regulator-min-microvolt = <800000>;
25 regulator-max-microvolt = <1400000>;
26 regulator-init-microvolt = <950000>;
33 compatible = "regulator-fixed";
34 regulator-name = "vccsys";
39 vcc3v3_sys: vcc3v3-sys {
40 compatible = "regulator-fixed";
41 regulator-name = "vcc3v3_sys";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
48 vcc_phy: vcc-phy-regulator {
49 compatible = "regulator-fixed";
50 regulator-name = "vcc_phy";
55 vcc5v0_host: vcc5v0-host-en {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc5v0_host";
58 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
61 vcc5v0_typec0: vcc5v0-typec0-en {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc5v0_typec0";
64 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
67 vcc5v0_typec1: vcc5v0-typec1-en {
68 compatible = "regulator-fixed";
69 regulator-name = "vcc5v0_typec1";
70 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
73 clkin_gmac: external-gmac-clock {
74 compatible = "fixed-clock";
75 clock-frequency = <125000000>;
76 clock-output-names = "clkin_gmac";
80 backlight: backlight {
81 compatible = "pwm-backlight";
82 power-supply = <&vccsys>;
83 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
87 16 17 18 19 20 21 22 23
88 24 25 26 27 28 29 30 31
89 32 33 34 35 36 37 38 39
90 40 41 42 43 44 45 46 47
91 48 49 50 51 52 53 54 55
92 56 57 58 59 60 61 62 63
93 64 65 66 67 68 69 70 71
94 72 73 74 75 76 77 78 79
95 80 81 82 83 84 85 86 87
96 88 89 90 91 92 93 94 95
97 96 97 98 99 100 101 102 103
98 104 105 106 107 108 109 110 111
99 112 113 114 115 116 117 118 119
100 120 121 122 123 124 125 126 127
101 128 129 130 131 132 133 134 135
102 136 137 138 139 140 141 142 143
103 144 145 146 147 148 149 150 151
104 152 153 154 155 156 157 158 159
105 160 161 162 163 164 165 166 167
106 168 169 170 171 172 173 174 175
107 176 177 178 179 180 181 182 183
108 184 185 186 187 188 189 190 191
109 192 193 194 195 196 197 198 199
110 200 201 202 203 204 205 206 207
111 208 209 210 211 212 213 214 215
112 216 217 218 219 220 221 222 223
113 224 225 226 227 228 229 230 231
114 232 233 234 235 236 237 238 239
115 240 241 242 243 244 245 246 247
116 248 249 250 251 252 253 254 255>;
117 default-brightness-level = <200>;
118 pwms = <&pwm0 0 25000 0>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pwm0_pin>;
121 pwm-delay-us = <10000>;
126 compatible = "simple-panel";
127 power-supply = <&vcc33_lcd>;
128 backlight = <&backlight>;
129 /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
162 mmc-hs400-enhanced-strobe;
180 vbus-supply = <&vcc5v0_typec0>;
193 vbus-supply = <&vcc5v0_typec1>;
199 clock-frequency = <400000>;
200 i2c-scl-falling-time-ns = <50>;
201 i2c-scl-rising-time-ns = <100>;
205 compatible = "rockchip,rk808";
206 clock-output-names = "xin32k", "wifibt_32kin";
207 interrupt-parent = <&gpio0>;
208 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&pmic_int_l>;
212 rockchip,system-power-controller;
217 vcc12-supply = <&vcc3v3_sys>;
220 vcc33_lcd: SWITCH_REG2 {
223 regulator-name = "vcc33_lcd";
231 rockchip,panel = <&panel>;
234 bits-per-pixel = <24>;
235 clock-frequency = <160000000>;
236 hfront-porch = <120>;
247 pixelclk-active = <0>;
254 pmic_int_l: pmic-int-l {
256 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
259 pmic_dvs2: pmic-dvs2 {
261 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
267 phy-supply = <&vcc_phy>;
269 clock_in_out = "input";
270 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
271 snps,reset-active-low;
272 snps,reset-delays-us = <0 10000 50000>;
273 assigned-clocks = <&cru SCLK_RMII_SRC>;
274 assigned-clock-parents = <&clkin_gmac>;
275 pinctrl-names = "default";
276 pinctrl-0 = <&rgmii_pins>;