arch/arm/dts/rk3288-veyron-speedy.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Veyron Speedy Rev 1+ board device tree source
   4  *
   5  * Copyright 2015 Google, Inc
   6  */
   7
   8 /dts-v1/;
   9 #include "rk3288-veyron-chromebook.dtsi"
  10 #include "cros-ec-sbs.dtsi"
  11 #include "rk3288-veyron-speedy-u-boot.dtsi"
  12
  13 / {
  14         model = "Google Speedy";
  15         compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
  16                      "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
  17                      "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
  18                      "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
  19                      "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
  20
  21         panel_regulator: panel-regulator {
  22                 compatible = "regulator-fixed";
  23                 enable-active-high;
  24                 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
  25                 pinctrl-names = "default";
  26                 pinctrl-0 = <&lcd_enable_h>;
  27                 regulator-name = "panel_regulator";
  28                 startup-delay-us = <100000>;
  29                 vin-supply = <&vcc33_sys>;
  30         };
  31
  32         vcc18_lcd: vcc18-lcd {
  33                 compatible = "regulator-fixed";
  34                 enable-active-high;
  35                 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&avdd_1v8_disp_en>;
  38                 regulator-name = "vcc18_lcd";
  39                 regulator-always-on;
  40                 regulator-boot-on;
  41                 vin-supply = <&vcc18_wl>;
  42         };
  43
  44         backlight_regulator: backlight-regulator {
  45                 compatible = "regulator-fixed";
  46                 enable-active-high;
  47                 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
  48                 pinctrl-names = "default";
  49                 pinctrl-0 = <&bl_pwr_en>;
  50                 regulator-name = "backlight_regulator";
  51                 vin-supply = <&vcc33_sys>;
  52                 startup-delay-us = <15000>;
  53         };
  54 };
  55
  56 &backlight {
  57         power-supply = <&backlight_regulator>;
  58 };
  59
  60 &cpu_alert0 {
  61         temperature = <65000>;
  62 };
  63
  64 &cpu_alert1 {
  65         temperature = <70000>;
  66 };
  67
  68 &edp {
  69         /delete-property/pinctrl-names;
  70         /delete-property/pinctrl-0;
  71
  72         force-hpd;
  73 };
  74
  75 &panel {
  76         power-supply = <&panel_regulator>;
  77 };
  78
  79 &rk808 {
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&pmic_int_l>;
  82 };
  83
  84 &sdmmc {
  85         disable-wp;
  86         pinctrl-names = "default";
  87         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
  88                         &sdmmc_bus4>;
  89 };
  90
  91 &vcc_5v {
  92         enable-active-high;
  93         gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&drv_5v>;
  96 };
  97
  98 &vcc50_hdmi {
  99         enable-active-high;
 100         gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
 101         pinctrl-names = "default";
 102         pinctrl-0 = <&vcc50_hdmi_en>;
 103 };
 104
 105 &pinctrl {
 106         backlight {
 107                 bl_pwr_en: bl_pwr_en {
 108                         rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
 109                 };
 110         };
 111
 112         buck-5v {
 113                 drv_5v: drv-5v {
 114                         rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
 115                 };
 116         };
 117
 118         hdmi {
 119                 vcc50_hdmi_en: vcc50-hdmi-en {
 120                         rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
 121                 };
 122         };
 123
 124         lcd {
 125                 lcd_enable_h: lcd-en {
 126                         rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
 127                 };
 128
 129                 avdd_1v8_disp_en: avdd-1v8-disp-en {
 130                         rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
 131                 };
 132         };
 133
 134         pmic {
 135                 dvs_1: dvs-1 {
 136                         rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
 137                 };
 138
 139                 dvs_2: dvs-2 {
 140                         rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
 141                 };
 142         };
 143 };