1 // SPDX-License-Identifier: GPL-2.0
3 * Google Veyron (and derivatives) board device tree source
5 * Copyright 2014 Google, Inc
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
10 #include "rk3288-veyron.dtsi"
19 gpio_keys: gpio-keys {
20 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
23 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
24 linux,code = <0>; /* SW_LID */
25 linux,input-type = <5>; /* EV_SW */
26 debounce-interval = <1>;
32 compatible = "gpio-charger";
33 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ac_present_ap>;
36 charger-type = "mains";
39 /* A non-regulated voltage from power supply or battery */
41 compatible = "regulator-fixed";
42 regulator-name = "vccsys";
47 vcc33_sys: vcc33-sys {
48 vin-supply = <&vccsys>;
52 vin-supply = <&vccsys>;
55 /* This turns on vbus for host1 (dwc2) */
56 vcc5_host1: vcc5-host1-regulator {
57 compatible = "regulator-fixed";
59 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&host1_pwr_en>;
62 regulator-name = "vcc5_host1";
67 /* This turns on vbus for otg for host mode (dwc2) */
68 vcc5v_otg: vcc5v-otg-regulator {
69 compatible = "regulator-fixed";
71 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&usbotg_pwren_h>;
74 regulator-name = "vcc5_host2";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 regulator-name = "vcc33_ccd";
88 regulator-suspend-mem-disabled;
95 spi-activate-delay = <100>;
96 spi-max-frequency = <3000000>;
97 spi-deactivate-delay = <200>;
100 compatible = "google,cros-ec-spi";
101 spi-max-frequency = <3000000>;
102 interrupt-parent = <&gpio7>;
103 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
104 ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&ec_int>;
108 google,cros-ec-spi-pre-delay = <30>;
110 i2c_tunnel: i2c-tunnel {
111 compatible = "google,cros-ec-i2c-tunnel";
112 google,remote-bus = <0>;
113 #address-cells = <1>;
121 compatible = "elan,i2c_touchpad";
122 interrupt-parent = <&gpio7>;
123 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&trackpad_int>;
127 vcc-supply = <&vcc33_io>;
134 /* Common for sleep and wake, but no owners */
144 /* Common for sleep and wake, but no owners */
155 ap_lid_int_l: ap-lid-int-l {
156 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
161 ac_present_ap: ac-present-ap {
162 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
168 rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
173 sdmmc_wp_gpio: sdmmc-wp-gpio {
174 rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
179 suspend_l_wake: suspend-l-wake {
180 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
183 suspend_l_sleep: suspend-l-sleep {
184 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
189 trackpad_int: trackpad-int {
190 rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
195 host1_pwr_en: host1-pwr-en {
196 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
199 usbotg_pwren_h: usbotg-pwren-h {
200 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
205 #include "cros-ec-keyboard.dtsi"