2 * Google Veyron Jerry Rev 3+ board device tree source
4 * Copyright 2014 Google, Inc
6 * SPDX-License-Identifier: GPL-2.0
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "cros-ec-sbs.dtsi"
14 model = "Google Jerry";
15 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
16 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
17 "google,veyron-jerry-rev3", "google,veyron-jerry",
18 "google,veyron", "rockchip,rk3288";
24 panel_regulator: panel-regualtor {
25 compatible = "regulator-fixed";
27 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&lcd_enable_h>;
30 regulator-name = "panel_regulator";
31 vin-supply = <&vcc33_sys>;
34 vcc18_lcd: vcc18-lcd {
35 compatible = "regulator-fixed";
37 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&avdd_1v8_disp_en>;
40 regulator-name = "vcc18_lcd";
43 vin-supply = <&vcc18_wl>;
46 backlight_regulator: backlight-regulator {
47 compatible = "regulator-fixed";
49 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&bl_pwr_en>;
52 regulator-name = "backlight_regulator";
53 vin-supply = <&vcc33_sys>;
54 startup-delay-us = <15000>;
60 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
65 power-supply = <&backlight_regulator>;
69 power-supply= <&panel_regulator>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
75 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
76 <&gpio7 15 GPIO_ACTIVE_HIGH>;
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84 regulator-name = "mic_vcc";
85 regulator-suspend-mem-disabled;
91 pinctrl-names = "default";
92 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
99 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&drv_5v>;
106 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&vcc50_hdmi_en>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&edp_hpd>;
118 bl_pwr_en: bl_pwr_en {
119 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
125 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
131 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
136 /* Make sure eMMC is not in reset */
137 emmc_deassert_reset: emmc-deassert-reset {
138 rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
143 vcc50_hdmi_en: vcc50-hdmi-en {
144 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
149 lcd_enable_h: lcd-en {
150 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
153 avdd_1v8_disp_en: avdd-1v8-disp-en {
154 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
160 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
164 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
173 * Trackpad pin control is shared between Elan and Synaptics devices
174 * so we have to pull it up to the bus level.
176 pinctrl-names = "default";
177 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
180 compatible = "elan,i2c_touchpad";
181 interrupt-parent = <&gpio7>;
182 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
184 * Remove the inherited pinctrl settings to avoid clashing
185 * with bus-wide ones.
187 /delete-property/pinctrl-names;
188 /delete-property/pinctrl-0;
190 vcc-supply = <&vcc33_io>;
195 compatible = "hid-over-i2c";
196 interrupt-parent = <&gpio7>;
197 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
199 hid-descr-addr = <0x0020>;
200 vcc-supply = <&vcc33_io>;