arch/arm/dts/r8a77990.dtsi

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Device Tree Source for the r8a77990 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77990-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77990";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 /* 1 core only at this point */
  22                 a53_0: cpu@0 {
  23                         compatible = "arm,cortex-a53", "arm,armv8";
  24                         reg = <0x0>;
  25                         device_type = "cpu";
  26                         power-domains = <&sysc 5>;
  27                         next-level-cache = <&L2_CA53>;
  28                         enable-method = "psci";
  29                 };
  30
  31                 L2_CA53: cache-controller-0 {
  32                         compatible = "cache";
  33                         power-domains = <&sysc 21>;
  34                         cache-unified;
  35                         cache-level = <2>;
  36                 };
  37         };
  38
  39         extal_clk: extal {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 /* This value must be overridden by the board */
  43                 clock-frequency = <0>;
  44         };
  45
  46         pmu_a53 {
  47                 compatible = "arm,cortex-a53-pmu";
  48                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
  49                 interrupt-affinity = <&a53_0>;
  50         };
  51
  52         psci {
  53                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  54                 method = "smc";
  55         };
  56
  57         soc: soc {
  58                 compatible = "simple-bus";
  59                 interrupt-parent = <&gic>;
  60                 #address-cells = <2>;
  61                 #size-cells = <2>;
  62                 ranges;
  63
  64                 gpio0: gpio@e6050000 {
  65                         compatible = "renesas,gpio-r8a77990",
  66                                      "renesas,rcar-gen3-gpio";
  67                         reg = <0 0xe6050000 0 0x50>;
  68                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  69                         #gpio-cells = <2>;
  70                         gpio-controller;
  71                         gpio-ranges = <&pfc 0 0 18>;
  72                         #interrupt-cells = <2>;
  73                         interrupt-controller;
  74                         clocks = <&cpg CPG_MOD 912>;
  75                         power-domains = <&sysc 32>;
  76                         resets = <&cpg 912>;
  77                 };
  78
  79                 gpio1: gpio@e6051000 {
  80                         compatible = "renesas,gpio-r8a77990",
  81                                      "renesas,rcar-gen3-gpio";
  82                         reg = <0 0xe6051000 0 0x50>;
  83                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  84                         #gpio-cells = <2>;
  85                         gpio-controller;
  86                         gpio-ranges = <&pfc 0 32 23>;
  87                         #interrupt-cells = <2>;
  88                         interrupt-controller;
  89                         clocks = <&cpg CPG_MOD 911>;
  90                         power-domains = <&sysc 32>;
  91                         resets = <&cpg 911>;
  92                 };
  93
  94                 gpio2: gpio@e6052000 {
  95                         compatible = "renesas,gpio-r8a77990",
  96                                      "renesas,rcar-gen3-gpio";
  97                         reg = <0 0xe6052000 0 0x50>;
  98                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  99                         #gpio-cells = <2>;
 100                         gpio-controller;
 101                         gpio-ranges = <&pfc 0 64 26>;
 102                         #interrupt-cells = <2>;
 103                         interrupt-controller;
 104                         clocks = <&cpg CPG_MOD 910>;
 105                         power-domains = <&sysc 32>;
 106                         resets = <&cpg 910>;
 107                 };
 108
 109                 gpio3: gpio@e6053000 {
 110                         compatible = "renesas,gpio-r8a77990",
 111                                      "renesas,rcar-gen3-gpio";
 112                         reg = <0 0xe6053000 0 0x50>;
 113                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 114                         #gpio-cells = <2>;
 115                         gpio-controller;
 116                         gpio-ranges = <&pfc 0 96 16>;
 117                         #interrupt-cells = <2>;
 118                         interrupt-controller;
 119                         clocks = <&cpg CPG_MOD 909>;
 120                         power-domains = <&sysc 32>;
 121                         resets = <&cpg 909>;
 122                 };
 123
 124                 gpio4: gpio@e6054000 {
 125                         compatible = "renesas,gpio-r8a77990",
 126                                      "renesas,rcar-gen3-gpio";
 127                         reg = <0 0xe6054000 0 0x50>;
 128                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 129                         #gpio-cells = <2>;
 130                         gpio-controller;
 131                         gpio-ranges = <&pfc 0 128 11>;
 132                         #interrupt-cells = <2>;
 133                         interrupt-controller;
 134                         clocks = <&cpg CPG_MOD 908>;
 135                         power-domains = <&sysc 32>;
 136                         resets = <&cpg 908>;
 137                 };
 138
 139                 gpio5: gpio@e6055000 {
 140                         compatible = "renesas,gpio-r8a77990",
 141                                      "renesas,rcar-gen3-gpio";
 142                         reg = <0 0xe6055000 0 0x50>;
 143                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 144                         #gpio-cells = <2>;
 145                         gpio-controller;
 146                         gpio-ranges = <&pfc 0 160 20>;
 147                         #interrupt-cells = <2>;
 148                         interrupt-controller;
 149                         clocks = <&cpg CPG_MOD 907>;
 150                         power-domains = <&sysc 32>;
 151                         resets = <&cpg 907>;
 152                 };
 153
 154                 gpio6: gpio@e6055400 {
 155                         compatible = "renesas,gpio-r8a77990",
 156                                      "renesas,rcar-gen3-gpio";
 157                         reg = <0 0xe6055400 0 0x50>;
 158                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 159                         #gpio-cells = <2>;
 160                         gpio-controller;
 161                         gpio-ranges = <&pfc 0 192 18>;
 162                         #interrupt-cells = <2>;
 163                         interrupt-controller;
 164                         clocks = <&cpg CPG_MOD 906>;
 165                         power-domains = <&sysc 32>;
 166                         resets = <&cpg 906>;
 167                 };
 168
 169                 ohci0: usb@ee080000 {
 170                         compatible = "generic-ohci";
 171                         reg = <0 0xee080000 0 0x100>;
 172                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 173                         clocks = <&cpg CPG_MOD 703>;
 174                         phys = <&usb2_phy0>;
 175                         phy-names = "usb";
 176                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 177                         resets = <&cpg 703>;
 178                         status = "disabled";
 179                 };
 180
 181                 ehci0: usb@ee080100 {
 182                         compatible = "generic-ehci";
 183                         reg = <0 0xee080100 0 0x100>;
 184                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 185                         clocks = <&cpg CPG_MOD 703>;
 186                         phys = <&usb2_phy0>;
 187                         phy-names = "usb";
 188                         companion = <&ohci0>;
 189                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 190                         resets = <&cpg 703>;
 191                         status = "disabled";
 192                 };
 193
 194                 usb2_phy0: usb-phy@ee080200 {
 195                         compatible = "renesas,usb2-phy-r8a7790",
 196                                      "renesas,rcar-gen3-usb2-phy";
 197                         reg = <0 0xee080200 0 0x700>;
 198                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 199                         clocks = <&cpg CPG_MOD 703>;
 200                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 201                         resets = <&cpg 703>;
 202                         #phy-cells = <0>;
 203                         status = "disabled";
 204                 };
 205
 206                 pfc: pin-controller@e6060000 {
 207                         compatible = "renesas,pfc-r8a77990";
 208                         reg = <0 0xe6060000 0 0x508>;
 209                 };
 210
 211                 cpg: clock-controller@e6150000 {
 212                         compatible = "renesas,r8a77990-cpg-mssr";
 213                         reg = <0 0xe6150000 0 0x1000>;
 214                         clocks = <&extal_clk>;
 215                         clock-names = "extal";
 216                         #clock-cells = <2>;
 217                         #power-domain-cells = <0>;
 218                         #reset-cells = <1>;
 219                 };
 220
 221                 rst: reset-controller@e6160000 {
 222                         compatible = "renesas,r8a77990-rst";
 223                         reg = <0 0xe6160000 0 0x0200>;
 224                 };
 225
 226                 sdhi0: sd@ee100000 {
 227                         compatible = "renesas,sdhi-r8a77990";
 228                         reg = <0 0xee100000 0 0x2000>;
 229                         clocks = <&cpg CPG_MOD 314>;
 230                         max-frequency = <200000000>;
 231                         status = "disabled";
 232                 };
 233
 234                 sdhi1: sd@ee120000 {
 235                         compatible = "renesas,sdhi-r8a77990";
 236                         reg = <0 0xee120000 0 0x2000>;
 237                         clocks = <&cpg CPG_MOD 313>;
 238                         max-frequency = <200000000>;
 239                         status = "disabled";
 240                 };
 241
 242                 sdhi3: sd@ee160000 {
 243                         compatible = "renesas,sdhi-r8a77990";
 244                         reg = <0 0xee160000 0 0x2000>;
 245                         clocks = <&cpg CPG_MOD 311>;
 246                         max-frequency = <200000000>;
 247                         status = "disabled";
 248                 };
 249
 250                 sysc: system-controller@e6180000 {
 251                         compatible = "renesas,r8a77990-sysc";
 252                         reg = <0 0xe6180000 0 0x0400>;
 253                         #power-domain-cells = <1>;
 254                 };
 255
 256                 avb: ethernet@e6800000 {
 257                         compatible = "renesas,etheravb-r8a77990",
 258                                      "renesas,etheravb-rcar-gen3";
 259                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 260                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 261                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 267                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 268                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 269                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 270                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 271                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 272                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 273                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 274                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 275                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 276                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 277                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 278                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 279                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 280                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 281                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 282                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 283                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 285                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 286                                           "ch4", "ch5", "ch6", "ch7",
 287                                           "ch8", "ch9", "ch10", "ch11",
 288                                           "ch12", "ch13", "ch14", "ch15",
 289                                           "ch16", "ch17", "ch18", "ch19",
 290                                           "ch20", "ch21", "ch22", "ch23",
 291                                           "ch24";
 292                         clocks = <&cpg CPG_MOD 812>;
 293                         power-domains = <&sysc 32>;
 294                         resets = <&cpg 812>;
 295                         phy-mode = "rgmii";
 296                         #address-cells = <1>;
 297                         #size-cells = <0>;
 298                         status = "disabled";
 299                 };
 300
 301                 scif2: serial@e6e88000 {
 302                         compatible = "renesas,scif-r8a77990",
 303                                      "renesas,rcar-gen3-scif", "renesas,scif";
 304                         reg = <0 0xe6e88000 0 64>;
 305                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 306                         clocks = <&cpg CPG_MOD 310>;
 307                         clock-names = "fck";
 308                         power-domains = <&sysc 32>;
 309                         resets = <&cpg 310>;
 310                         status = "disabled";
 311                 };
 312
 313                 gic: interrupt-controller@f1010000 {
 314                         compatible = "arm,gic-400";
 315                         #interrupt-cells = <3>;
 316                         #address-cells = <0>;
 317                         interrupt-controller;
 318                         reg = <0x0 0xf1010000 0 0x1000>,
 319                               <0x0 0xf1020000 0 0x20000>,
 320                               <0x0 0xf1040000 0 0x20000>,
 321                               <0x0 0xf1060000 0 0x20000>;
 322                         interrupts = <GIC_PPI 9
 323                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 324                         clocks = <&cpg CPG_MOD 408>;
 325                         clock-names = "clk";
 326                         power-domains = <&sysc 32>;
 327                         resets = <&cpg 408>;
 328                 };
 329
 330                 prr: chipid@fff00044 {
 331                         compatible = "renesas,prr";
 332                         reg = <0 0xfff00044 0 4>;
 333                 };
 334
 335                 rpc: rpc@0xee200000 {
 336                         compatible = "renesas,rpc-r8a77990", "renesas,rpc";
 337                         reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
 338                         clocks = <&cpg CPG_MOD 917>;
 339                         bank-width = <2>;
 340                         status = "disabled";
 341                 };
 342         };
 343
 344         timer {
 345                 compatible = "arm,armv8-timer";
 346                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 347                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 348                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 349                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 350         };
 351 };