arch/arm/dts/r8a77970-eagle.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Eagle board
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Cogent Embedded, Inc.
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a77970.dtsi"
  11
  12 / {
  13         model = "Renesas Eagle board based on r8a77970";
  14         compatible = "renesas,eagle", "renesas,r8a77970";
  15
  16         aliases {
  17                 serial0 = &scif0;
  18                 ethernet0 = &avb;
  19                 spi0 = &rpc;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory@48000000 {
  28                 device_type = "memory";
  29                 /* first 128MB is reserved for secure area. */
  30                 reg = <0x0 0x48000000 0x0 0x38000000>;
  31         };
  32 };
  33
  34 &extal_clk {
  35         clock-frequency = <16666666>;
  36 };
  37
  38 &extalr_clk {
  39         clock-frequency = <32768>;
  40 };
  41
  42 &pfc {
  43         pinctrl-0 = <&scif_clk_pins>;
  44         pinctrl-names = "default";
  45
  46         scif0_pins: scif0 {
  47                 groups = "scif0_data";
  48                 function = "scif0";
  49         };
  50
  51         scif_clk_pins: scif_clk {
  52                 groups = "scif_clk_b";
  53                 function = "scif_clk";
  54         };
  55
  56         avb_pins: avb {
  57                 groups = "avb0_mdc";
  58                 function = "avb0";
  59         };
  60 };
  61
  62 &rpc {
  63         num-cs = <1>;
  64         status = "okay";
  65         spi-max-frequency = <50000000>;
  66         #address-cells = <1>;
  67         #size-cells = <0>;
  68
  69         flash0: spi-flash@0 {
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72                 compatible = "s25fs512s", "spi-flash", "jedec,spi-nor";
  73                 spi-max-frequency = <50000000>;
  74                 spi-tx-bus-width = <1>;
  75                 spi-rx-bus-width = <1>;
  76                 reg = <0>;
  77                 status = "okay";
  78         };
  79 };
  80
  81 &scif0 {
  82         pinctrl-0 = <&scif0_pins>;
  83         pinctrl-names = "default";
  84
  85         status = "okay";
  86 };
  87
  88 &scif_clk {
  89         clock-frequency = <14745600>;
  90         status = "okay";
  91 };
  92
  93 &avb {
  94         pinctrl-0 = <&avb_pins>;
  95         pinctrl-names = "default";
  96         renesas,no-ether-link;
  97         phy-handle = <&phy0>;
  98         status = "okay";
  99
 100         phy0: ethernet-phy@0 {
 101                 rxc-skew-ps = <1500>;
 102                 reg = <0>;
 103         };
 104 };