arch/arm/dts/r8a77965-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source extras for U-Boot on RCar R8A77965 SoC
   4  *
   5  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
   6  */
   7
   8 #include "r8a779x-u-boot.dtsi"
   9
  10 &extalr_clk {
  11         u-boot,dm-pre-reloc;
  12 };
  13
  14 &soc {
  15         rpc: rpc@0xee200000 {
  16                 compatible = "renesas,rpc-r8a77965", "renesas,rpc";
  17                 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
  18                 clocks = <&cpg CPG_MOD 917>;
  19                 bank-width = <2>;
  20                 status = "disabled";
  21         };
  22
  23         ehci0: usb@ee080100 {
  24                 compatible = "generic-ehci";
  25                 reg = <0 0xee080100 0 0x100>;
  26                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  27                 clocks = <&cpg CPG_MOD 703>;
  28                 phys = <&usb2_phy0>;
  29                 phy-names = "usb";
  30                 companion= <&ohci0>;
  31                 power-domains = <&sysc 32>;
  32                 resets = <&cpg 703>;
  33         };
  34
  35         usb2_phy0: usb-phy@ee080200 {
  36                 compatible = "renesas,usb2-phy-r8a77965",
  37                              "renesas,rcar-gen3-usb2-phy";
  38                 reg = <0 0xee080200 0 0x700>;
  39                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  40                 clocks = <&cpg CPG_MOD 703>;
  41                 power-domains = <&sysc 32>;
  42                 resets = <&cpg 703>;
  43                 #phy-cells = <0>;
  44         };
  45
  46         ehci1: usb@ee0a0100 {
  47                 compatible = "generic-ehci";
  48                 reg = <0 0xee0a0100 0 0x100>;
  49                 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
  50                 clocks = <&cpg CPG_MOD 702>;
  51                 phys = <&usb2_phy1>;
  52                 phy-names = "usb";
  53                 companion= <&ohci1>;
  54                 power-domains = <&sysc 32>;
  55                 resets = <&cpg 702>;
  56         };
  57
  58         usb2_phy1: usb-phy@ee0a0200 {
  59                 compatible = "renesas,usb2-phy-r8a77965",
  60                              "renesas,rcar-gen3-usb2-phy";
  61                 reg = <0 0xee0a0200 0 0x700>;
  62                 clocks = <&cpg CPG_MOD 702>;
  63                 power-domains = <&sysc 32>;
  64                 resets = <&cpg 702>;
  65                 #phy-cells = <0>;
  66         };
  67
  68         xhci0: usb@ee000000 {
  69                 compatible = "renesas,xhci-r8a77965",
  70                              "renesas,rcar-gen3-xhci";
  71                 reg = <0 0xee000000 0 0xc00>;
  72                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
  73                 clocks = <&cpg CPG_MOD 328>;
  74                 power-domains = <&sysc 32>;
  75                 resets = <&cpg 328>;
  76         };
  77 };