arch/arm/dts/r8a7796.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7796 SoC
   4  *
   5  * Copyright (C) 2016 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7796-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7796";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a53_0: cpu@100 {
  58                         compatible = "arm,cortex-a53", "arm,armv8";
  59                         reg = <0x100>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
  62                         next-level-cache = <&L2_CA53>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a53_1: cpu@101 {
  67                         compatible = "arm,cortex-a53","arm,armv8";
  68                         reg = <0x101>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
  71                         next-level-cache = <&L2_CA53>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 a53_2: cpu@102 {
  76                         compatible = "arm,cortex-a53","arm,armv8";
  77                         reg = <0x102>;
  78                         device_type = "cpu";
  79                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
  80                         next-level-cache = <&L2_CA53>;
  81                         enable-method = "psci";
  82                 };
  83
  84                 a53_3: cpu@103 {
  85                         compatible = "arm,cortex-a53","arm,armv8";
  86                         reg = <0x103>;
  87                         device_type = "cpu";
  88                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
  89                         next-level-cache = <&L2_CA53>;
  90                         enable-method = "psci";
  91                 };
  92
  93                 L2_CA57: cache-controller-0 {
  94                         compatible = "cache";
  95                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
  96                         cache-unified;
  97                         cache-level = <2>;
  98                 };
  99
 100                 L2_CA53: cache-controller-1 {
 101                         compatible = "cache";
 102                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 103                         cache-unified;
 104                         cache-level = <2>;
 105                 };
 106         };
 107
 108         extal_clk: extal {
 109                 compatible = "fixed-clock";
 110                 #clock-cells = <0>;
 111                 /* This value must be overridden by the board */
 112                 clock-frequency = <0>;
 113         };
 114
 115         extalr_clk: extalr {
 116                 compatible = "fixed-clock";
 117                 #clock-cells = <0>;
 118                 /* This value must be overridden by the board */
 119                 clock-frequency = <0>;
 120         };
 121
 122         /*
 123          * The external audio clocks are configured as 0 Hz fixed frequency
 124          * clocks by default.
 125          * Boards that provide audio clocks should override them.
 126          */
 127         audio_clk_a: audio_clk_a {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 clock-frequency = <0>;
 131         };
 132
 133         audio_clk_b: audio_clk_b {
 134                 compatible = "fixed-clock";
 135                 #clock-cells = <0>;
 136                 clock-frequency = <0>;
 137         };
 138
 139         audio_clk_c: audio_clk_c {
 140                 compatible = "fixed-clock";
 141                 #clock-cells = <0>;
 142                 clock-frequency = <0>;
 143         };
 144
 145         /* External CAN clock - to be overridden by boards that provide it */
 146         can_clk: can {
 147                 compatible = "fixed-clock";
 148                 #clock-cells = <0>;
 149                 clock-frequency = <0>;
 150         };
 151
 152         /* External SCIF clock - to be overridden by boards that provide it */
 153         scif_clk: scif {
 154                 compatible = "fixed-clock";
 155                 #clock-cells = <0>;
 156                 clock-frequency = <0>;
 157         };
 158
 159         /* External PCIe clock - can be overridden by the board */
 160         pcie_bus_clk: pcie_bus {
 161                 compatible = "fixed-clock";
 162                 #clock-cells = <0>;
 163                 clock-frequency = <0>;
 164         };
 165
 166         soc {
 167                 compatible = "simple-bus";
 168                 interrupt-parent = <&gic>;
 169                 #address-cells = <2>;
 170                 #size-cells = <2>;
 171                 ranges;
 172
 173                 gic: interrupt-controller@f1010000 {
 174                         compatible = "arm,gic-400";
 175                         #interrupt-cells = <3>;
 176                         #address-cells = <0>;
 177                         interrupt-controller;
 178                         reg = <0x0 0xf1010000 0 0x1000>,
 179                               <0x0 0xf1020000 0 0x20000>,
 180                               <0x0 0xf1040000 0 0x20000>,
 181                               <0x0 0xf1060000 0 0x20000>;
 182                         interrupts = <GIC_PPI 9
 183                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
 184                         clocks = <&cpg CPG_MOD 408>;
 185                         clock-names = "clk";
 186                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 187                         resets = <&cpg 408>;
 188                 };
 189
 190                 timer {
 191                         compatible = "arm,armv8-timer";
 192                         interrupts = <GIC_PPI 13
 193                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 194                                      <GIC_PPI 14
 195                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 196                                      <GIC_PPI 11
 197                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 198                                      <GIC_PPI 10
 199                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 200                 };
 201
 202                 wdt0: watchdog@e6020000 {
 203                         compatible = "renesas,r8a7796-wdt",
 204                                      "renesas,rcar-gen3-wdt";
 205                         reg = <0 0xe6020000 0 0x0c>;
 206                         clocks = <&cpg CPG_MOD 402>;
 207                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 208                         resets = <&cpg 402>;
 209                         status = "disabled";
 210                 };
 211
 212                 gpio0: gpio@e6050000 {
 213                         compatible = "renesas,gpio-r8a7796",
 214                                      "renesas,gpio-rcar";
 215                         reg = <0 0xe6050000 0 0x50>;
 216                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 217                         #gpio-cells = <2>;
 218                         gpio-controller;
 219                         gpio-ranges = <&pfc 0 0 16>;
 220                         #interrupt-cells = <2>;
 221                         interrupt-controller;
 222                         clocks = <&cpg CPG_MOD 912>;
 223                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 224                         resets = <&cpg 912>;
 225                 };
 226
 227                 gpio1: gpio@e6051000 {
 228                         compatible = "renesas,gpio-r8a7796",
 229                                      "renesas,gpio-rcar";
 230                         reg = <0 0xe6051000 0 0x50>;
 231                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 232                         #gpio-cells = <2>;
 233                         gpio-controller;
 234                         gpio-ranges = <&pfc 0 32 29>;
 235                         #interrupt-cells = <2>;
 236                         interrupt-controller;
 237                         clocks = <&cpg CPG_MOD 911>;
 238                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 239                         resets = <&cpg 911>;
 240                 };
 241
 242                 gpio2: gpio@e6052000 {
 243                         compatible = "renesas,gpio-r8a7796",
 244                                      "renesas,gpio-rcar";
 245                         reg = <0 0xe6052000 0 0x50>;
 246                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 247                         #gpio-cells = <2>;
 248                         gpio-controller;
 249                         gpio-ranges = <&pfc 0 64 15>;
 250                         #interrupt-cells = <2>;
 251                         interrupt-controller;
 252                         clocks = <&cpg CPG_MOD 910>;
 253                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 254                         resets = <&cpg 910>;
 255                 };
 256
 257                 gpio3: gpio@e6053000 {
 258                         compatible = "renesas,gpio-r8a7796",
 259                                      "renesas,gpio-rcar";
 260                         reg = <0 0xe6053000 0 0x50>;
 261                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 262                         #gpio-cells = <2>;
 263                         gpio-controller;
 264                         gpio-ranges = <&pfc 0 96 16>;
 265                         #interrupt-cells = <2>;
 266                         interrupt-controller;
 267                         clocks = <&cpg CPG_MOD 909>;
 268                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 269                         resets = <&cpg 909>;
 270                 };
 271
 272                 gpio4: gpio@e6054000 {
 273                         compatible = "renesas,gpio-r8a7796",
 274                                      "renesas,gpio-rcar";
 275                         reg = <0 0xe6054000 0 0x50>;
 276                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 277                         #gpio-cells = <2>;
 278                         gpio-controller;
 279                         gpio-ranges = <&pfc 0 128 18>;
 280                         #interrupt-cells = <2>;
 281                         interrupt-controller;
 282                         clocks = <&cpg CPG_MOD 908>;
 283                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 284                         resets = <&cpg 908>;
 285                 };
 286
 287                 gpio5: gpio@e6055000 {
 288                         compatible = "renesas,gpio-r8a7796",
 289                                      "renesas,gpio-rcar";
 290                         reg = <0 0xe6055000 0 0x50>;
 291                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 292                         #gpio-cells = <2>;
 293                         gpio-controller;
 294                         gpio-ranges = <&pfc 0 160 26>;
 295                         #interrupt-cells = <2>;
 296                         interrupt-controller;
 297                         clocks = <&cpg CPG_MOD 907>;
 298                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 299                         resets = <&cpg 907>;
 300                 };
 301
 302                 gpio6: gpio@e6055400 {
 303                         compatible = "renesas,gpio-r8a7796",
 304                                      "renesas,gpio-rcar";
 305                         reg = <0 0xe6055400 0 0x50>;
 306                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 307                         #gpio-cells = <2>;
 308                         gpio-controller;
 309                         gpio-ranges = <&pfc 0 192 32>;
 310                         #interrupt-cells = <2>;
 311                         interrupt-controller;
 312                         clocks = <&cpg CPG_MOD 906>;
 313                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 314                         resets = <&cpg 906>;
 315                 };
 316
 317                 gpio7: gpio@e6055800 {
 318                         compatible = "renesas,gpio-r8a7796",
 319                                      "renesas,gpio-rcar";
 320                         reg = <0 0xe6055800 0 0x50>;
 321                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 322                         #gpio-cells = <2>;
 323                         gpio-controller;
 324                         gpio-ranges = <&pfc 0 224 4>;
 325                         #interrupt-cells = <2>;
 326                         interrupt-controller;
 327                         clocks = <&cpg CPG_MOD 905>;
 328                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 329                         resets = <&cpg 905>;
 330                 };
 331
 332                 pfc: pin-controller@e6060000 {
 333                         compatible = "renesas,pfc-r8a7796";
 334                         reg = <0 0xe6060000 0 0x50c>;
 335                 };
 336
 337                 pmu_a57 {
 338                         compatible = "arm,cortex-a57-pmu";
 339                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 340                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 341                         interrupt-affinity = <&a57_0>,
 342                                              <&a57_1>;
 343                 };
 344
 345                 pmu_a53 {
 346                         compatible = "arm,cortex-a53-pmu";
 347                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 348                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 350                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 351                         interrupt-affinity = <&a53_0>,
 352                                              <&a53_1>,
 353                                              <&a53_2>,
 354                                              <&a53_3>;
 355                 };
 356
 357                 cpg: clock-controller@e6150000 {
 358                         compatible = "renesas,r8a7796-cpg-mssr";
 359                         reg = <0 0xe6150000 0 0x1000>;
 360                         clocks = <&extal_clk>, <&extalr_clk>;
 361                         clock-names = "extal", "extalr";
 362                         #clock-cells = <2>;
 363                         #power-domain-cells = <0>;
 364                         #reset-cells = <1>;
 365                 };
 366
 367                 rst: reset-controller@e6160000 {
 368                         compatible = "renesas,r8a7796-rst";
 369                         reg = <0 0xe6160000 0 0x0200>;
 370                 };
 371
 372                 prr: chipid@fff00044 {
 373                         compatible = "renesas,prr";
 374                         reg = <0 0xfff00044 0 4>;
 375                 };
 376
 377                 sysc: system-controller@e6180000 {
 378                         compatible = "renesas,r8a7796-sysc";
 379                         reg = <0 0xe6180000 0 0x0400>;
 380                         #power-domain-cells = <1>;
 381                 };
 382
 383                 i2c_dvfs: i2c@e60b0000 {
 384                         #address-cells = <1>;
 385                         #size-cells = <0>;
 386                         compatible = "renesas,iic-r8a7796",
 387                                      "renesas,rcar-gen3-iic",
 388                                      "renesas,rmobile-iic";
 389                         reg = <0 0xe60b0000 0 0x425>;
 390                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 391                         clocks = <&cpg CPG_MOD 926>;
 392                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 393                         resets = <&cpg 926>;
 394                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 395                         dma-names = "tx", "rx";
 396                         status = "disabled";
 397                 };
 398
 399                 pwm0: pwm@e6e30000 {
 400                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 401                         reg = <0 0xe6e30000 0 8>;
 402                         #pwm-cells = <2>;
 403                         clocks = <&cpg CPG_MOD 523>;
 404                         resets = <&cpg 523>;
 405                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 406                         status = "disabled";
 407                 };
 408
 409                 pwm1: pwm@e6e31000 {
 410                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 411                         reg = <0 0xe6e31000 0 8>;
 412                         #pwm-cells = <2>;
 413                         clocks = <&cpg CPG_MOD 523>;
 414                         resets = <&cpg 523>;
 415                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 416                         status = "disabled";
 417                 };
 418
 419                 pwm2: pwm@e6e32000 {
 420                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 421                         reg = <0 0xe6e32000 0 8>;
 422                         #pwm-cells = <2>;
 423                         clocks = <&cpg CPG_MOD 523>;
 424                         resets = <&cpg 523>;
 425                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 426                         status = "disabled";
 427                 };
 428
 429                 pwm3: pwm@e6e33000 {
 430                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 431                         reg = <0 0xe6e33000 0 8>;
 432                         #pwm-cells = <2>;
 433                         clocks = <&cpg CPG_MOD 523>;
 434                         resets = <&cpg 523>;
 435                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 436                         status = "disabled";
 437                 };
 438
 439                 pwm4: pwm@e6e34000 {
 440                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 441                         reg = <0 0xe6e34000 0 8>;
 442                         #pwm-cells = <2>;
 443                         clocks = <&cpg CPG_MOD 523>;
 444                         resets = <&cpg 523>;
 445                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 446                         status = "disabled";
 447                 };
 448
 449                 pwm5: pwm@e6e35000 {
 450                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 451                         reg = <0 0xe6e35000 0 8>;
 452                         #pwm-cells = <2>;
 453                         clocks = <&cpg CPG_MOD 523>;
 454                         resets = <&cpg 523>;
 455                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 456                         status = "disabled";
 457                 };
 458
 459                 pwm6: pwm@e6e36000 {
 460                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 461                         reg = <0 0xe6e36000 0 8>;
 462                         #pwm-cells = <2>;
 463                         clocks = <&cpg CPG_MOD 523>;
 464                         resets = <&cpg 523>;
 465                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 466                         status = "disabled";
 467                 };
 468
 469                 i2c0: i2c@e6500000 {
 470                         #address-cells = <1>;
 471                         #size-cells = <0>;
 472                         compatible = "renesas,i2c-r8a7796",
 473                                      "renesas,rcar-gen3-i2c";
 474                         reg = <0 0xe6500000 0 0x40>;
 475                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 476                         clocks = <&cpg CPG_MOD 931>;
 477                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 478                         resets = <&cpg 931>;
 479                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 480                                <&dmac2 0x91>, <&dmac2 0x90>;
 481                         dma-names = "tx", "rx", "tx", "rx";
 482                         i2c-scl-internal-delay-ns = <110>;
 483                         status = "disabled";
 484                 };
 485
 486                 i2c1: i2c@e6508000 {
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         compatible = "renesas,i2c-r8a7796",
 490                                      "renesas,rcar-gen3-i2c";
 491                         reg = <0 0xe6508000 0 0x40>;
 492                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 493                         clocks = <&cpg CPG_MOD 930>;
 494                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 495                         resets = <&cpg 930>;
 496                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 497                                <&dmac2 0x93>, <&dmac2 0x92>;
 498                         dma-names = "tx", "rx", "tx", "rx";
 499                         i2c-scl-internal-delay-ns = <6>;
 500                         status = "disabled";
 501                 };
 502
 503                 i2c2: i2c@e6510000 {
 504                         #address-cells = <1>;
 505                         #size-cells = <0>;
 506                         compatible = "renesas,i2c-r8a7796",
 507                                      "renesas,rcar-gen3-i2c";
 508                         reg = <0 0xe6510000 0 0x40>;
 509                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 510                         clocks = <&cpg CPG_MOD 929>;
 511                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 512                         resets = <&cpg 929>;
 513                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 514                                <&dmac2 0x95>, <&dmac2 0x94>;
 515                         dma-names = "tx", "rx", "tx", "rx";
 516                         i2c-scl-internal-delay-ns = <6>;
 517                         status = "disabled";
 518                 };
 519
 520                 i2c3: i2c@e66d0000 {
 521                         #address-cells = <1>;
 522                         #size-cells = <0>;
 523                         compatible = "renesas,i2c-r8a7796",
 524                                      "renesas,rcar-gen3-i2c";
 525                         reg = <0 0xe66d0000 0 0x40>;
 526                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 527                         clocks = <&cpg CPG_MOD 928>;
 528                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 529                         resets = <&cpg 928>;
 530                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 531                         dma-names = "tx", "rx";
 532                         i2c-scl-internal-delay-ns = <110>;
 533                         status = "disabled";
 534                 };
 535
 536                 i2c4: i2c@e66d8000 {
 537                         #address-cells = <1>;
 538                         #size-cells = <0>;
 539                         compatible = "renesas,i2c-r8a7796",
 540                                      "renesas,rcar-gen3-i2c";
 541                         reg = <0 0xe66d8000 0 0x40>;
 542                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 543                         clocks = <&cpg CPG_MOD 927>;
 544                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 545                         resets = <&cpg 927>;
 546                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 547                         dma-names = "tx", "rx";
 548                         i2c-scl-internal-delay-ns = <110>;
 549                         status = "disabled";
 550                 };
 551
 552                 i2c5: i2c@e66e0000 {
 553                         #address-cells = <1>;
 554                         #size-cells = <0>;
 555                         compatible = "renesas,i2c-r8a7796",
 556                                      "renesas,rcar-gen3-i2c";
 557                         reg = <0 0xe66e0000 0 0x40>;
 558                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 559                         clocks = <&cpg CPG_MOD 919>;
 560                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 561                         resets = <&cpg 919>;
 562                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 563                         dma-names = "tx", "rx";
 564                         i2c-scl-internal-delay-ns = <110>;
 565                         status = "disabled";
 566                 };
 567
 568                 i2c6: i2c@e66e8000 {
 569                         #address-cells = <1>;
 570                         #size-cells = <0>;
 571                         compatible = "renesas,i2c-r8a7796",
 572                                      "renesas,rcar-gen3-i2c";
 573                         reg = <0 0xe66e8000 0 0x40>;
 574                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 575                         clocks = <&cpg CPG_MOD 918>;
 576                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 577                         resets = <&cpg 918>;
 578                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 579                         dma-names = "tx", "rx";
 580                         i2c-scl-internal-delay-ns = <6>;
 581                         status = "disabled";
 582                 };
 583
 584                 can0: can@e6c30000 {
 585                         compatible = "renesas,can-r8a7796",
 586                                      "renesas,rcar-gen3-can";
 587                         reg = <0 0xe6c30000 0 0x1000>;
 588                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 589                         clocks = <&cpg CPG_MOD 916>,
 590                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 591                                <&can_clk>;
 592                         clock-names = "clkp1", "clkp2", "can_clk";
 593                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 594                         assigned-clock-rates = <40000000>;
 595                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 596                         resets = <&cpg 916>;
 597                         status = "disabled";
 598                 };
 599
 600                 can1: can@e6c38000 {
 601                         compatible = "renesas,can-r8a7796",
 602                                      "renesas,rcar-gen3-can";
 603                         reg = <0 0xe6c38000 0 0x1000>;
 604                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 605                         clocks = <&cpg CPG_MOD 915>,
 606                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 607                                <&can_clk>;
 608                         clock-names = "clkp1", "clkp2", "can_clk";
 609                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 610                         assigned-clock-rates = <40000000>;
 611                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 612                         resets = <&cpg 915>;
 613                         status = "disabled";
 614                 };
 615
 616                 canfd: can@e66c0000 {
 617                         compatible = "renesas,r8a7796-canfd",
 618                                      "renesas,rcar-gen3-canfd";
 619                         reg = <0 0xe66c0000 0 0x8000>;
 620                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 621                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 622                         clocks = <&cpg CPG_MOD 914>,
 623                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 624                                <&can_clk>;
 625                         clock-names = "fck", "canfd", "can_clk";
 626                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 627                         assigned-clock-rates = <40000000>;
 628                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 629                         resets = <&cpg 914>;
 630                         status = "disabled";
 631
 632                         channel0 {
 633                                 status = "disabled";
 634                         };
 635
 636                         channel1 {
 637                                 status = "disabled";
 638                         };
 639                 };
 640
 641                 drif00: rif@e6f40000 {
 642                         compatible = "renesas,r8a7796-drif",
 643                                      "renesas,rcar-gen3-drif";
 644                         reg = <0 0xe6f40000 0 0x64>;
 645                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 646                         clocks = <&cpg CPG_MOD 515>;
 647                         clock-names = "fck";
 648                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
 649                         dma-names = "rx", "rx";
 650                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 651                         resets = <&cpg 515>;
 652                         renesas,bonding = <&drif01>;
 653                         status = "disabled";
 654                 };
 655
 656                 drif01: rif@e6f50000 {
 657                         compatible = "renesas,r8a7796-drif",
 658                                      "renesas,rcar-gen3-drif";
 659                         reg = <0 0xe6f50000 0 0x64>;
 660                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 661                         clocks = <&cpg CPG_MOD 514>;
 662                         clock-names = "fck";
 663                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
 664                         dma-names = "rx", "rx";
 665                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 666                         resets = <&cpg 514>;
 667                         renesas,bonding = <&drif00>;
 668                         status = "disabled";
 669                 };
 670
 671                 drif10: rif@e6f60000 {
 672                         compatible = "renesas,r8a7796-drif",
 673                                      "renesas,rcar-gen3-drif";
 674                         reg = <0 0xe6f60000 0 0x64>;
 675                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 676                         clocks = <&cpg CPG_MOD 513>;
 677                         clock-names = "fck";
 678                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
 679                         dma-names = "rx", "rx";
 680                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 681                         resets = <&cpg 513>;
 682                         renesas,bonding = <&drif11>;
 683                         status = "disabled";
 684                 };
 685
 686                 drif11: rif@e6f70000 {
 687                         compatible = "renesas,r8a7796-drif",
 688                                      "renesas,rcar-gen3-drif";
 689                         reg = <0 0xe6f70000 0 0x64>;
 690                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 691                         clocks = <&cpg CPG_MOD 512>;
 692                         clock-names = "fck";
 693                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
 694                         dma-names = "rx", "rx";
 695                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 696                         resets = <&cpg 512>;
 697                         renesas,bonding = <&drif10>;
 698                         status = "disabled";
 699                 };
 700
 701                 drif20: rif@e6f80000 {
 702                         compatible = "renesas,r8a7796-drif",
 703                                      "renesas,rcar-gen3-drif";
 704                         reg = <0 0xe6f80000 0 0x64>;
 705                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 511>;
 707                         clock-names = "fck";
 708                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
 709                         dma-names = "rx", "rx";
 710                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 711                         resets = <&cpg 511>;
 712                         renesas,bonding = <&drif21>;
 713                         status = "disabled";
 714                 };
 715
 716                 drif21: rif@e6f90000 {
 717                         compatible = "renesas,r8a7796-drif",
 718                                      "renesas,rcar-gen3-drif";
 719                         reg = <0 0xe6f90000 0 0x64>;
 720                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 510>;
 722                         clock-names = "fck";
 723                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
 724                         dma-names = "rx", "rx";
 725                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 726                         resets = <&cpg 510>;
 727                         renesas,bonding = <&drif20>;
 728                         status = "disabled";
 729                 };
 730
 731                 drif30: rif@e6fa0000 {
 732                         compatible = "renesas,r8a7796-drif",
 733                                      "renesas,rcar-gen3-drif";
 734                         reg = <0 0xe6fa0000 0 0x64>;
 735                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 736                         clocks = <&cpg CPG_MOD 509>;
 737                         clock-names = "fck";
 738                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
 739                         dma-names = "rx", "rx";
 740                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 741                         resets = <&cpg 509>;
 742                         renesas,bonding = <&drif31>;
 743                         status = "disabled";
 744                 };
 745
 746                 drif31: rif@e6fb0000 {
 747                         compatible = "renesas,r8a7796-drif",
 748                                      "renesas,rcar-gen3-drif";
 749                         reg = <0 0xe6fb0000 0 0x64>;
 750                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 751                         clocks = <&cpg CPG_MOD 508>;
 752                         clock-names = "fck";
 753                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
 754                         dma-names = "rx", "rx";
 755                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 756                         resets = <&cpg 508>;
 757                         renesas,bonding = <&drif30>;
 758                         status = "disabled";
 759                 };
 760
 761                 avb: ethernet@e6800000 {
 762                         compatible = "renesas,etheravb-r8a7796",
 763                                      "renesas,etheravb-rcar-gen3";
 764                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 765                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 766                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 767                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 768                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 769                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 770                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 780                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 781                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 782                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 783                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 784                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 785                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 786                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 787                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 788                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 789                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 790                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 791                                           "ch4", "ch5", "ch6", "ch7",
 792                                           "ch8", "ch9", "ch10", "ch11",
 793                                           "ch12", "ch13", "ch14", "ch15",
 794                                           "ch16", "ch17", "ch18", "ch19",
 795                                           "ch20", "ch21", "ch22", "ch23",
 796                                           "ch24";
 797                         clocks = <&cpg CPG_MOD 812>;
 798                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 799                         resets = <&cpg 812>;
 800                         phy-mode = "rgmii-txid";
 801                         #address-cells = <1>;
 802                         #size-cells = <0>;
 803                         status = "disabled";
 804                 };
 805
 806                 hscif0: serial@e6540000 {
 807                         compatible = "renesas,hscif-r8a7796",
 808                                      "renesas,rcar-gen3-hscif",
 809                                      "renesas,hscif";
 810                         reg = <0 0xe6540000 0 0x60>;
 811                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 812                         clocks = <&cpg CPG_MOD 520>,
 813                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 814                                  <&scif_clk>;
 815                         clock-names = "fck", "brg_int", "scif_clk";
 816                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 817                                <&dmac2 0x31>, <&dmac2 0x30>;
 818                         dma-names = "tx", "rx", "tx", "rx";
 819                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 820                         resets = <&cpg 520>;
 821                         status = "disabled";
 822                 };
 823
 824                 hscif1: serial@e6550000 {
 825                         compatible = "renesas,hscif-r8a7796",
 826                                      "renesas,rcar-gen3-hscif",
 827                                      "renesas,hscif";
 828                         reg = <0 0xe6550000 0 0x60>;
 829                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 830                         clocks = <&cpg CPG_MOD 519>,
 831                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 832                                  <&scif_clk>;
 833                         clock-names = "fck", "brg_int", "scif_clk";
 834                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 835                                <&dmac2 0x33>, <&dmac2 0x32>;
 836                         dma-names = "tx", "rx", "tx", "rx";
 837                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 838                         resets = <&cpg 519>;
 839                         status = "disabled";
 840                 };
 841
 842                 hscif2: serial@e6560000 {
 843                         compatible = "renesas,hscif-r8a7796",
 844                                      "renesas,rcar-gen3-hscif",
 845                                      "renesas,hscif";
 846                         reg = <0 0xe6560000 0 0x60>;
 847                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 518>,
 849                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 850                                  <&scif_clk>;
 851                         clock-names = "fck", "brg_int", "scif_clk";
 852                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 853                                <&dmac2 0x35>, <&dmac2 0x34>;
 854                         dma-names = "tx", "rx", "tx", "rx";
 855                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 856                         resets = <&cpg 518>;
 857                         status = "disabled";
 858                 };
 859
 860                 hscif3: serial@e66a0000 {
 861                         compatible = "renesas,hscif-r8a7796",
 862                                      "renesas,rcar-gen3-hscif",
 863                                      "renesas,hscif";
 864                         reg = <0 0xe66a0000 0 0x60>;
 865                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 866                         clocks = <&cpg CPG_MOD 517>,
 867                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 868                                  <&scif_clk>;
 869                         clock-names = "fck", "brg_int", "scif_clk";
 870                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 871                         dma-names = "tx", "rx";
 872                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 873                         resets = <&cpg 517>;
 874                         status = "disabled";
 875                 };
 876
 877                 hscif4: serial@e66b0000 {
 878                         compatible = "renesas,hscif-r8a7796",
 879                                      "renesas,rcar-gen3-hscif",
 880                                      "renesas,hscif";
 881                         reg = <0 0xe66b0000 0 0x60>;
 882                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 883                         clocks = <&cpg CPG_MOD 516>,
 884                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 885                                  <&scif_clk>;
 886                         clock-names = "fck", "brg_int", "scif_clk";
 887                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 888                         dma-names = "tx", "rx";
 889                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 890                         resets = <&cpg 516>;
 891                         status = "disabled";
 892                 };
 893
 894                 scif0: serial@e6e60000 {
 895                         compatible = "renesas,scif-r8a7796",
 896                                      "renesas,rcar-gen3-scif", "renesas,scif";
 897                         reg = <0 0xe6e60000 0 64>;
 898                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 899                         clocks = <&cpg CPG_MOD 207>,
 900                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 901                                  <&scif_clk>;
 902                         clock-names = "fck", "brg_int", "scif_clk";
 903                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 904                                <&dmac2 0x51>, <&dmac2 0x50>;
 905                         dma-names = "tx", "rx", "tx", "rx";
 906                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 907                         resets = <&cpg 207>;
 908                         status = "disabled";
 909                 };
 910
 911                 scif1: serial@e6e68000 {
 912                         compatible = "renesas,scif-r8a7796",
 913                                      "renesas,rcar-gen3-scif", "renesas,scif";
 914                         reg = <0 0xe6e68000 0 64>;
 915                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 916                         clocks = <&cpg CPG_MOD 206>,
 917                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 918                                  <&scif_clk>;
 919                         clock-names = "fck", "brg_int", "scif_clk";
 920                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 921                                <&dmac2 0x53>, <&dmac2 0x52>;
 922                         dma-names = "tx", "rx", "tx", "rx";
 923                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 924                         resets = <&cpg 206>;
 925                         status = "disabled";
 926                 };
 927
 928                 scif2: serial@e6e88000 {
 929                         compatible = "renesas,scif-r8a7796",
 930                                      "renesas,rcar-gen3-scif", "renesas,scif";
 931                         reg = <0 0xe6e88000 0 64>;
 932                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 933                         clocks = <&cpg CPG_MOD 310>,
 934                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 935                                  <&scif_clk>;
 936                         clock-names = "fck", "brg_int", "scif_clk";
 937                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 938                         resets = <&cpg 310>;
 939                         status = "disabled";
 940                 };
 941
 942                 scif3: serial@e6c50000 {
 943                         compatible = "renesas,scif-r8a7796",
 944                                      "renesas,rcar-gen3-scif", "renesas,scif";
 945                         reg = <0 0xe6c50000 0 64>;
 946                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 947                         clocks = <&cpg CPG_MOD 204>,
 948                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 949                                  <&scif_clk>;
 950                         clock-names = "fck", "brg_int", "scif_clk";
 951                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 952                         dma-names = "tx", "rx";
 953                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 954                         resets = <&cpg 204>;
 955                         status = "disabled";
 956                 };
 957
 958                 scif4: serial@e6c40000 {
 959                         compatible = "renesas,scif-r8a7796",
 960                                      "renesas,rcar-gen3-scif", "renesas,scif";
 961                         reg = <0 0xe6c40000 0 64>;
 962                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 963                         clocks = <&cpg CPG_MOD 203>,
 964                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 965                                  <&scif_clk>;
 966                         clock-names = "fck", "brg_int", "scif_clk";
 967                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 968                         dma-names = "tx", "rx";
 969                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 970                         resets = <&cpg 203>;
 971                         status = "disabled";
 972                 };
 973
 974                 scif5: serial@e6f30000 {
 975                         compatible = "renesas,scif-r8a7796",
 976                                      "renesas,rcar-gen3-scif", "renesas,scif";
 977                         reg = <0 0xe6f30000 0 64>;
 978                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 979                         clocks = <&cpg CPG_MOD 202>,
 980                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 981                                  <&scif_clk>;
 982                         clock-names = "fck", "brg_int", "scif_clk";
 983                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
 984                                <&dmac2 0x5b>, <&dmac2 0x5a>;
 985                         dma-names = "tx", "rx", "tx", "rx";
 986                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 987                         resets = <&cpg 202>;
 988                         status = "disabled";
 989                 };
 990
 991                 msiof0: spi@e6e90000 {
 992                         compatible = "renesas,msiof-r8a7796",
 993                                      "renesas,rcar-gen3-msiof";
 994                         reg = <0 0xe6e90000 0 0x0064>;
 995                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 996                         clocks = <&cpg CPG_MOD 211>;
 997                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 998                                <&dmac2 0x41>, <&dmac2 0x40>;
 999                         dma-names = "tx", "rx", "tx", "rx";
1000                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1001                         resets = <&cpg 211>;
1002                         #address-cells = <1>;
1003                         #size-cells = <0>;
1004                         status = "disabled";
1005                 };
1006
1007                 msiof1: spi@e6ea0000 {
1008                         compatible = "renesas,msiof-r8a7796",
1009                                      "renesas,rcar-gen3-msiof";
1010                         reg = <0 0xe6ea0000 0 0x0064>;
1011                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1012                         clocks = <&cpg CPG_MOD 210>;
1013                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1014                                <&dmac2 0x43>, <&dmac2 0x42>;
1015                         dma-names = "tx", "rx", "tx", "rx";
1016                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1017                         resets = <&cpg 210>;
1018                         #address-cells = <1>;
1019                         #size-cells = <0>;
1020                         status = "disabled";
1021                 };
1022
1023                 msiof2: spi@e6c00000 {
1024                         compatible = "renesas,msiof-r8a7796",
1025                                      "renesas,rcar-gen3-msiof";
1026                         reg = <0 0xe6c00000 0 0x0064>;
1027                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1028                         clocks = <&cpg CPG_MOD 209>;
1029                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1030                         dma-names = "tx", "rx";
1031                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1032                         resets = <&cpg 209>;
1033                         #address-cells = <1>;
1034                         #size-cells = <0>;
1035                         status = "disabled";
1036                 };
1037
1038                 msiof3: spi@e6c10000 {
1039                         compatible = "renesas,msiof-r8a7796",
1040                                      "renesas,rcar-gen3-msiof";
1041                         reg = <0 0xe6c10000 0 0x0064>;
1042                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1043                         clocks = <&cpg CPG_MOD 208>;
1044                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1045                         dma-names = "tx", "rx";
1046                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1047                         resets = <&cpg 208>;
1048                         #address-cells = <1>;
1049                         #size-cells = <0>;
1050                         status = "disabled";
1051                 };
1052
1053                 dmac0: dma-controller@e6700000 {
1054                         compatible = "renesas,dmac-r8a7796",
1055                                      "renesas,rcar-dmac";
1056                         reg = <0 0xe6700000 0 0x10000>;
1057                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
1058                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
1059                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
1060                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
1061                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
1062                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
1063                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
1064                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
1065                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
1066                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
1067                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
1068                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
1069                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
1070                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
1071                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
1072                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
1073                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1074                         interrupt-names = "error",
1075                                         "ch0", "ch1", "ch2", "ch3",
1076                                         "ch4", "ch5", "ch6", "ch7",
1077                                         "ch8", "ch9", "ch10", "ch11",
1078                                         "ch12", "ch13", "ch14", "ch15";
1079                         clocks = <&cpg CPG_MOD 219>;
1080                         clock-names = "fck";
1081                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1082                         resets = <&cpg 219>;
1083                         #dma-cells = <1>;
1084                         dma-channels = <16>;
1085                 };
1086
1087                 dmac1: dma-controller@e7300000 {
1088                         compatible = "renesas,dmac-r8a7796",
1089                                      "renesas,rcar-dmac";
1090                         reg = <0 0xe7300000 0 0x10000>;
1091                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
1092                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
1093                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
1094                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
1095                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
1096                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
1097                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
1098                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
1099                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
1100                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
1101                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
1102                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
1103                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
1104                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
1105                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
1106                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
1107                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1108                         interrupt-names = "error",
1109                                         "ch0", "ch1", "ch2", "ch3",
1110                                         "ch4", "ch5", "ch6", "ch7",
1111                                         "ch8", "ch9", "ch10", "ch11",
1112                                         "ch12", "ch13", "ch14", "ch15";
1113                         clocks = <&cpg CPG_MOD 218>;
1114                         clock-names = "fck";
1115                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1116                         resets = <&cpg 218>;
1117                         #dma-cells = <1>;
1118                         dma-channels = <16>;
1119                 };
1120
1121                 dmac2: dma-controller@e7310000 {
1122                         compatible = "renesas,dmac-r8a7796",
1123                                      "renesas,rcar-dmac";
1124                         reg = <0 0xe7310000 0 0x10000>;
1125                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1126                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1127                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1128                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1129                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1130                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1131                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1132                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1133                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1134                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1135                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1136                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1137                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1138                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1139                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1140                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1141                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1142                         interrupt-names = "error",
1143                                         "ch0", "ch1", "ch2", "ch3",
1144                                         "ch4", "ch5", "ch6", "ch7",
1145                                         "ch8", "ch9", "ch10", "ch11",
1146                                         "ch12", "ch13", "ch14", "ch15";
1147                         clocks = <&cpg CPG_MOD 217>;
1148                         clock-names = "fck";
1149                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1150                         resets = <&cpg 217>;
1151                         #dma-cells = <1>;
1152                         dma-channels = <16>;
1153                 };
1154
1155                 audma0: dma-controller@ec700000 {
1156                         compatible = "renesas,dmac-r8a7796",
1157                                      "renesas,rcar-dmac";
1158                         reg = <0 0xec700000 0 0x10000>;
1159                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1160                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1161                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1162                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1163                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1164                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1165                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1166                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1167                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1168                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1169                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1170                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1171                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1172                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1173                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1174                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1175                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1176                         interrupt-names = "error",
1177                                         "ch0", "ch1", "ch2", "ch3",
1178                                         "ch4", "ch5", "ch6", "ch7",
1179                                         "ch8", "ch9", "ch10", "ch11",
1180                                         "ch12", "ch13", "ch14", "ch15";
1181                         clocks = <&cpg CPG_MOD 502>;
1182                         clock-names = "fck";
1183                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1184                         resets = <&cpg 502>;
1185                         #dma-cells = <1>;
1186                         dma-channels = <16>;
1187                 };
1188
1189                 audma1: dma-controller@ec720000 {
1190                         compatible = "renesas,dmac-r8a7796",
1191                                      "renesas,rcar-dmac";
1192                         reg = <0 0xec720000 0 0x10000>;
1193                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1194                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1195                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1196                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1197                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1198                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1199                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1200                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1201                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1202                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1203                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1204                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1205                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1206                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1207                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1208                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1209                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1210                         interrupt-names = "error",
1211                                         "ch0", "ch1", "ch2", "ch3",
1212                                         "ch4", "ch5", "ch6", "ch7",
1213                                         "ch8", "ch9", "ch10", "ch11",
1214                                         "ch12", "ch13", "ch14", "ch15";
1215                         clocks = <&cpg CPG_MOD 501>;
1216                         clock-names = "fck";
1217                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1218                         resets = <&cpg 501>;
1219                         #dma-cells = <1>;
1220                         dma-channels = <16>;
1221                 };
1222
1223                 usb_dmac0: dma-controller@e65a0000 {
1224                         compatible = "renesas,r8a7796-usb-dmac",
1225                                      "renesas,usb-dmac";
1226                         reg = <0 0xe65a0000 0 0x100>;
1227                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1228                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1229                         interrupt-names = "ch0", "ch1";
1230                         clocks = <&cpg CPG_MOD 330>;
1231                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1232                         resets = <&cpg 330>;
1233                         #dma-cells = <1>;
1234                         dma-channels = <2>;
1235                 };
1236
1237                 usb_dmac1: dma-controller@e65b0000 {
1238                         compatible = "renesas,r8a7796-usb-dmac",
1239                                      "renesas,usb-dmac";
1240                         reg = <0 0xe65b0000 0 0x100>;
1241                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1242                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1243                         interrupt-names = "ch0", "ch1";
1244                         clocks = <&cpg CPG_MOD 331>;
1245                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1246                         resets = <&cpg 331>;
1247                         #dma-cells = <1>;
1248                         dma-channels = <2>;
1249                 };
1250
1251                 hsusb: usb@e6590000 {
1252                         compatible = "renesas,usbhs-r8a7796",
1253                                      "renesas,rcar-gen3-usbhs";
1254                         reg = <0 0xe6590000 0 0x100>;
1255                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1256                         clocks = <&cpg CPG_MOD 704>;
1257                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1258                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1259                         dma-names = "ch0", "ch1", "ch2", "ch3";
1260                         renesas,buswait = <11>;
1261                         phys = <&usb2_phy0>;
1262                         phy-names = "usb";
1263                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1264                         resets = <&cpg 704>;
1265                         status = "disabled";
1266                 };
1267
1268                 xhci0: usb@ee000000 {
1269                         compatible = "renesas,xhci-r8a7796",
1270                                      "renesas,rcar-gen3-xhci";
1271                         reg = <0 0xee000000 0 0xc00>;
1272                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1273                         clocks = <&cpg CPG_MOD 328>;
1274                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1275                         resets = <&cpg 328>;
1276                         status = "disabled";
1277                 };
1278
1279                 ohci0: usb@ee080000 {
1280                         compatible = "generic-ohci";
1281                         reg = <0 0xee080000 0 0x100>;
1282                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1283                         clocks = <&cpg CPG_MOD 703>;
1284                         phys = <&usb2_phy0>;
1285                         phy-names = "usb";
1286                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1287                         resets = <&cpg 703>;
1288                         status = "disabled";
1289                 };
1290
1291                 ehci0: usb@ee080100 {
1292                         compatible = "generic-ehci";
1293                         reg = <0 0xee080100 0 0x100>;
1294                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1295                         clocks = <&cpg CPG_MOD 703>;
1296                         phys = <&usb2_phy0>;
1297                         phy-names = "usb";
1298                         companion= <&ohci0>;
1299                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1300                         resets = <&cpg 703>;
1301                         status = "disabled";
1302                 };
1303
1304                 usb2_phy0: usb-phy@ee080200 {
1305                         compatible = "renesas,usb2-phy-r8a7796",
1306                                      "renesas,rcar-gen3-usb2-phy";
1307                         reg = <0 0xee080200 0 0x700>;
1308                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1309                         clocks = <&cpg CPG_MOD 703>;
1310                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1311                         resets = <&cpg 703>;
1312                         #phy-cells = <0>;
1313                         status = "disabled";
1314                 };
1315
1316                 ohci1: usb@ee0a0000 {
1317                         compatible = "generic-ohci";
1318                         reg = <0 0xee0a0000 0 0x100>;
1319                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1320                         clocks = <&cpg CPG_MOD 702>;
1321                         phys = <&usb2_phy1>;
1322                         phy-names = "usb";
1323                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1324                         resets = <&cpg 702>;
1325                         status = "disabled";
1326                 };
1327
1328                 ehci1: usb@ee0a0100 {
1329                         compatible = "generic-ehci";
1330                         reg = <0 0xee0a0100 0 0x100>;
1331                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1332                         clocks = <&cpg CPG_MOD 702>;
1333                         phys = <&usb2_phy1>;
1334                         phy-names = "usb";
1335                         companion= <&ohci1>;
1336                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1337                         resets = <&cpg 702>;
1338                         status = "disabled";
1339                 };
1340
1341                 usb2_phy1: usb-phy@ee0a0200 {
1342                         compatible = "renesas,usb2-phy-r8a7796",
1343                                      "renesas,rcar-gen3-usb2-phy";
1344                         reg = <0 0xee0a0200 0 0x700>;
1345                         clocks = <&cpg CPG_MOD 702>;
1346                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1347                         resets = <&cpg 702>;
1348                         #phy-cells = <0>;
1349                         status = "disabled";
1350                 };
1351
1352                 rpc: rpc@0xee200000 {
1353                         compatible = "renesas,rpc-r8a7796", "renesas,rpc";
1354                         reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
1355                         clocks = <&cpg CPG_MOD 917>;
1356                         bank-width = <2>;
1357                         status = "disabled";
1358                 };
1359
1360                 sdhi0: sd@ee100000 {
1361                         compatible = "renesas,sdhi-r8a7796";
1362                         reg = <0 0xee100000 0 0x2000>;
1363                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1364                         clocks = <&cpg CPG_MOD 314>;
1365                         max-frequency = <200000000>;
1366                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1367                         resets = <&cpg 314>;
1368                         status = "disabled";
1369                 };
1370
1371                 sdhi1: sd@ee120000 {
1372                         compatible = "renesas,sdhi-r8a7796";
1373                         reg = <0 0xee120000 0 0x2000>;
1374                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1375                         clocks = <&cpg CPG_MOD 313>;
1376                         max-frequency = <200000000>;
1377                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1378                         resets = <&cpg 313>;
1379                         status = "disabled";
1380                 };
1381
1382                 sdhi2: sd@ee140000 {
1383                         compatible = "renesas,sdhi-r8a7796";
1384                         reg = <0 0xee140000 0 0x2000>;
1385                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1386                         clocks = <&cpg CPG_MOD 312>;
1387                         max-frequency = <200000000>;
1388                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1389                         resets = <&cpg 312>;
1390                         status = "disabled";
1391                 };
1392
1393                 sdhi3: sd@ee160000 {
1394                         compatible = "renesas,sdhi-r8a7796";
1395                         reg = <0 0xee160000 0 0x2000>;
1396                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1397                         clocks = <&cpg CPG_MOD 311>;
1398                         max-frequency = <200000000>;
1399                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1400                         resets = <&cpg 311>;
1401                         status = "disabled";
1402                 };
1403
1404                 tsc: thermal@e6198000 {
1405                         compatible = "renesas,r8a7796-thermal";
1406                         reg = <0 0xe6198000 0 0x68>,
1407                               <0 0xe61a0000 0 0x5c>,
1408                               <0 0xe61a8000 0 0x5c>;
1409                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1410                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1411                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1412                         clocks = <&cpg CPG_MOD 522>;
1413                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1414                         resets = <&cpg 522>;
1415                         #thermal-sensor-cells = <1>;
1416                         status = "okay";
1417                 };
1418
1419                 thermal-zones {
1420                         sensor_thermal1: sensor-thermal1 {
1421                                 polling-delay-passive = <250>;
1422                                 polling-delay = <1000>;
1423                                 thermal-sensors = <&tsc 0>;
1424
1425                                 trips {
1426                                         sensor1_crit: sensor1-crit {
1427                                                 temperature = <120000>;
1428                                                 hysteresis = <2000>;
1429                                                 type = "critical";
1430                                         };
1431                                 };
1432                         };
1433
1434                         sensor_thermal2: sensor-thermal2 {
1435                                 polling-delay-passive = <250>;
1436                                 polling-delay = <1000>;
1437                                 thermal-sensors = <&tsc 1>;
1438
1439                                 trips {
1440                                         sensor2_crit: sensor2-crit {
1441                                                 temperature = <120000>;
1442                                                 hysteresis = <2000>;
1443                                                 type = "critical";
1444                                         };
1445                                 };
1446                         };
1447
1448                         sensor_thermal3: sensor-thermal3 {
1449                                 polling-delay-passive = <250>;
1450                                 polling-delay = <1000>;
1451                                 thermal-sensors = <&tsc 2>;
1452
1453                                 trips {
1454                                         sensor3_crit: sensor3-crit {
1455                                                 temperature = <120000>;
1456                                                 hysteresis = <2000>;
1457                                                 type = "critical";
1458                                         };
1459                                 };
1460                         };
1461                 };
1462
1463                 rcar_sound: sound@ec500000 {
1464                         /*
1465                          * #sound-dai-cells is required
1466                          *
1467                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1468                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1469                          */
1470                         /*
1471                          * #clock-cells is required for audio_clkout0/1/2/3
1472                          *
1473                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1474                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1475                          */
1476                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1477                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1478                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1479                                 <0 0xec540000 0 0x1000>, /* SSIU */
1480                                 <0 0xec541000 0 0x280>,  /* SSI */
1481                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1482                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1483
1484                         clocks = <&cpg CPG_MOD 1005>,
1485                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1486                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1487                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1488                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1489                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1490                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1491                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1492                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1493                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1494                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1495                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1496                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1497                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1498                                  <&audio_clk_a>, <&audio_clk_b>,
1499                                  <&audio_clk_c>,
1500                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1501                         clock-names = "ssi-all",
1502                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1503                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1504                                       "ssi.1", "ssi.0",
1505                                       "src.9", "src.8", "src.7", "src.6",
1506                                       "src.5", "src.4", "src.3", "src.2",
1507                                       "src.1", "src.0",
1508                                       "mix.1", "mix.0",
1509                                       "ctu.1", "ctu.0",
1510                                       "dvc.0", "dvc.1",
1511                                       "clk_a", "clk_b", "clk_c", "clk_i";
1512                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1513                         resets = <&cpg 1005>,
1514                                  <&cpg 1006>, <&cpg 1007>,
1515                                  <&cpg 1008>, <&cpg 1009>,
1516                                  <&cpg 1010>, <&cpg 1011>,
1517                                  <&cpg 1012>, <&cpg 1013>,
1518                                  <&cpg 1014>, <&cpg 1015>;
1519                         reset-names = "ssi-all",
1520                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1521                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1522                                       "ssi.1", "ssi.0";
1523                         status = "disabled";
1524
1525                         rcar_sound,dvc {
1526                                 dvc0: dvc-0 {
1527                                         dmas = <&audma1 0xbc>;
1528                                         dma-names = "tx";
1529                                 };
1530                                 dvc1: dvc-1 {
1531                                         dmas = <&audma1 0xbe>;
1532                                         dma-names = "tx";
1533                                 };
1534                         };
1535
1536                         rcar_sound,mix {
1537                                 mix0: mix-0 { };
1538                                 mix1: mix-1 { };
1539                         };
1540
1541                         rcar_sound,ctu {
1542                                 ctu00: ctu-0 { };
1543                                 ctu01: ctu-1 { };
1544                                 ctu02: ctu-2 { };
1545                                 ctu03: ctu-3 { };
1546                                 ctu10: ctu-4 { };
1547                                 ctu11: ctu-5 { };
1548                                 ctu12: ctu-6 { };
1549                                 ctu13: ctu-7 { };
1550                         };
1551
1552                         rcar_sound,src {
1553                                 src0: src-0 {
1554                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1555                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1556                                         dma-names = "rx", "tx";
1557                                 };
1558                                 src1: src-1 {
1559                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1560                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1561                                         dma-names = "rx", "tx";
1562                                 };
1563                                 src2: src-2 {
1564                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1565                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1566                                         dma-names = "rx", "tx";
1567                                 };
1568                                 src3: src-3 {
1569                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1570                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1571                                         dma-names = "rx", "tx";
1572                                 };
1573                                 src4: src-4 {
1574                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1575                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1576                                         dma-names = "rx", "tx";
1577                                 };
1578                                 src5: src-5 {
1579                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1580                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1581                                         dma-names = "rx", "tx";
1582                                 };
1583                                 src6: src-6 {
1584                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1585                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1586                                         dma-names = "rx", "tx";
1587                                 };
1588                                 src7: src-7 {
1589                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1590                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1591                                         dma-names = "rx", "tx";
1592                                 };
1593                                 src8: src-8 {
1594                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1595                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1596                                         dma-names = "rx", "tx";
1597                                 };
1598                                 src9: src-9 {
1599                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1600                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1601                                         dma-names = "rx", "tx";
1602                                 };
1603                         };
1604
1605                         rcar_sound,ssi {
1606                                 ssi0: ssi-0 {
1607                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1608                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1609                                         dma-names = "rx", "tx", "rxu", "txu";
1610                                 };
1611                                 ssi1: ssi-1 {
1612                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1613                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1614                                         dma-names = "rx", "tx", "rxu", "txu";
1615                                 };
1616                                 ssi2: ssi-2 {
1617                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1618                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1619                                         dma-names = "rx", "tx", "rxu", "txu";
1620                                 };
1621                                 ssi3: ssi-3 {
1622                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1623                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1624                                         dma-names = "rx", "tx", "rxu", "txu";
1625                                 };
1626                                 ssi4: ssi-4 {
1627                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1628                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1629                                         dma-names = "rx", "tx", "rxu", "txu";
1630                                 };
1631                                 ssi5: ssi-5 {
1632                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1633                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1634                                         dma-names = "rx", "tx", "rxu", "txu";
1635                                 };
1636                                 ssi6: ssi-6 {
1637                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1638                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1639                                         dma-names = "rx", "tx", "rxu", "txu";
1640                                 };
1641                                 ssi7: ssi-7 {
1642                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1643                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1644                                         dma-names = "rx", "tx", "rxu", "txu";
1645                                 };
1646                                 ssi8: ssi-8 {
1647                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1648                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1649                                         dma-names = "rx", "tx", "rxu", "txu";
1650                                 };
1651                                 ssi9: ssi-9 {
1652                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1653                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1654                                         dma-names = "rx", "tx", "rxu", "txu";
1655                                 };
1656                         };
1657                 };
1658
1659                 pciec0: pcie@fe000000 {
1660                         /* placeholder */
1661                 };
1662
1663                 pciec1: pcie@ee800000 {
1664                         /* placeholder */
1665                 };
1666
1667                 fcpf0: fcp@fe950000 {
1668                         compatible = "renesas,fcpf";
1669                         reg = <0 0xfe950000 0 0x200>;
1670                         clocks = <&cpg CPG_MOD 615>;
1671                         power-domains = <&sysc R8A7796_PD_A3VC>;
1672                         resets = <&cpg 615>;
1673                 };
1674
1675                 vspb: vsp@fe960000 {
1676                         compatible = "renesas,vsp2";
1677                         reg = <0 0xfe960000 0 0x8000>;
1678                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1679                         clocks = <&cpg CPG_MOD 626>;
1680                         power-domains = <&sysc R8A7796_PD_A3VC>;
1681                         resets = <&cpg 626>;
1682
1683                         renesas,fcp = <&fcpvb0>;
1684                 };
1685
1686                 fcpvb0: fcp@fe96f000 {
1687                         compatible = "renesas,fcpv";
1688                         reg = <0 0xfe96f000 0 0x200>;
1689                         clocks = <&cpg CPG_MOD 607>;
1690                         power-domains = <&sysc R8A7796_PD_A3VC>;
1691                         resets = <&cpg 607>;
1692                 };
1693
1694                 vspi0: vsp@fe9a0000 {
1695                         compatible = "renesas,vsp2";
1696                         reg = <0 0xfe9a0000 0 0x8000>;
1697                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1698                         clocks = <&cpg CPG_MOD 631>;
1699                         power-domains = <&sysc R8A7796_PD_A3VC>;
1700                         resets = <&cpg 631>;
1701
1702                         renesas,fcp = <&fcpvi0>;
1703                 };
1704
1705                 fcpvi0: fcp@fe9af000 {
1706                         compatible = "renesas,fcpv";
1707                         reg = <0 0xfe9af000 0 0x200>;
1708                         clocks = <&cpg CPG_MOD 611>;
1709                         power-domains = <&sysc R8A7796_PD_A3VC>;
1710                         resets = <&cpg 611>;
1711                 };
1712
1713                 vspd0: vsp@fea20000 {
1714                         compatible = "renesas,vsp2";
1715                         reg = <0 0xfea20000 0 0x4000>;
1716                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1717                         clocks = <&cpg CPG_MOD 623>;
1718                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1719                         resets = <&cpg 623>;
1720
1721                         renesas,fcp = <&fcpvd0>;
1722                 };
1723
1724                 fcpvd0: fcp@fea27000 {
1725                         compatible = "renesas,fcpv";
1726                         reg = <0 0xfea27000 0 0x200>;
1727                         clocks = <&cpg CPG_MOD 603>;
1728                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1729                         resets = <&cpg 603>;
1730                 };
1731
1732                 vspd1: vsp@fea28000 {
1733                         compatible = "renesas,vsp2";
1734                         reg = <0 0xfea28000 0 0x4000>;
1735                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1736                         clocks = <&cpg CPG_MOD 622>;
1737                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1738                         resets = <&cpg 622>;
1739
1740                         renesas,fcp = <&fcpvd1>;
1741                 };
1742
1743                 fcpvd1: fcp@fea2f000 {
1744                         compatible = "renesas,fcpv";
1745                         reg = <0 0xfea2f000 0 0x200>;
1746                         clocks = <&cpg CPG_MOD 602>;
1747                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1748                         resets = <&cpg 602>;
1749                 };
1750
1751                 vspd2: vsp@fea30000 {
1752                         compatible = "renesas,vsp2";
1753                         reg = <0 0xfea30000 0 0x4000>;
1754                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1755                         clocks = <&cpg CPG_MOD 621>;
1756                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1757                         resets = <&cpg 621>;
1758
1759                         renesas,fcp = <&fcpvd2>;
1760                 };
1761
1762                 fcpvd2: fcp@fea37000 {
1763                         compatible = "renesas,fcpv";
1764                         reg = <0 0xfea37000 0 0x200>;
1765                         clocks = <&cpg CPG_MOD 601>;
1766                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1767                         resets = <&cpg 601>;
1768                 };
1769
1770                 hdmi0: hdmi@fead0000 {
1771                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
1772                         reg = <0 0xfead0000 0 0x10000>;
1773                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1774                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
1775                         clock-names = "iahb", "isfr";
1776                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1777                         resets = <&cpg 729>;
1778                         status = "disabled";
1779
1780                         ports {
1781                                 #address-cells = <1>;
1782                                 #size-cells = <0>;
1783                                 port@0 {
1784                                         reg = <0>;
1785                                         dw_hdmi0_in: endpoint {
1786                                                 remote-endpoint = <&du_out_hdmi0>;
1787                                         };
1788                                 };
1789                                 port@1 {
1790                                         reg = <1>;
1791                                 };
1792                         };
1793                 };
1794
1795                 du: display@feb00000 {
1796                         compatible = "renesas,du-r8a7796";
1797                         reg = <0 0xfeb00000 0 0x70000>,
1798                               <0 0xfeb90000 0 0x14>;
1799                         reg-names = "du", "lvds.0";
1800                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1801                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1802                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1803                         clocks = <&cpg CPG_MOD 724>,
1804                                  <&cpg CPG_MOD 723>,
1805                                  <&cpg CPG_MOD 722>,
1806                                  <&cpg CPG_MOD 727>;
1807                         clock-names = "du.0", "du.1", "du.2", "lvds.0";
1808                         status = "disabled";
1809
1810                         vsps = <&vspd0 &vspd1 &vspd2>;
1811
1812                         ports {
1813                                 #address-cells = <1>;
1814                                 #size-cells = <0>;
1815
1816                                 port@0 {
1817                                         reg = <0>;
1818                                         du_out_rgb: endpoint {
1819                                         };
1820                                 };
1821                                 port@1 {
1822                                         reg = <1>;
1823                                         du_out_hdmi0: endpoint {
1824                                                 remote-endpoint = <&dw_hdmi0_in>;
1825                                         };
1826                                 };
1827                                 port@2 {
1828                                         reg = <2>;
1829                                         du_out_lvds0: endpoint {
1830                                         };
1831                                 };
1832                         };
1833                 };
1834
1835                 imr-lx4@fe860000 {
1836                         compatible = "renesas,r8a7796-imr-lx4",
1837                                      "renesas,imr-lx4";
1838                         reg = <0 0xfe860000 0 0x2000>;
1839                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
1840                         clocks = <&cpg CPG_MOD 823>;
1841                         power-domains = <&sysc R8A7796_PD_A3VC>;
1842                         resets = <&cpg 823>;
1843                 };
1844
1845                 imr-lx4@fe870000 {
1846                         compatible = "renesas,r8a7796-imr-lx4",
1847                                      "renesas,imr-lx4";
1848                         reg = <0 0xfe870000 0 0x2000>;
1849                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
1850                         clocks = <&cpg CPG_MOD 822>;
1851                         power-domains = <&sysc R8A7796_PD_A3VC>;
1852                         resets = <&cpg 822>;
1853                 };
1854         };
1855 };