arch/arm/dts/r8a7795.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7795 SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 a57_0: cpu@0 {
  35                         compatible = "arm,cortex-a57", "arm,armv8";
  36                         reg = <0x0>;
  37                         device_type = "cpu";
  38                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  39                         next-level-cache = <&L2_CA57>;
  40                         enable-method = "psci";
  41                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
  42                         operating-points-v2 = <&cluster0_opp>;
  43                         #cooling-cells = <2>;
  44                 };
  45
  46                 a57_1: cpu@1 {
  47                         compatible = "arm,cortex-a57","arm,armv8";
  48                         reg = <0x1>;
  49                         device_type = "cpu";
  50                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  51                         next-level-cache = <&L2_CA57>;
  52                         enable-method = "psci";
  53                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
  54                         operating-points-v2 = <&cluster0_opp>;
  55                         #cooling-cells = <2>;
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
  66                         operating-points-v2 = <&cluster0_opp>;
  67                         #cooling-cells = <2>;
  68                 };
  69
  70                 a57_3: cpu@3 {
  71                         compatible = "arm,cortex-a57","arm,armv8";
  72                         reg = <0x3>;
  73                         device_type = "cpu";
  74                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  75                         next-level-cache = <&L2_CA57>;
  76                         enable-method = "psci";
  77                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
  78                         operating-points-v2 = <&cluster0_opp>;
  79                         #cooling-cells = <2>;
  80                 };
  81
  82                 a53_0: cpu@100 {
  83                         compatible = "arm,cortex-a53", "arm,armv8";
  84                         reg = <0x100>;
  85                         device_type = "cpu";
  86                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  87                         next-level-cache = <&L2_CA53>;
  88                         enable-method = "psci";
  89                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
  90                         operating-points-v2 = <&cluster1_opp>;
  91                 };
  92
  93                 a53_1: cpu@101 {
  94                         compatible = "arm,cortex-a53","arm,armv8";
  95                         reg = <0x101>;
  96                         device_type = "cpu";
  97                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  98                         next-level-cache = <&L2_CA53>;
  99                         enable-method = "psci";
 100                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 101                         operating-points-v2 = <&cluster1_opp>;
 102                 };
 103
 104                 a53_2: cpu@102 {
 105                         compatible = "arm,cortex-a53","arm,armv8";
 106                         reg = <0x102>;
 107                         device_type = "cpu";
 108                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 109                         next-level-cache = <&L2_CA53>;
 110                         enable-method = "psci";
 111                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 112                         operating-points-v2 = <&cluster1_opp>;
 113                 };
 114
 115                 a53_3: cpu@103 {
 116                         compatible = "arm,cortex-a53","arm,armv8";
 117                         reg = <0x103>;
 118                         device_type = "cpu";
 119                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 120                         next-level-cache = <&L2_CA53>;
 121                         enable-method = "psci";
 122                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 123                         operating-points-v2 = <&cluster1_opp>;
 124                 };
 125
 126                 L2_CA57: cache-controller-0 {
 127                         compatible = "cache";
 128                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 129                         cache-unified;
 130                         cache-level = <2>;
 131                 };
 132
 133                 L2_CA53: cache-controller-1 {
 134                         compatible = "cache";
 135                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 136                         cache-unified;
 137                         cache-level = <2>;
 138                 };
 139         };
 140
 141         extal_clk: extal {
 142                 compatible = "fixed-clock";
 143                 #clock-cells = <0>;
 144                 /* This value must be overridden by the board */
 145                 clock-frequency = <0>;
 146         };
 147
 148         extalr_clk: extalr {
 149                 compatible = "fixed-clock";
 150                 #clock-cells = <0>;
 151                 /* This value must be overridden by the board */
 152                 clock-frequency = <0>;
 153         };
 154
 155         /*
 156          * The external audio clocks are configured as 0 Hz fixed frequency
 157          * clocks by default.
 158          * Boards that provide audio clocks should override them.
 159          */
 160         audio_clk_a: audio_clk_a {
 161                 compatible = "fixed-clock";
 162                 #clock-cells = <0>;
 163                 clock-frequency = <0>;
 164         };
 165
 166         audio_clk_b: audio_clk_b {
 167                 compatible = "fixed-clock";
 168                 #clock-cells = <0>;
 169                 clock-frequency = <0>;
 170         };
 171
 172         audio_clk_c: audio_clk_c {
 173                 compatible = "fixed-clock";
 174                 #clock-cells = <0>;
 175                 clock-frequency = <0>;
 176         };
 177
 178         /* External CAN clock - to be overridden by boards that provide it */
 179         can_clk: can {
 180                 compatible = "fixed-clock";
 181                 #clock-cells = <0>;
 182                 clock-frequency = <0>;
 183         };
 184
 185         cluster0_opp: opp_table0 {
 186                 compatible = "operating-points-v2";
 187                 opp-shared;
 188
 189                 opp-500000000 {
 190                         opp-hz = /bits/ 64 <500000000>;
 191                         opp-microvolt = <830000>;
 192                         clock-latency-ns = <300000>;
 193                 };
 194                 opp-1000000000 {
 195                         opp-hz = /bits/ 64 <1000000000>;
 196                         opp-microvolt = <830000>;
 197                         clock-latency-ns = <300000>;
 198                 };
 199                 opp-1500000000 {
 200                         opp-hz = /bits/ 64 <1500000000>;
 201                         opp-microvolt = <830000>;
 202                         clock-latency-ns = <300000>;
 203                         opp-suspend;
 204                 };
 205                 opp-1600000000 {
 206                         opp-hz = /bits/ 64 <1600000000>;
 207                         opp-microvolt = <900000>;
 208                         clock-latency-ns = <300000>;
 209                         turbo-mode;
 210                 };
 211                 opp-1700000000 {
 212                         opp-hz = /bits/ 64 <1700000000>;
 213                         opp-microvolt = <960000>;
 214                         clock-latency-ns = <300000>;
 215                         turbo-mode;
 216                 };
 217         };
 218
 219         cluster1_opp: opp_table1 {
 220                 compatible = "operating-points-v2";
 221                 opp-shared;
 222
 223                 opp-800000000 {
 224                         opp-hz = /bits/ 64 <800000000>;
 225                         opp-microvolt = <820000>;
 226                         clock-latency-ns = <300000>;
 227                 };
 228                 opp-1000000000 {
 229                         opp-hz = /bits/ 64 <1000000000>;
 230                         opp-microvolt = <820000>;
 231                         clock-latency-ns = <300000>;
 232                 };
 233                 opp-1200000000 {
 234                         opp-hz = /bits/ 64 <1200000000>;
 235                         opp-microvolt = <820000>;
 236                         clock-latency-ns = <300000>;
 237                 };
 238         };
 239
 240         /* External PCIe clock - can be overridden by the board */
 241         pcie_bus_clk: pcie_bus {
 242                 compatible = "fixed-clock";
 243                 #clock-cells = <0>;
 244                 clock-frequency = <0>;
 245         };
 246
 247         pmu_a57 {
 248                 compatible = "arm,cortex-a57-pmu";
 249                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 250                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 251                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 252                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 253                 interrupt-affinity = <&a57_0>,
 254                                      <&a57_1>,
 255                                      <&a57_2>,
 256                                      <&a57_3>;
 257         };
 258
 259         pmu_a53 {
 260                 compatible = "arm,cortex-a53-pmu";
 261                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 262                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 263                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 264                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 265                 interrupt-affinity = <&a53_0>,
 266                                      <&a53_1>,
 267                                      <&a53_2>,
 268                                      <&a53_3>;
 269         };
 270
 271         psci {
 272                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 273                 method = "smc";
 274         };
 275
 276         /* External SCIF clock - to be overridden by boards that provide it */
 277         scif_clk: scif {
 278                 compatible = "fixed-clock";
 279                 #clock-cells = <0>;
 280                 clock-frequency = <0>;
 281         };
 282
 283         soc: soc {
 284                 compatible = "simple-bus";
 285                 interrupt-parent = <&gic>;
 286
 287                 #address-cells = <2>;
 288                 #size-cells = <2>;
 289                 ranges;
 290
 291                 gic: interrupt-controller@f1010000 {
 292                         compatible = "arm,gic-400";
 293                         #interrupt-cells = <3>;
 294                         #address-cells = <0>;
 295                         interrupt-controller;
 296                         reg = <0x0 0xf1010000 0 0x1000>,
 297                               <0x0 0xf1020000 0 0x20000>,
 298                               <0x0 0xf1040000 0 0x20000>,
 299                               <0x0 0xf1060000 0 0x20000>;
 300                         interrupts = <GIC_PPI 9
 301                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 302                         clocks = <&cpg CPG_MOD 408>;
 303                         clock-names = "clk";
 304                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 305                         resets = <&cpg 408>;
 306                 };
 307
 308                 wdt0: watchdog@e6020000 {
 309                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 310                         reg = <0 0xe6020000 0 0x0c>;
 311                         clocks = <&cpg CPG_MOD 402>;
 312                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 313                         resets = <&cpg 402>;
 314                         status = "disabled";
 315                 };
 316
 317                 gpio0: gpio@e6050000 {
 318                         compatible = "renesas,gpio-r8a7795",
 319                                      "renesas,rcar-gen3-gpio";
 320                         reg = <0 0xe6050000 0 0x50>;
 321                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 322                         #gpio-cells = <2>;
 323                         gpio-controller;
 324                         gpio-ranges = <&pfc 0 0 16>;
 325                         #interrupt-cells = <2>;
 326                         interrupt-controller;
 327                         clocks = <&cpg CPG_MOD 912>;
 328                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 329                         resets = <&cpg 912>;
 330                 };
 331
 332                 gpio1: gpio@e6051000 {
 333                         compatible = "renesas,gpio-r8a7795",
 334                                      "renesas,rcar-gen3-gpio";
 335                         reg = <0 0xe6051000 0 0x50>;
 336                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 337                         #gpio-cells = <2>;
 338                         gpio-controller;
 339                         gpio-ranges = <&pfc 0 32 29>;
 340                         #interrupt-cells = <2>;
 341                         interrupt-controller;
 342                         clocks = <&cpg CPG_MOD 911>;
 343                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 344                         resets = <&cpg 911>;
 345                 };
 346
 347                 gpio2: gpio@e6052000 {
 348                         compatible = "renesas,gpio-r8a7795",
 349                                      "renesas,rcar-gen3-gpio";
 350                         reg = <0 0xe6052000 0 0x50>;
 351                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 352                         #gpio-cells = <2>;
 353                         gpio-controller;
 354                         gpio-ranges = <&pfc 0 64 15>;
 355                         #interrupt-cells = <2>;
 356                         interrupt-controller;
 357                         clocks = <&cpg CPG_MOD 910>;
 358                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 359                         resets = <&cpg 910>;
 360                 };
 361
 362                 gpio3: gpio@e6053000 {
 363                         compatible = "renesas,gpio-r8a7795",
 364                                      "renesas,rcar-gen3-gpio";
 365                         reg = <0 0xe6053000 0 0x50>;
 366                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 367                         #gpio-cells = <2>;
 368                         gpio-controller;
 369                         gpio-ranges = <&pfc 0 96 16>;
 370                         #interrupt-cells = <2>;
 371                         interrupt-controller;
 372                         clocks = <&cpg CPG_MOD 909>;
 373                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 374                         resets = <&cpg 909>;
 375                 };
 376
 377                 gpio4: gpio@e6054000 {
 378                         compatible = "renesas,gpio-r8a7795",
 379                                      "renesas,rcar-gen3-gpio";
 380                         reg = <0 0xe6054000 0 0x50>;
 381                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 382                         #gpio-cells = <2>;
 383                         gpio-controller;
 384                         gpio-ranges = <&pfc 0 128 18>;
 385                         #interrupt-cells = <2>;
 386                         interrupt-controller;
 387                         clocks = <&cpg CPG_MOD 908>;
 388                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 389                         resets = <&cpg 908>;
 390                 };
 391
 392                 gpio5: gpio@e6055000 {
 393                         compatible = "renesas,gpio-r8a7795",
 394                                      "renesas,rcar-gen3-gpio";
 395                         reg = <0 0xe6055000 0 0x50>;
 396                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 397                         #gpio-cells = <2>;
 398                         gpio-controller;
 399                         gpio-ranges = <&pfc 0 160 26>;
 400                         #interrupt-cells = <2>;
 401                         interrupt-controller;
 402                         clocks = <&cpg CPG_MOD 907>;
 403                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 404                         resets = <&cpg 907>;
 405                 };
 406
 407                 gpio6: gpio@e6055400 {
 408                         compatible = "renesas,gpio-r8a7795",
 409                                      "renesas,rcar-gen3-gpio";
 410                         reg = <0 0xe6055400 0 0x50>;
 411                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 412                         #gpio-cells = <2>;
 413                         gpio-controller;
 414                         gpio-ranges = <&pfc 0 192 32>;
 415                         #interrupt-cells = <2>;
 416                         interrupt-controller;
 417                         clocks = <&cpg CPG_MOD 906>;
 418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 419                         resets = <&cpg 906>;
 420                 };
 421
 422                 gpio7: gpio@e6055800 {
 423                         compatible = "renesas,gpio-r8a7795",
 424                                      "renesas,rcar-gen3-gpio";
 425                         reg = <0 0xe6055800 0 0x50>;
 426                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 427                         #gpio-cells = <2>;
 428                         gpio-controller;
 429                         gpio-ranges = <&pfc 0 224 4>;
 430                         #interrupt-cells = <2>;
 431                         interrupt-controller;
 432                         clocks = <&cpg CPG_MOD 905>;
 433                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 434                         resets = <&cpg 905>;
 435                 };
 436
 437                 cpg: clock-controller@e6150000 {
 438                         compatible = "renesas,r8a7795-cpg-mssr";
 439                         reg = <0 0xe6150000 0 0x1000>;
 440                         clocks = <&extal_clk>, <&extalr_clk>;
 441                         clock-names = "extal", "extalr";
 442                         #clock-cells = <2>;
 443                         #power-domain-cells = <0>;
 444                         #reset-cells = <1>;
 445                 };
 446
 447                 rst: reset-controller@e6160000 {
 448                         compatible = "renesas,r8a7795-rst";
 449                         reg = <0 0xe6160000 0 0x0200>;
 450                 };
 451
 452                 prr: chipid@fff00044 {
 453                         compatible = "renesas,prr";
 454                         reg = <0 0xfff00044 0 4>;
 455                 };
 456
 457                 sysc: system-controller@e6180000 {
 458                         compatible = "renesas,r8a7795-sysc";
 459                         reg = <0 0xe6180000 0 0x0400>;
 460                         #power-domain-cells = <1>;
 461                 };
 462
 463                 pfc: pin-controller@e6060000 {
 464                         compatible = "renesas,pfc-r8a7795";
 465                         reg = <0 0xe6060000 0 0x50c>;
 466                 };
 467
 468                 intc_ex: interrupt-controller@e61c0000 {
 469                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 470                         #interrupt-cells = <2>;
 471                         interrupt-controller;
 472                         reg = <0 0xe61c0000 0 0x200>;
 473                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 476                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 477                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 478                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&cpg CPG_MOD 407>;
 480                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 481                         resets = <&cpg 407>;
 482                 };
 483
 484                 ipmmu_vi0: mmu@febd0000 {
 485                         compatible = "renesas,ipmmu-r8a7795";
 486                         reg = <0 0xfebd0000 0 0x1000>;
 487                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 488                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 489                         #iommu-cells = <1>;
 490                 };
 491
 492                 ipmmu_vi1: mmu@febe0000 {
 493                         compatible = "renesas,ipmmu-r8a7795";
 494                         reg = <0 0xfebe0000 0 0x1000>;
 495                         renesas,ipmmu-main = <&ipmmu_mm 15>;
 496                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 497                         #iommu-cells = <1>;
 498                         status = "disabled";
 499                 };
 500
 501                 ipmmu_vp0: mmu@fe990000 {
 502                         compatible = "renesas,ipmmu-r8a7795";
 503                         reg = <0 0xfe990000 0 0x1000>;
 504                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 505                         power-domains = <&sysc R8A7795_PD_A3VP>;
 506                         #iommu-cells = <1>;
 507                         status = "disabled";
 508                 };
 509
 510                 ipmmu_vp1: mmu@fe980000 {
 511                         compatible = "renesas,ipmmu-r8a7795";
 512                         reg = <0 0xfe980000 0 0x1000>;
 513                         renesas,ipmmu-main = <&ipmmu_mm 17>;
 514                         power-domains = <&sysc R8A7795_PD_A3VP>;
 515                         #iommu-cells = <1>;
 516                 };
 517
 518                 ipmmu_vc0: mmu@fe6b0000 {
 519                         compatible = "renesas,ipmmu-r8a7795";
 520                         reg = <0 0xfe6b0000 0 0x1000>;
 521                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 522                         power-domains = <&sysc R8A7795_PD_A3VC>;
 523                         #iommu-cells = <1>;
 524                         status = "disabled";
 525                 };
 526
 527                 ipmmu_vc1: mmu@fe6f0000 {
 528                         compatible = "renesas,ipmmu-r8a7795";
 529                         reg = <0 0xfe6f0000 0 0x1000>;
 530                         renesas,ipmmu-main = <&ipmmu_mm 13>;
 531                         power-domains = <&sysc R8A7795_PD_A3VC>;
 532                         #iommu-cells = <1>;
 533                         status = "disabled";
 534                 };
 535
 536                 ipmmu_pv0: mmu@fd800000 {
 537                         compatible = "renesas,ipmmu-r8a7795";
 538                         reg = <0 0xfd800000 0 0x1000>;
 539                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 540                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 541                         #iommu-cells = <1>;
 542                         status = "disabled";
 543                 };
 544
 545                 ipmmu_pv1: mmu@fd950000 {
 546                         compatible = "renesas,ipmmu-r8a7795";
 547                         reg = <0 0xfd950000 0 0x1000>;
 548                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 549                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 550                         #iommu-cells = <1>;
 551                         status = "disabled";
 552                 };
 553
 554                 ipmmu_pv2: mmu@fd960000 {
 555                         compatible = "renesas,ipmmu-r8a7795";
 556                         reg = <0 0xfd960000 0 0x1000>;
 557                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 558                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 559                         #iommu-cells = <1>;
 560                         status = "disabled";
 561                 };
 562
 563                 ipmmu_pv3: mmu@fd970000 {
 564                         compatible = "renesas,ipmmu-r8a7795";
 565                         reg = <0 0xfd970000 0 0x1000>;
 566                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 567                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 568                         #iommu-cells = <1>;
 569                         status = "disabled";
 570                 };
 571
 572                 ipmmu_ir: mmu@ff8b0000 {
 573                         compatible = "renesas,ipmmu-r8a7795";
 574                         reg = <0 0xff8b0000 0 0x1000>;
 575                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 576                         power-domains = <&sysc R8A7795_PD_A3IR>;
 577                         #iommu-cells = <1>;
 578                         status = "disabled";
 579                 };
 580
 581                 ipmmu_hc: mmu@e6570000 {
 582                         compatible = "renesas,ipmmu-r8a7795";
 583                         reg = <0 0xe6570000 0 0x1000>;
 584                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 585                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 586                         #iommu-cells = <1>;
 587                         status = "disabled";
 588                 };
 589
 590                 ipmmu_rt: mmu@ffc80000 {
 591                         compatible = "renesas,ipmmu-r8a7795";
 592                         reg = <0 0xffc80000 0 0x1000>;
 593                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 594                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 595                         #iommu-cells = <1>;
 596                         status = "disabled";
 597                 };
 598
 599                 ipmmu_mp0: mmu@ec670000 {
 600                         compatible = "renesas,ipmmu-r8a7795";
 601                         reg = <0 0xec670000 0 0x1000>;
 602                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 603                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 604                         #iommu-cells = <1>;
 605                         status = "disabled";
 606                 };
 607
 608                 ipmmu_ds0: mmu@e6740000 {
 609                         compatible = "renesas,ipmmu-r8a7795";
 610                         reg = <0 0xe6740000 0 0x1000>;
 611                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 612                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 613                         #iommu-cells = <1>;
 614                 };
 615
 616                 ipmmu_ds1: mmu@e7740000 {
 617                         compatible = "renesas,ipmmu-r8a7795";
 618                         reg = <0 0xe7740000 0 0x1000>;
 619                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 620                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 621                         #iommu-cells = <1>;
 622                 };
 623
 624                 ipmmu_mm: mmu@e67b0000 {
 625                         compatible = "renesas,ipmmu-r8a7795";
 626                         reg = <0 0xe67b0000 0 0x1000>;
 627                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 628                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 630                         #iommu-cells = <1>;
 631                 };
 632
 633                 dmac0: dma-controller@e6700000 {
 634                         compatible = "renesas,dmac-r8a7795",
 635                                      "renesas,rcar-dmac";
 636                         reg = <0 0xe6700000 0 0x10000>;
 637                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 638                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 639                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 640                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 641                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 642                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 643                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 644                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 645                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 646                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 647                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 648                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 649                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 650                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 651                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 652                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 653                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 654                         interrupt-names = "error",
 655                                         "ch0", "ch1", "ch2", "ch3",
 656                                         "ch4", "ch5", "ch6", "ch7",
 657                                         "ch8", "ch9", "ch10", "ch11",
 658                                         "ch12", "ch13", "ch14", "ch15";
 659                         clocks = <&cpg CPG_MOD 219>;
 660                         clock-names = "fck";
 661                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 662                         resets = <&cpg 219>;
 663                         #dma-cells = <1>;
 664                         dma-channels = <16>;
 665                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 666                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 667                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 668                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 669                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 670                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 671                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 672                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 673                 };
 674
 675                 dmac1: dma-controller@e7300000 {
 676                         compatible = "renesas,dmac-r8a7795",
 677                                      "renesas,rcar-dmac";
 678                         reg = <0 0xe7300000 0 0x10000>;
 679                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 680                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 681                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 682                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 683                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 684                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 685                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 686                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 687                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 688                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 689                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 690                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 691                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 692                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 693                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 694                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 695                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 696                         interrupt-names = "error",
 697                                         "ch0", "ch1", "ch2", "ch3",
 698                                         "ch4", "ch5", "ch6", "ch7",
 699                                         "ch8", "ch9", "ch10", "ch11",
 700                                         "ch12", "ch13", "ch14", "ch15";
 701                         clocks = <&cpg CPG_MOD 218>;
 702                         clock-names = "fck";
 703                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 704                         resets = <&cpg 218>;
 705                         #dma-cells = <1>;
 706                         dma-channels = <16>;
 707                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 708                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 709                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 710                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 711                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 712                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 713                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 714                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 715                 };
 716
 717                 dmac2: dma-controller@e7310000 {
 718                         compatible = "renesas,dmac-r8a7795",
 719                                      "renesas,rcar-dmac";
 720                         reg = <0 0xe7310000 0 0x10000>;
 721                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 722                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 723                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 724                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 725                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 726                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 727                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 728                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 729                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 730                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 731                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 732                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 733                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 734                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 735                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 736                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 738                         interrupt-names = "error",
 739                                         "ch0", "ch1", "ch2", "ch3",
 740                                         "ch4", "ch5", "ch6", "ch7",
 741                                         "ch8", "ch9", "ch10", "ch11",
 742                                         "ch12", "ch13", "ch14", "ch15";
 743                         clocks = <&cpg CPG_MOD 217>;
 744                         clock-names = "fck";
 745                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 746                         resets = <&cpg 217>;
 747                         #dma-cells = <1>;
 748                         dma-channels = <16>;
 749                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 750                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 751                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 752                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 753                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 754                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 755                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 756                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 757                 };
 758
 759                 audma0: dma-controller@ec700000 {
 760                         compatible = "renesas,dmac-r8a7795",
 761                                      "renesas,rcar-dmac";
 762                         reg = <0 0xec700000 0 0x10000>;
 763                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 764                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 765                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 766                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 767                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 768                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 769                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 770                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 771                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 772                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 773                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 774                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 775                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 776                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 777                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 778                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 779                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 780                         interrupt-names = "error",
 781                                         "ch0", "ch1", "ch2", "ch3",
 782                                         "ch4", "ch5", "ch6", "ch7",
 783                                         "ch8", "ch9", "ch10", "ch11",
 784                                         "ch12", "ch13", "ch14", "ch15";
 785                         clocks = <&cpg CPG_MOD 502>;
 786                         clock-names = "fck";
 787                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 788                         resets = <&cpg 502>;
 789                         #dma-cells = <1>;
 790                         dma-channels = <16>;
 791                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
 792                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
 793                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
 794                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
 795                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
 796                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
 797                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
 798                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
 799                 };
 800
 801                 audma1: dma-controller@ec720000 {
 802                         compatible = "renesas,dmac-r8a7795",
 803                                      "renesas,rcar-dmac";
 804                         reg = <0 0xec720000 0 0x10000>;
 805                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 806                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 807                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 808                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 809                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 810                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 811                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 812                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 813                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 814                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 815                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 816                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 817                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 818                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 819                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 820                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 821                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 822                         interrupt-names = "error",
 823                                         "ch0", "ch1", "ch2", "ch3",
 824                                         "ch4", "ch5", "ch6", "ch7",
 825                                         "ch8", "ch9", "ch10", "ch11",
 826                                         "ch12", "ch13", "ch14", "ch15";
 827                         clocks = <&cpg CPG_MOD 501>;
 828                         clock-names = "fck";
 829                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 830                         resets = <&cpg 501>;
 831                         #dma-cells = <1>;
 832                         dma-channels = <16>;
 833                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
 834                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
 835                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
 836                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
 837                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
 838                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
 839                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
 840                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
 841                 };
 842
 843                 avb: ethernet@e6800000 {
 844                         compatible = "renesas,etheravb-r8a7795",
 845                                      "renesas,etheravb-rcar-gen3";
 846                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 847                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 861                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 862                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 863                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 864                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 865                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 866                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 867                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 868                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 869                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 870                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 871                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 872                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 873                                           "ch4", "ch5", "ch6", "ch7",
 874                                           "ch8", "ch9", "ch10", "ch11",
 875                                           "ch12", "ch13", "ch14", "ch15",
 876                                           "ch16", "ch17", "ch18", "ch19",
 877                                           "ch20", "ch21", "ch22", "ch23",
 878                                           "ch24";
 879                         clocks = <&cpg CPG_MOD 812>;
 880                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 881                         resets = <&cpg 812>;
 882                         phy-mode = "rgmii";
 883                         iommus = <&ipmmu_ds0 16>;
 884                         #address-cells = <1>;
 885                         #size-cells = <0>;
 886                         status = "disabled";
 887                 };
 888
 889                 can0: can@e6c30000 {
 890                         compatible = "renesas,can-r8a7795",
 891                                      "renesas,rcar-gen3-can";
 892                         reg = <0 0xe6c30000 0 0x1000>;
 893                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 894                         clocks = <&cpg CPG_MOD 916>,
 895                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 896                                <&can_clk>;
 897                         clock-names = "clkp1", "clkp2", "can_clk";
 898                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 899                         assigned-clock-rates = <40000000>;
 900                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 901                         resets = <&cpg 916>;
 902                         status = "disabled";
 903                 };
 904
 905                 can1: can@e6c38000 {
 906                         compatible = "renesas,can-r8a7795",
 907                                      "renesas,rcar-gen3-can";
 908                         reg = <0 0xe6c38000 0 0x1000>;
 909                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 910                         clocks = <&cpg CPG_MOD 915>,
 911                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 912                                <&can_clk>;
 913                         clock-names = "clkp1", "clkp2", "can_clk";
 914                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 915                         assigned-clock-rates = <40000000>;
 916                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 917                         resets = <&cpg 915>;
 918                         status = "disabled";
 919                 };
 920
 921                 canfd: can@e66c0000 {
 922                         compatible = "renesas,r8a7795-canfd",
 923                                      "renesas,rcar-gen3-canfd";
 924                         reg = <0 0xe66c0000 0 0x8000>;
 925                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 926                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 927                         clocks = <&cpg CPG_MOD 914>,
 928                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 929                                <&can_clk>;
 930                         clock-names = "fck", "canfd", "can_clk";
 931                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 932                         assigned-clock-rates = <40000000>;
 933                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 934                         resets = <&cpg 914>;
 935                         status = "disabled";
 936
 937                         channel0 {
 938                                 status = "disabled";
 939                         };
 940
 941                         channel1 {
 942                                 status = "disabled";
 943                         };
 944                 };
 945
 946                 drif00: rif@e6f40000 {
 947                         compatible = "renesas,r8a7795-drif",
 948                                      "renesas,rcar-gen3-drif";
 949                         reg = <0 0xe6f40000 0 0x64>;
 950                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 951                         clocks = <&cpg CPG_MOD 515>;
 952                         clock-names = "fck";
 953                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
 954                         dma-names = "rx", "rx";
 955                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 956                         resets = <&cpg 515>;
 957                         renesas,bonding = <&drif01>;
 958                         status = "disabled";
 959                 };
 960
 961                 drif01: rif@e6f50000 {
 962                         compatible = "renesas,r8a7795-drif",
 963                                      "renesas,rcar-gen3-drif";
 964                         reg = <0 0xe6f50000 0 0x64>;
 965                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 966                         clocks = <&cpg CPG_MOD 514>;
 967                         clock-names = "fck";
 968                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
 969                         dma-names = "rx", "rx";
 970                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 971                         resets = <&cpg 514>;
 972                         renesas,bonding = <&drif00>;
 973                         status = "disabled";
 974                 };
 975
 976                 drif10: rif@e6f60000 {
 977                         compatible = "renesas,r8a7795-drif",
 978                                      "renesas,rcar-gen3-drif";
 979                         reg = <0 0xe6f60000 0 0x64>;
 980                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 981                         clocks = <&cpg CPG_MOD 513>;
 982                         clock-names = "fck";
 983                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
 984                         dma-names = "rx", "rx";
 985                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 986                         resets = <&cpg 513>;
 987                         renesas,bonding = <&drif11>;
 988                         status = "disabled";
 989                 };
 990
 991                 drif11: rif@e6f70000 {
 992                         compatible = "renesas,r8a7795-drif",
 993                                      "renesas,rcar-gen3-drif";
 994                         reg = <0 0xe6f70000 0 0x64>;
 995                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 996                         clocks = <&cpg CPG_MOD 512>;
 997                         clock-names = "fck";
 998                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
 999                         dma-names = "rx", "rx";
1000                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1001                         resets = <&cpg 512>;
1002                         renesas,bonding = <&drif10>;
1003                         status = "disabled";
1004                 };
1005
1006                 drif20: rif@e6f80000 {
1007                         compatible = "renesas,r8a7795-drif",
1008                                      "renesas,rcar-gen3-drif";
1009                         reg = <0 0xe6f80000 0 0x64>;
1010                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1011                         clocks = <&cpg CPG_MOD 511>;
1012                         clock-names = "fck";
1013                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1014                         dma-names = "rx", "rx";
1015                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1016                         resets = <&cpg 511>;
1017                         renesas,bonding = <&drif21>;
1018                         status = "disabled";
1019                 };
1020
1021                 drif21: rif@e6f90000 {
1022                         compatible = "renesas,r8a7795-drif",
1023                                      "renesas,rcar-gen3-drif";
1024                         reg = <0 0xe6f90000 0 0x64>;
1025                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1026                         clocks = <&cpg CPG_MOD 510>;
1027                         clock-names = "fck";
1028                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1029                         dma-names = "rx", "rx";
1030                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1031                         resets = <&cpg 510>;
1032                         renesas,bonding = <&drif20>;
1033                         status = "disabled";
1034                 };
1035
1036                 drif30: rif@e6fa0000 {
1037                         compatible = "renesas,r8a7795-drif",
1038                                      "renesas,rcar-gen3-drif";
1039                         reg = <0 0xe6fa0000 0 0x64>;
1040                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1041                         clocks = <&cpg CPG_MOD 509>;
1042                         clock-names = "fck";
1043                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1044                         dma-names = "rx", "rx";
1045                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1046                         resets = <&cpg 509>;
1047                         renesas,bonding = <&drif31>;
1048                         status = "disabled";
1049                 };
1050
1051                 drif31: rif@e6fb0000 {
1052                         compatible = "renesas,r8a7795-drif",
1053                                      "renesas,rcar-gen3-drif";
1054                         reg = <0 0xe6fb0000 0 0x64>;
1055                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1056                         clocks = <&cpg CPG_MOD 508>;
1057                         clock-names = "fck";
1058                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1059                         dma-names = "rx", "rx";
1060                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1061                         resets = <&cpg 508>;
1062                         renesas,bonding = <&drif30>;
1063                         status = "disabled";
1064                 };
1065
1066                 hscif0: serial@e6540000 {
1067                         compatible = "renesas,hscif-r8a7795",
1068                                      "renesas,rcar-gen3-hscif",
1069                                      "renesas,hscif";
1070                         reg = <0 0xe6540000 0 96>;
1071                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
1072                         clocks = <&cpg CPG_MOD 520>,
1073                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1074                                  <&scif_clk>;
1075                         clock-names = "fck", "brg_int", "scif_clk";
1076                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
1077                                <&dmac2 0x31>, <&dmac2 0x30>;
1078                         dma-names = "tx", "rx", "tx", "rx";
1079                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1080                         resets = <&cpg 520>;
1081                         status = "disabled";
1082                 };
1083
1084                 hscif1: serial@e6550000 {
1085                         compatible = "renesas,hscif-r8a7795",
1086                                      "renesas,rcar-gen3-hscif",
1087                                      "renesas,hscif";
1088                         reg = <0 0xe6550000 0 96>;
1089                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1090                         clocks = <&cpg CPG_MOD 519>,
1091                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1092                                  <&scif_clk>;
1093                         clock-names = "fck", "brg_int", "scif_clk";
1094                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
1095                                <&dmac2 0x33>, <&dmac2 0x32>;
1096                         dma-names = "tx", "rx", "tx", "rx";
1097                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1098                         resets = <&cpg 519>;
1099                         status = "disabled";
1100                 };
1101
1102                 hscif2: serial@e6560000 {
1103                         compatible = "renesas,hscif-r8a7795",
1104                                      "renesas,rcar-gen3-hscif",
1105                                      "renesas,hscif";
1106                         reg = <0 0xe6560000 0 96>;
1107                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
1108                         clocks = <&cpg CPG_MOD 518>,
1109                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1110                                  <&scif_clk>;
1111                         clock-names = "fck", "brg_int", "scif_clk";
1112                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
1113                                <&dmac2 0x35>, <&dmac2 0x34>;
1114                         dma-names = "tx", "rx", "tx", "rx";
1115                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1116                         resets = <&cpg 518>;
1117                         status = "disabled";
1118                 };
1119
1120                 hscif3: serial@e66a0000 {
1121                         compatible = "renesas,hscif-r8a7795",
1122                                      "renesas,rcar-gen3-hscif",
1123                                      "renesas,hscif";
1124                         reg = <0 0xe66a0000 0 96>;
1125                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
1126                         clocks = <&cpg CPG_MOD 517>,
1127                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1128                                  <&scif_clk>;
1129                         clock-names = "fck", "brg_int", "scif_clk";
1130                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1131                         dma-names = "tx", "rx";
1132                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1133                         resets = <&cpg 517>;
1134                         status = "disabled";
1135                 };
1136
1137                 hscif4: serial@e66b0000 {
1138                         compatible = "renesas,hscif-r8a7795",
1139                                      "renesas,rcar-gen3-hscif",
1140                                      "renesas,hscif";
1141                         reg = <0 0xe66b0000 0 96>;
1142                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
1143                         clocks = <&cpg CPG_MOD 516>,
1144                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1145                                  <&scif_clk>;
1146                         clock-names = "fck", "brg_int", "scif_clk";
1147                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1148                         dma-names = "tx", "rx";
1149                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1150                         resets = <&cpg 516>;
1151                         status = "disabled";
1152                 };
1153
1154                 msiof0: spi@e6e90000 {
1155                         compatible = "renesas,msiof-r8a7795",
1156                                      "renesas,rcar-gen3-msiof";
1157                         reg = <0 0xe6e90000 0 0x0064>;
1158                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 211>;
1160                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1161                                <&dmac2 0x41>, <&dmac2 0x40>;
1162                         dma-names = "tx", "rx", "tx", "rx";
1163                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1164                         resets = <&cpg 211>;
1165                         #address-cells = <1>;
1166                         #size-cells = <0>;
1167                         status = "disabled";
1168                 };
1169
1170                 msiof1: spi@e6ea0000 {
1171                         compatible = "renesas,msiof-r8a7795",
1172                                      "renesas,rcar-gen3-msiof";
1173                         reg = <0 0xe6ea0000 0 0x0064>;
1174                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1175                         clocks = <&cpg CPG_MOD 210>;
1176                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1177                                <&dmac2 0x43>, <&dmac2 0x42>;
1178                         dma-names = "tx", "rx", "tx", "rx";
1179                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1180                         resets = <&cpg 210>;
1181                         #address-cells = <1>;
1182                         #size-cells = <0>;
1183                         status = "disabled";
1184                 };
1185
1186                 msiof2: spi@e6c00000 {
1187                         compatible = "renesas,msiof-r8a7795",
1188                                      "renesas,rcar-gen3-msiof";
1189                         reg = <0 0xe6c00000 0 0x0064>;
1190                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1191                         clocks = <&cpg CPG_MOD 209>;
1192                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1193                         dma-names = "tx", "rx";
1194                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1195                         resets = <&cpg 209>;
1196                         #address-cells = <1>;
1197                         #size-cells = <0>;
1198                         status = "disabled";
1199                 };
1200
1201                 msiof3: spi@e6c10000 {
1202                         compatible = "renesas,msiof-r8a7795",
1203                                      "renesas,rcar-gen3-msiof";
1204                         reg = <0 0xe6c10000 0 0x0064>;
1205                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1206                         clocks = <&cpg CPG_MOD 208>;
1207                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1208                         dma-names = "tx", "rx";
1209                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1210                         resets = <&cpg 208>;
1211                         #address-cells = <1>;
1212                         #size-cells = <0>;
1213                         status = "disabled";
1214                 };
1215
1216                 scif0: serial@e6e60000 {
1217                         compatible = "renesas,scif-r8a7795",
1218                                      "renesas,rcar-gen3-scif", "renesas,scif";
1219                         reg = <0 0xe6e60000 0 64>;
1220                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1221                         clocks = <&cpg CPG_MOD 207>,
1222                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1223                                  <&scif_clk>;
1224                         clock-names = "fck", "brg_int", "scif_clk";
1225                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1226                                <&dmac2 0x51>, <&dmac2 0x50>;
1227                         dma-names = "tx", "rx", "tx", "rx";
1228                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1229                         resets = <&cpg 207>;
1230                         status = "disabled";
1231                 };
1232
1233                 scif1: serial@e6e68000 {
1234                         compatible = "renesas,scif-r8a7795",
1235                                      "renesas,rcar-gen3-scif", "renesas,scif";
1236                         reg = <0 0xe6e68000 0 64>;
1237                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1238                         clocks = <&cpg CPG_MOD 206>,
1239                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1240                                  <&scif_clk>;
1241                         clock-names = "fck", "brg_int", "scif_clk";
1242                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1243                                <&dmac2 0x53>, <&dmac2 0x52>;
1244                         dma-names = "tx", "rx", "tx", "rx";
1245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1246                         resets = <&cpg 206>;
1247                         status = "disabled";
1248                 };
1249
1250                 scif2: serial@e6e88000 {
1251                         compatible = "renesas,scif-r8a7795",
1252                                      "renesas,rcar-gen3-scif", "renesas,scif";
1253                         reg = <0 0xe6e88000 0 64>;
1254                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1255                         clocks = <&cpg CPG_MOD 310>,
1256                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1257                                  <&scif_clk>;
1258                         clock-names = "fck", "brg_int", "scif_clk";
1259                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1260                                <&dmac2 0x13>, <&dmac2 0x12>;
1261                         dma-names = "tx", "rx", "tx", "rx";
1262                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1263                         resets = <&cpg 310>;
1264                         status = "disabled";
1265                 };
1266
1267                 scif3: serial@e6c50000 {
1268                         compatible = "renesas,scif-r8a7795",
1269                                      "renesas,rcar-gen3-scif", "renesas,scif";
1270                         reg = <0 0xe6c50000 0 64>;
1271                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1272                         clocks = <&cpg CPG_MOD 204>,
1273                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1274                                  <&scif_clk>;
1275                         clock-names = "fck", "brg_int", "scif_clk";
1276                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1277                         dma-names = "tx", "rx";
1278                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1279                         resets = <&cpg 204>;
1280                         status = "disabled";
1281                 };
1282
1283                 scif4: serial@e6c40000 {
1284                         compatible = "renesas,scif-r8a7795",
1285                                      "renesas,rcar-gen3-scif", "renesas,scif";
1286                         reg = <0 0xe6c40000 0 64>;
1287                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1288                         clocks = <&cpg CPG_MOD 203>,
1289                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1290                                  <&scif_clk>;
1291                         clock-names = "fck", "brg_int", "scif_clk";
1292                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1293                         dma-names = "tx", "rx";
1294                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1295                         resets = <&cpg 203>;
1296                         status = "disabled";
1297                 };
1298
1299                 scif5: serial@e6f30000 {
1300                         compatible = "renesas,scif-r8a7795",
1301                                      "renesas,rcar-gen3-scif", "renesas,scif";
1302                         reg = <0 0xe6f30000 0 64>;
1303                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1304                         clocks = <&cpg CPG_MOD 202>,
1305                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1306                                  <&scif_clk>;
1307                         clock-names = "fck", "brg_int", "scif_clk";
1308                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1309                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1310                         dma-names = "tx", "rx", "tx", "rx";
1311                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1312                         resets = <&cpg 202>;
1313                         status = "disabled";
1314                 };
1315
1316                 i2c_dvfs: i2c@e60b0000 {
1317                         #address-cells = <1>;
1318                         #size-cells = <0>;
1319                         compatible = "renesas,iic-r8a7795",
1320                                      "renesas,rcar-gen3-iic",
1321                                      "renesas,rmobile-iic";
1322                         reg = <0 0xe60b0000 0 0x425>;
1323                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1324                         clocks = <&cpg CPG_MOD 926>;
1325                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1326                         resets = <&cpg 926>;
1327                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1328                         dma-names = "tx", "rx";
1329                         status = "disabled";
1330                 };
1331
1332                 i2c0: i2c@e6500000 {
1333                         #address-cells = <1>;
1334                         #size-cells = <0>;
1335                         compatible = "renesas,i2c-r8a7795",
1336                                      "renesas,rcar-gen3-i2c";
1337                         reg = <0 0xe6500000 0 0x40>;
1338                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1339                         clocks = <&cpg CPG_MOD 931>;
1340                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1341                         resets = <&cpg 931>;
1342                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
1343                                <&dmac2 0x91>, <&dmac2 0x90>;
1344                         dma-names = "tx", "rx", "tx", "rx";
1345                         i2c-scl-internal-delay-ns = <110>;
1346                         status = "disabled";
1347                 };
1348
1349                 i2c1: i2c@e6508000 {
1350                         #address-cells = <1>;
1351                         #size-cells = <0>;
1352                         compatible = "renesas,i2c-r8a7795",
1353                                      "renesas,rcar-gen3-i2c";
1354                         reg = <0 0xe6508000 0 0x40>;
1355                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1356                         clocks = <&cpg CPG_MOD 930>;
1357                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1358                         resets = <&cpg 930>;
1359                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
1360                                <&dmac2 0x93>, <&dmac2 0x92>;
1361                         dma-names = "tx", "rx", "tx", "rx";
1362                         i2c-scl-internal-delay-ns = <6>;
1363                         status = "disabled";
1364                 };
1365
1366                 i2c2: i2c@e6510000 {
1367                         #address-cells = <1>;
1368                         #size-cells = <0>;
1369                         compatible = "renesas,i2c-r8a7795",
1370                                      "renesas,rcar-gen3-i2c";
1371                         reg = <0 0xe6510000 0 0x40>;
1372                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1373                         clocks = <&cpg CPG_MOD 929>;
1374                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1375                         resets = <&cpg 929>;
1376                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
1377                                <&dmac2 0x95>, <&dmac2 0x94>;
1378                         dma-names = "tx", "rx", "tx", "rx";
1379                         i2c-scl-internal-delay-ns = <6>;
1380                         status = "disabled";
1381                 };
1382
1383                 i2c3: i2c@e66d0000 {
1384                         #address-cells = <1>;
1385                         #size-cells = <0>;
1386                         compatible = "renesas,i2c-r8a7795",
1387                                      "renesas,rcar-gen3-i2c";
1388                         reg = <0 0xe66d0000 0 0x40>;
1389                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1390                         clocks = <&cpg CPG_MOD 928>;
1391                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1392                         resets = <&cpg 928>;
1393                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1394                         dma-names = "tx", "rx";
1395                         i2c-scl-internal-delay-ns = <110>;
1396                         status = "disabled";
1397                 };
1398
1399                 i2c4: i2c@e66d8000 {
1400                         #address-cells = <1>;
1401                         #size-cells = <0>;
1402                         compatible = "renesas,i2c-r8a7795",
1403                                      "renesas,rcar-gen3-i2c";
1404                         reg = <0 0xe66d8000 0 0x40>;
1405                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1406                         clocks = <&cpg CPG_MOD 927>;
1407                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1408                         resets = <&cpg 927>;
1409                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1410                         dma-names = "tx", "rx";
1411                         i2c-scl-internal-delay-ns = <110>;
1412                         status = "disabled";
1413                 };
1414
1415                 i2c5: i2c@e66e0000 {
1416                         #address-cells = <1>;
1417                         #size-cells = <0>;
1418                         compatible = "renesas,i2c-r8a7795",
1419                                      "renesas,rcar-gen3-i2c";
1420                         reg = <0 0xe66e0000 0 0x40>;
1421                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1422                         clocks = <&cpg CPG_MOD 919>;
1423                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1424                         resets = <&cpg 919>;
1425                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1426                         dma-names = "tx", "rx";
1427                         i2c-scl-internal-delay-ns = <110>;
1428                         status = "disabled";
1429                 };
1430
1431                 i2c6: i2c@e66e8000 {
1432                         #address-cells = <1>;
1433                         #size-cells = <0>;
1434                         compatible = "renesas,i2c-r8a7795",
1435                                      "renesas,rcar-gen3-i2c";
1436                         reg = <0 0xe66e8000 0 0x40>;
1437                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1438                         clocks = <&cpg CPG_MOD 918>;
1439                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1440                         resets = <&cpg 918>;
1441                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1442                         dma-names = "tx", "rx";
1443                         i2c-scl-internal-delay-ns = <6>;
1444                         status = "disabled";
1445                 };
1446
1447                 pwm0: pwm@e6e30000 {
1448                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1449                         reg = <0 0xe6e30000 0 0x8>;
1450                         clocks = <&cpg CPG_MOD 523>;
1451                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1452                         resets = <&cpg 523>;
1453                         #pwm-cells = <2>;
1454                         status = "disabled";
1455                 };
1456
1457                 pwm1: pwm@e6e31000 {
1458                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1459                         reg = <0 0xe6e31000 0 0x8>;
1460                         clocks = <&cpg CPG_MOD 523>;
1461                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1462                         resets = <&cpg 523>;
1463                         #pwm-cells = <2>;
1464                         status = "disabled";
1465                 };
1466
1467                 pwm2: pwm@e6e32000 {
1468                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1469                         reg = <0 0xe6e32000 0 0x8>;
1470                         clocks = <&cpg CPG_MOD 523>;
1471                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1472                         resets = <&cpg 523>;
1473                         #pwm-cells = <2>;
1474                         status = "disabled";
1475                 };
1476
1477                 pwm3: pwm@e6e33000 {
1478                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1479                         reg = <0 0xe6e33000 0 0x8>;
1480                         clocks = <&cpg CPG_MOD 523>;
1481                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1482                         resets = <&cpg 523>;
1483                         #pwm-cells = <2>;
1484                         status = "disabled";
1485                 };
1486
1487                 pwm4: pwm@e6e34000 {
1488                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1489                         reg = <0 0xe6e34000 0 0x8>;
1490                         clocks = <&cpg CPG_MOD 523>;
1491                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1492                         resets = <&cpg 523>;
1493                         #pwm-cells = <2>;
1494                         status = "disabled";
1495                 };
1496
1497                 pwm5: pwm@e6e35000 {
1498                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1499                         reg = <0 0xe6e35000 0 0x8>;
1500                         clocks = <&cpg CPG_MOD 523>;
1501                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1502                         resets = <&cpg 523>;
1503                         #pwm-cells = <2>;
1504                         status = "disabled";
1505                 };
1506
1507                 pwm6: pwm@e6e36000 {
1508                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1509                         reg = <0 0xe6e36000 0 0x8>;
1510                         clocks = <&cpg CPG_MOD 523>;
1511                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1512                         resets = <&cpg 523>;
1513                         #pwm-cells = <2>;
1514                         status = "disabled";
1515                 };
1516
1517                 rcar_sound: sound@ec500000 {
1518                         /*
1519                          * #sound-dai-cells is required
1520                          *
1521                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1522                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1523                          */
1524                         /*
1525                          * #clock-cells is required for audio_clkout0/1/2/3
1526                          *
1527                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1528                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1529                          */
1530                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1531                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1532                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1533                                 <0 0xec540000 0 0x1000>, /* SSIU */
1534                                 <0 0xec541000 0 0x280>,  /* SSI */
1535                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1536                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1537
1538                         clocks = <&cpg CPG_MOD 1005>,
1539                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1540                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1541                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1542                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1543                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1544                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1545                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1546                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1547                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1548                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1549                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1550                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1551                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1552                                  <&audio_clk_a>, <&audio_clk_b>,
1553                                  <&audio_clk_c>,
1554                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1555                         clock-names = "ssi-all",
1556                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1557                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1558                                       "ssi.1", "ssi.0",
1559                                       "src.9", "src.8", "src.7", "src.6",
1560                                       "src.5", "src.4", "src.3", "src.2",
1561                                       "src.1", "src.0",
1562                                       "mix.1", "mix.0",
1563                                       "ctu.1", "ctu.0",
1564                                       "dvc.0", "dvc.1",
1565                                       "clk_a", "clk_b", "clk_c", "clk_i";
1566                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1567                         resets = <&cpg 1005>,
1568                                  <&cpg 1006>, <&cpg 1007>,
1569                                  <&cpg 1008>, <&cpg 1009>,
1570                                  <&cpg 1010>, <&cpg 1011>,
1571                                  <&cpg 1012>, <&cpg 1013>,
1572                                  <&cpg 1014>, <&cpg 1015>;
1573                         reset-names = "ssi-all",
1574                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1575                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1576                                       "ssi.1", "ssi.0";
1577                         status = "disabled";
1578
1579                         rcar_sound,dvc {
1580                                 dvc0: dvc-0 {
1581                                         dmas = <&audma1 0xbc>;
1582                                         dma-names = "tx";
1583                                 };
1584                                 dvc1: dvc-1 {
1585                                         dmas = <&audma1 0xbe>;
1586                                         dma-names = "tx";
1587                                 };
1588                         };
1589
1590                         rcar_sound,mix {
1591                                 mix0: mix-0 { };
1592                                 mix1: mix-1 { };
1593                         };
1594
1595                         rcar_sound,ctu {
1596                                 ctu00: ctu-0 { };
1597                                 ctu01: ctu-1 { };
1598                                 ctu02: ctu-2 { };
1599                                 ctu03: ctu-3 { };
1600                                 ctu10: ctu-4 { };
1601                                 ctu11: ctu-5 { };
1602                                 ctu12: ctu-6 { };
1603                                 ctu13: ctu-7 { };
1604                         };
1605
1606                         rcar_sound,src {
1607                                 src0: src-0 {
1608                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1609                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1610                                         dma-names = "rx", "tx";
1611                                 };
1612                                 src1: src-1 {
1613                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1614                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1615                                         dma-names = "rx", "tx";
1616                                 };
1617                                 src2: src-2 {
1618                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1619                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1620                                         dma-names = "rx", "tx";
1621                                 };
1622                                 src3: src-3 {
1623                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1624                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1625                                         dma-names = "rx", "tx";
1626                                 };
1627                                 src4: src-4 {
1628                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1629                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1630                                         dma-names = "rx", "tx";
1631                                 };
1632                                 src5: src-5 {
1633                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1634                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1635                                         dma-names = "rx", "tx";
1636                                 };
1637                                 src6: src-6 {
1638                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1639                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1640                                         dma-names = "rx", "tx";
1641                                 };
1642                                 src7: src-7 {
1643                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1644                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1645                                         dma-names = "rx", "tx";
1646                                 };
1647                                 src8: src-8 {
1648                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1649                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1650                                         dma-names = "rx", "tx";
1651                                 };
1652                                 src9: src-9 {
1653                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1654                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1655                                         dma-names = "rx", "tx";
1656                                 };
1657                         };
1658
1659                         rcar_sound,ssi {
1660                                 ssi0: ssi-0 {
1661                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1662                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1663                                         dma-names = "rx", "tx", "rxu", "txu";
1664                                 };
1665                                 ssi1: ssi-1 {
1666                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1667                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1668                                         dma-names = "rx", "tx", "rxu", "txu";
1669                                 };
1670                                 ssi2: ssi-2 {
1671                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1672                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1673                                         dma-names = "rx", "tx", "rxu", "txu";
1674                                 };
1675                                 ssi3: ssi-3 {
1676                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1677                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1678                                         dma-names = "rx", "tx", "rxu", "txu";
1679                                 };
1680                                 ssi4: ssi-4 {
1681                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1682                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1683                                         dma-names = "rx", "tx", "rxu", "txu";
1684                                 };
1685                                 ssi5: ssi-5 {
1686                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1687                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1688                                         dma-names = "rx", "tx", "rxu", "txu";
1689                                 };
1690                                 ssi6: ssi-6 {
1691                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1692                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1693                                         dma-names = "rx", "tx", "rxu", "txu";
1694                                 };
1695                                 ssi7: ssi-7 {
1696                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1697                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1698                                         dma-names = "rx", "tx", "rxu", "txu";
1699                                 };
1700                                 ssi8: ssi-8 {
1701                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1702                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1703                                         dma-names = "rx", "tx", "rxu", "txu";
1704                                 };
1705                                 ssi9: ssi-9 {
1706                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1707                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1708                                         dma-names = "rx", "tx", "rxu", "txu";
1709                                 };
1710                         };
1711                 };
1712
1713                 sata: sata@ee300000 {
1714                         compatible = "renesas,sata-r8a7795",
1715                                      "renesas,rcar-gen3-sata";
1716                         reg = <0 0xee300000 0 0x200000>;
1717                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1718                         clocks = <&cpg CPG_MOD 815>;
1719                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1720                         resets = <&cpg 815>;
1721                         status = "disabled";
1722                         iommus = <&ipmmu_hc 2>;
1723                 };
1724
1725                 usb3_phy0: usb-phy@e65ee000 {
1726                         compatible = "renesas,r8a7795-usb3-phy",
1727                                      "renesas,rcar-gen3-usb3-phy";
1728                         reg = <0 0xe65ee000 0 0x90>;
1729                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1730                                  <&usb_extal_clk>;
1731                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1732                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1733                         resets = <&cpg 328>;
1734                         #phy-cells = <0>;
1735                         status = "disabled";
1736                 };
1737
1738                 xhci0: usb@ee000000 {
1739                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1740                         reg = <0 0xee000000 0 0xc00>;
1741                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1742                         clocks = <&cpg CPG_MOD 328>;
1743                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1744                         resets = <&cpg 328>;
1745                         status = "disabled";
1746                 };
1747
1748                 usb3_peri0: usb@ee020000 {
1749                         compatible = "renesas,r8a7795-usb3-peri",
1750                                      "renesas,rcar-gen3-usb3-peri";
1751                         reg = <0 0xee020000 0 0x400>;
1752                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1753                         clocks = <&cpg CPG_MOD 328>;
1754                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1755                         resets = <&cpg 328>;
1756                         status = "disabled";
1757                 };
1758
1759                 usb_dmac0: dma-controller@e65a0000 {
1760                         compatible = "renesas,r8a7795-usb-dmac",
1761                                      "renesas,usb-dmac";
1762                         reg = <0 0xe65a0000 0 0x100>;
1763                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1764                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1765                         interrupt-names = "ch0", "ch1";
1766                         clocks = <&cpg CPG_MOD 330>;
1767                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1768                         resets = <&cpg 330>;
1769                         #dma-cells = <1>;
1770                         dma-channels = <2>;
1771                 };
1772
1773                 usb_dmac1: dma-controller@e65b0000 {
1774                         compatible = "renesas,r8a7795-usb-dmac",
1775                                      "renesas,usb-dmac";
1776                         reg = <0 0xe65b0000 0 0x100>;
1777                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1778                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1779                         interrupt-names = "ch0", "ch1";
1780                         clocks = <&cpg CPG_MOD 331>;
1781                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1782                         resets = <&cpg 331>;
1783                         #dma-cells = <1>;
1784                         dma-channels = <2>;
1785                 };
1786
1787                 usb_dmac2: dma-controller@e6460000 {
1788                         compatible = "renesas,r8a7795-usb-dmac",
1789                                      "renesas,usb-dmac";
1790                         reg = <0 0xe6460000 0 0x100>;
1791                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1792                                       GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1793                         interrupt-names = "ch0", "ch1";
1794                         clocks = <&cpg CPG_MOD 326>;
1795                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1796                         resets = <&cpg 326>;
1797                         #dma-cells = <1>;
1798                         dma-channels = <2>;
1799                 };
1800
1801                 usb_dmac3: dma-controller@e6470000 {
1802                         compatible = "renesas,r8a7795-usb-dmac",
1803                                      "renesas,usb-dmac";
1804                         reg = <0 0xe6470000 0 0x100>;
1805                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1806                                       GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1807                         interrupt-names = "ch0", "ch1";
1808                         clocks = <&cpg CPG_MOD 329>;
1809                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1810                         resets = <&cpg 329>;
1811                         #dma-cells = <1>;
1812                         dma-channels = <2>;
1813                 };
1814
1815                 rpc: rpc@0xee200000 {
1816                         compatible = "renesas,rpc-r8a7795", "renesas,rpc";
1817                         reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
1818                         clocks = <&cpg CPG_MOD 917>;
1819                         bank-width = <2>;
1820                         status = "disabled";
1821                 };
1822
1823                 sdhi0: sd@ee100000 {
1824                         compatible = "renesas,sdhi-r8a7795",
1825                                      "renesas,rcar-gen3-sdhi";
1826                         reg = <0 0xee100000 0 0x2000>;
1827                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1828                         clocks = <&cpg CPG_MOD 314>;
1829                         max-frequency = <200000000>;
1830                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1831                         resets = <&cpg 314>;
1832                         status = "disabled";
1833                 };
1834
1835                 sdhi1: sd@ee120000 {
1836                         compatible = "renesas,sdhi-r8a7795",
1837                                      "renesas,rcar-gen3-sdhi";
1838                         reg = <0 0xee120000 0 0x2000>;
1839                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1840                         clocks = <&cpg CPG_MOD 313>;
1841                         max-frequency = <200000000>;
1842                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1843                         resets = <&cpg 313>;
1844                         status = "disabled";
1845                 };
1846
1847                 sdhi2: sd@ee140000 {
1848                         compatible = "renesas,sdhi-r8a7795",
1849                                      "renesas,rcar-gen3-sdhi";
1850                         reg = <0 0xee140000 0 0x2000>;
1851                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1852                         clocks = <&cpg CPG_MOD 312>;
1853                         max-frequency = <200000000>;
1854                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1855                         resets = <&cpg 312>;
1856                         status = "disabled";
1857                 };
1858
1859                 sdhi3: sd@ee160000 {
1860                         compatible = "renesas,sdhi-r8a7795",
1861                                      "renesas,rcar-gen3-sdhi";
1862                         reg = <0 0xee160000 0 0x2000>;
1863                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1864                         clocks = <&cpg CPG_MOD 311>;
1865                         max-frequency = <200000000>;
1866                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1867                         resets = <&cpg 311>;
1868                         status = "disabled";
1869                 };
1870
1871                 usb2_phy0: usb-phy@ee080200 {
1872                         compatible = "renesas,usb2-phy-r8a7795",
1873                                      "renesas,rcar-gen3-usb2-phy";
1874                         reg = <0 0xee080200 0 0x700>;
1875                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1876                         clocks = <&cpg CPG_MOD 703>;
1877                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1878                         resets = <&cpg 703>;
1879                         #phy-cells = <0>;
1880                         status = "disabled";
1881                 };
1882
1883                 usb2_phy1: usb-phy@ee0a0200 {
1884                         compatible = "renesas,usb2-phy-r8a7795",
1885                                      "renesas,rcar-gen3-usb2-phy";
1886                         reg = <0 0xee0a0200 0 0x700>;
1887                         clocks = <&cpg CPG_MOD 702>;
1888                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1889                         resets = <&cpg 702>;
1890                         #phy-cells = <0>;
1891                         status = "disabled";
1892                 };
1893
1894                 usb2_phy2: usb-phy@ee0c0200 {
1895                         compatible = "renesas,usb2-phy-r8a7795",
1896                                      "renesas,rcar-gen3-usb2-phy";
1897                         reg = <0 0xee0c0200 0 0x700>;
1898                         clocks = <&cpg CPG_MOD 701>;
1899                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1900                         resets = <&cpg 701>;
1901                         #phy-cells = <0>;
1902                         status = "disabled";
1903                 };
1904
1905                 usb2_phy3: usb-phy@ee0e0200 {
1906                         compatible = "renesas,usb2-phy-r8a7795",
1907                                      "renesas,rcar-gen3-usb2-phy";
1908                         reg = <0 0xee0e0200 0 0x700>;
1909                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1910                         clocks = <&cpg CPG_MOD 700>;
1911                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1912                         resets = <&cpg 700>;
1913                         #phy-cells = <0>;
1914                         status = "disabled";
1915                 };
1916
1917                 ehci0: usb@ee080100 {
1918                         compatible = "generic-ehci";
1919                         reg = <0 0xee080100 0 0x100>;
1920                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1921                         clocks = <&cpg CPG_MOD 703>;
1922                         phys = <&usb2_phy0>;
1923                         phy-names = "usb";
1924                         companion = <&ohci0>;
1925                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1926                         resets = <&cpg 703>;
1927                         status = "disabled";
1928                 };
1929
1930                 ehci1: usb@ee0a0100 {
1931                         compatible = "generic-ehci";
1932                         reg = <0 0xee0a0100 0 0x100>;
1933                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1934                         clocks = <&cpg CPG_MOD 702>;
1935                         phys = <&usb2_phy1>;
1936                         phy-names = "usb";
1937                         companion = <&ohci1>;
1938                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1939                         resets = <&cpg 702>;
1940                         status = "disabled";
1941                 };
1942
1943                 ehci2: usb@ee0c0100 {
1944                         compatible = "generic-ehci";
1945                         reg = <0 0xee0c0100 0 0x100>;
1946                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1947                         clocks = <&cpg CPG_MOD 701>;
1948                         phys = <&usb2_phy2>;
1949                         phy-names = "usb";
1950                         companion = <&ohci2>;
1951                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1952                         resets = <&cpg 701>;
1953                         status = "disabled";
1954                 };
1955
1956                 ehci3: usb@ee0e0100 {
1957                         compatible = "generic-ehci";
1958                         reg = <0 0xee0e0100 0 0x100>;
1959                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1960                         clocks = <&cpg CPG_MOD 700>;
1961                         phys = <&usb2_phy3>;
1962                         phy-names = "usb";
1963                         companion = <&ohci3>;
1964                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1965                         resets = <&cpg 700>;
1966                         status = "disabled";
1967                 };
1968
1969                 ohci0: usb@ee080000 {
1970                         compatible = "generic-ohci";
1971                         reg = <0 0xee080000 0 0x100>;
1972                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1973                         clocks = <&cpg CPG_MOD 703>;
1974                         phys = <&usb2_phy0>;
1975                         phy-names = "usb";
1976                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1977                         resets = <&cpg 703>;
1978                         status = "disabled";
1979                 };
1980
1981                 ohci1: usb@ee0a0000 {
1982                         compatible = "generic-ohci";
1983                         reg = <0 0xee0a0000 0 0x100>;
1984                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1985                         clocks = <&cpg CPG_MOD 702>;
1986                         phys = <&usb2_phy1>;
1987                         phy-names = "usb";
1988                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1989                         resets = <&cpg 702>;
1990                         status = "disabled";
1991                 };
1992
1993                 ohci2: usb@ee0c0000 {
1994                         compatible = "generic-ohci";
1995                         reg = <0 0xee0c0000 0 0x100>;
1996                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1997                         clocks = <&cpg CPG_MOD 701>;
1998                         phys = <&usb2_phy2>;
1999                         phy-names = "usb";
2000                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2001                         resets = <&cpg 701>;
2002                         status = "disabled";
2003                 };
2004
2005                 ohci3: usb@ee0e0000 {
2006                         compatible = "generic-ohci";
2007                         reg = <0 0xee0e0000 0 0x100>;
2008                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2009                         clocks = <&cpg CPG_MOD 700>;
2010                         phys = <&usb2_phy3>;
2011                         phy-names = "usb";
2012                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2013                         resets = <&cpg 700>;
2014                         status = "disabled";
2015                 };
2016
2017                 hsusb: usb@e6590000 {
2018                         compatible = "renesas,usbhs-r8a7795",
2019                                      "renesas,rcar-gen3-usbhs";
2020                         reg = <0 0xe6590000 0 0x100>;
2021                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
2022                         clocks = <&cpg CPG_MOD 704>;
2023                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
2024                                <&usb_dmac1 0>, <&usb_dmac1 1>;
2025                         dma-names = "ch0", "ch1", "ch2", "ch3";
2026                         renesas,buswait = <11>;
2027                         phys = <&usb2_phy0>;
2028                         phy-names = "usb";
2029                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2030                         resets = <&cpg 704>;
2031                         status = "disabled";
2032                 };
2033
2034                 hsusb3: usb@e659c000 {
2035                         compatible = "renesas,usbhs-r8a7795",
2036                                      "renesas,rcar-gen3-usbhs";
2037                         reg = <0 0xe659c000 0 0x100>;
2038                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2039                         clocks = <&cpg CPG_MOD 705>;
2040                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
2041                                <&usb_dmac3 0>, <&usb_dmac3 1>;
2042                         dma-names = "ch0", "ch1", "ch2", "ch3";
2043                         renesas,buswait = <11>;
2044                         phys = <&usb2_phy3>;
2045                         phy-names = "usb";
2046                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2047                         resets = <&cpg 705>;
2048                         status = "disabled";
2049                 };
2050
2051                 pciec0: pcie@fe000000 {
2052                         compatible = "renesas,pcie-r8a7795",
2053                                      "renesas,pcie-rcar-gen3";
2054                         reg = <0 0xfe000000 0 0x80000>;
2055                         #address-cells = <3>;
2056                         #size-cells = <2>;
2057                         bus-range = <0x00 0xff>;
2058                         device_type = "pci";
2059                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2060                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2061                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2062                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2063                         /* Map all possible DDR as inbound ranges */
2064                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2065                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2066                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2067                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2068                         #interrupt-cells = <1>;
2069                         interrupt-map-mask = <0 0 0 0>;
2070                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2071                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2072                         clock-names = "pcie", "pcie_bus";
2073                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2074                         resets = <&cpg 319>;
2075                         status = "disabled";
2076                 };
2077
2078                 pciec1: pcie@ee800000 {
2079                         compatible = "renesas,pcie-r8a7795",
2080                                      "renesas,pcie-rcar-gen3";
2081                         reg = <0 0xee800000 0 0x80000>;
2082                         #address-cells = <3>;
2083                         #size-cells = <2>;
2084                         bus-range = <0x00 0xff>;
2085                         device_type = "pci";
2086                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2087                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2088                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2089                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2090                         /* Map all possible DDR as inbound ranges */
2091                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2092                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2093                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2094                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2095                         #interrupt-cells = <1>;
2096                         interrupt-map-mask = <0 0 0 0>;
2097                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2098                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2099                         clock-names = "pcie", "pcie_bus";
2100                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2101                         resets = <&cpg 318>;
2102                         status = "disabled";
2103                 };
2104
2105                 imr-lx4@fe860000 {
2106                         compatible = "renesas,r8a7795-imr-lx4",
2107                                      "renesas,imr-lx4";
2108                         reg = <0 0xfe860000 0 0x2000>;
2109                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2110                         clocks = <&cpg CPG_MOD 823>;
2111                         power-domains = <&sysc R8A7795_PD_A3VC>;
2112                         resets = <&cpg 823>;
2113                 };
2114
2115                 imr-lx4@fe870000 {
2116                         compatible = "renesas,r8a7795-imr-lx4",
2117                                      "renesas,imr-lx4";
2118                         reg = <0 0xfe870000 0 0x2000>;
2119                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2120                         clocks = <&cpg CPG_MOD 822>;
2121                         power-domains = <&sysc R8A7795_PD_A3VC>;
2122                         resets = <&cpg 822>;
2123                 };
2124
2125                 imr-lx4@fe880000 {
2126                         compatible = "renesas,r8a7795-imr-lx4",
2127                                      "renesas,imr-lx4";
2128                         reg = <0 0xfe880000 0 0x2000>;
2129                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2130                         clocks = <&cpg CPG_MOD 821>;
2131                         power-domains = <&sysc R8A7795_PD_A3VC>;
2132                         resets = <&cpg 821>;
2133                 };
2134
2135                 imr-lx4@fe890000 {
2136                         compatible = "renesas,r8a7795-imr-lx4",
2137                                      "renesas,imr-lx4";
2138                         reg = <0 0xfe890000 0 0x2000>;
2139                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2140                         clocks = <&cpg CPG_MOD 820>;
2141                         power-domains = <&sysc R8A7795_PD_A3VC>;
2142                         resets = <&cpg 820>;
2143                 };
2144
2145                 vspbc: vsp@fe920000 {
2146                         compatible = "renesas,vsp2";
2147                         reg = <0 0xfe920000 0 0x8000>;
2148                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2149                         clocks = <&cpg CPG_MOD 624>;
2150                         power-domains = <&sysc R8A7795_PD_A3VP>;
2151                         resets = <&cpg 624>;
2152
2153                         renesas,fcp = <&fcpvb1>;
2154                 };
2155
2156                 fcpvb1: fcp@fe92f000 {
2157                         compatible = "renesas,fcpv";
2158                         reg = <0 0xfe92f000 0 0x200>;
2159                         clocks = <&cpg CPG_MOD 606>;
2160                         power-domains = <&sysc R8A7795_PD_A3VP>;
2161                         resets = <&cpg 606>;
2162                         iommus = <&ipmmu_vp1 7>;
2163                 };
2164
2165                 fcpf0: fcp@fe950000 {
2166                         compatible = "renesas,fcpf";
2167                         reg = <0 0xfe950000 0 0x200>;
2168                         clocks = <&cpg CPG_MOD 615>;
2169                         power-domains = <&sysc R8A7795_PD_A3VP>;
2170                         resets = <&cpg 615>;
2171                         iommus = <&ipmmu_vp0 0>;
2172                 };
2173
2174                 fcpf1: fcp@fe951000 {
2175                         compatible = "renesas,fcpf";
2176                         reg = <0 0xfe951000 0 0x200>;
2177                         clocks = <&cpg CPG_MOD 614>;
2178                         power-domains = <&sysc R8A7795_PD_A3VP>;
2179                         resets = <&cpg 614>;
2180                         iommus = <&ipmmu_vp1 1>;
2181                 };
2182
2183                 vspbd: vsp@fe960000 {
2184                         compatible = "renesas,vsp2";
2185                         reg = <0 0xfe960000 0 0x8000>;
2186                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2187                         clocks = <&cpg CPG_MOD 626>;
2188                         power-domains = <&sysc R8A7795_PD_A3VP>;
2189                         resets = <&cpg 626>;
2190
2191                         renesas,fcp = <&fcpvb0>;
2192                 };
2193
2194                 fcpvb0: fcp@fe96f000 {
2195                         compatible = "renesas,fcpv";
2196                         reg = <0 0xfe96f000 0 0x200>;
2197                         clocks = <&cpg CPG_MOD 607>;
2198                         power-domains = <&sysc R8A7795_PD_A3VP>;
2199                         resets = <&cpg 607>;
2200                         iommus = <&ipmmu_vp0 5>;
2201                 };
2202
2203                 vspi0: vsp@fe9a0000 {
2204                         compatible = "renesas,vsp2";
2205                         reg = <0 0xfe9a0000 0 0x8000>;
2206                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2207                         clocks = <&cpg CPG_MOD 631>;
2208                         power-domains = <&sysc R8A7795_PD_A3VP>;
2209                         resets = <&cpg 631>;
2210
2211                         renesas,fcp = <&fcpvi0>;
2212                 };
2213
2214                 fcpvi0: fcp@fe9af000 {
2215                         compatible = "renesas,fcpv";
2216                         reg = <0 0xfe9af000 0 0x200>;
2217                         clocks = <&cpg CPG_MOD 611>;
2218                         power-domains = <&sysc R8A7795_PD_A3VP>;
2219                         resets = <&cpg 611>;
2220                         iommus = <&ipmmu_vp0 8>;
2221                 };
2222
2223                 vspi1: vsp@fe9b0000 {
2224                         compatible = "renesas,vsp2";
2225                         reg = <0 0xfe9b0000 0 0x8000>;
2226                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2227                         clocks = <&cpg CPG_MOD 630>;
2228                         power-domains = <&sysc R8A7795_PD_A3VP>;
2229                         resets = <&cpg 630>;
2230
2231                         renesas,fcp = <&fcpvi1>;
2232                 };
2233
2234                 fcpvi1: fcp@fe9bf000 {
2235                         compatible = "renesas,fcpv";
2236                         reg = <0 0xfe9bf000 0 0x200>;
2237                         clocks = <&cpg CPG_MOD 610>;
2238                         power-domains = <&sysc R8A7795_PD_A3VP>;
2239                         resets = <&cpg 610>;
2240                         iommus = <&ipmmu_vp1 9>;
2241                 };
2242
2243                 vspd0: vsp@fea20000 {
2244                         compatible = "renesas,vsp2";
2245                         reg = <0 0xfea20000 0 0x8000>;
2246                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2247                         clocks = <&cpg CPG_MOD 623>;
2248                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2249                         resets = <&cpg 623>;
2250
2251                         renesas,fcp = <&fcpvd0>;
2252                 };
2253
2254                 fcpvd0: fcp@fea27000 {
2255                         compatible = "renesas,fcpv";
2256                         reg = <0 0xfea27000 0 0x200>;
2257                         clocks = <&cpg CPG_MOD 603>;
2258                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2259                         resets = <&cpg 603>;
2260                         iommus = <&ipmmu_vi0 8>;
2261                 };
2262
2263                 vspd1: vsp@fea28000 {
2264                         compatible = "renesas,vsp2";
2265                         reg = <0 0xfea28000 0 0x8000>;
2266                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2267                         clocks = <&cpg CPG_MOD 622>;
2268                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2269                         resets = <&cpg 622>;
2270
2271                         renesas,fcp = <&fcpvd1>;
2272                 };
2273
2274                 fcpvd1: fcp@fea2f000 {
2275                         compatible = "renesas,fcpv";
2276                         reg = <0 0xfea2f000 0 0x200>;
2277                         clocks = <&cpg CPG_MOD 602>;
2278                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2279                         resets = <&cpg 602>;
2280                         iommus = <&ipmmu_vi0 9>;
2281                 };
2282
2283                 vspd2: vsp@fea30000 {
2284                         compatible = "renesas,vsp2";
2285                         reg = <0 0xfea30000 0 0x8000>;
2286                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2287                         clocks = <&cpg CPG_MOD 621>;
2288                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2289                         resets = <&cpg 621>;
2290
2291                         renesas,fcp = <&fcpvd2>;
2292                 };
2293
2294                 fcpvd2: fcp@fea37000 {
2295                         compatible = "renesas,fcpv";
2296                         reg = <0 0xfea37000 0 0x200>;
2297                         clocks = <&cpg CPG_MOD 601>;
2298                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2299                         resets = <&cpg 601>;
2300                         iommus = <&ipmmu_vi1 10>;
2301                 };
2302
2303                 fdp1@fe940000 {
2304                         compatible = "renesas,fdp1";
2305                         reg = <0 0xfe940000 0 0x2400>;
2306                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2307                         clocks = <&cpg CPG_MOD 119>;
2308                         power-domains = <&sysc R8A7795_PD_A3VP>;
2309                         resets = <&cpg 119>;
2310                         renesas,fcp = <&fcpf0>;
2311                 };
2312
2313                 fdp1@fe944000 {
2314                         compatible = "renesas,fdp1";
2315                         reg = <0 0xfe944000 0 0x2400>;
2316                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2317                         clocks = <&cpg CPG_MOD 118>;
2318                         power-domains = <&sysc R8A7795_PD_A3VP>;
2319                         resets = <&cpg 118>;
2320                         renesas,fcp = <&fcpf1>;
2321                 };
2322
2323                 hdmi0: hdmi@fead0000 {
2324                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2325                         reg = <0 0xfead0000 0 0x10000>;
2326                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2327                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2328                         clock-names = "iahb", "isfr";
2329                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2330                         resets = <&cpg 729>;
2331                         status = "disabled";
2332
2333                         ports {
2334                                 #address-cells = <1>;
2335                                 #size-cells = <0>;
2336                                 port@0 {
2337                                         reg = <0>;
2338                                         dw_hdmi0_in: endpoint {
2339                                                 remote-endpoint = <&du_out_hdmi0>;
2340                                         };
2341                                 };
2342                                 port@1 {
2343                                         reg = <1>;
2344                                 };
2345                         };
2346                 };
2347
2348                 hdmi1: hdmi@feae0000 {
2349                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2350                         reg = <0 0xfeae0000 0 0x10000>;
2351                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2352                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2353                         clock-names = "iahb", "isfr";
2354                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2355                         resets = <&cpg 728>;
2356                         status = "disabled";
2357
2358                         ports {
2359                                 #address-cells = <1>;
2360                                 #size-cells = <0>;
2361                                 port@0 {
2362                                         reg = <0>;
2363                                         dw_hdmi1_in: endpoint {
2364                                                 remote-endpoint = <&du_out_hdmi1>;
2365                                         };
2366                                 };
2367                                 port@1 {
2368                                         reg = <1>;
2369                                 };
2370                         };
2371                 };
2372
2373                 du: display@feb00000 {
2374                         compatible = "renesas,du-r8a7795";
2375                         reg = <0 0xfeb00000 0 0x80000>,
2376                               <0 0xfeb90000 0 0x14>;
2377                         reg-names = "du", "lvds.0";
2378                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2379                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2380                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2381                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2382                         clocks = <&cpg CPG_MOD 724>,
2383                                  <&cpg CPG_MOD 723>,
2384                                  <&cpg CPG_MOD 722>,
2385                                  <&cpg CPG_MOD 721>,
2386                                  <&cpg CPG_MOD 727>;
2387                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
2388                         vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
2389                         status = "disabled";
2390
2391                         ports {
2392                                 #address-cells = <1>;
2393                                 #size-cells = <0>;
2394
2395                                 port@0 {
2396                                         reg = <0>;
2397                                         du_out_rgb: endpoint {
2398                                         };
2399                                 };
2400                                 port@1 {
2401                                         reg = <1>;
2402                                         du_out_hdmi0: endpoint {
2403                                                 remote-endpoint = <&dw_hdmi0_in>;
2404                                         };
2405                                 };
2406                                 port@2 {
2407                                         reg = <2>;
2408                                         du_out_hdmi1: endpoint {
2409                                                 remote-endpoint = <&dw_hdmi1_in>;
2410                                         };
2411                                 };
2412                                 port@3 {
2413                                         reg = <3>;
2414                                         du_out_lvds0: endpoint {
2415                                         };
2416                                 };
2417                         };
2418                 };
2419
2420                 tsc: thermal@e6198000 {
2421                         compatible = "renesas,r8a7795-thermal";
2422                         reg = <0 0xe6198000 0 0x100>,
2423                               <0 0xe61a0000 0 0x100>,
2424                               <0 0xe61a8000 0 0x100>;
2425                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2426                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2427                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2428                         clocks = <&cpg CPG_MOD 522>;
2429                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2430                         resets = <&cpg 522>;
2431                         #thermal-sensor-cells = <1>;
2432                         status = "okay";
2433                 };
2434         };
2435
2436         timer {
2437                 compatible = "arm,armv8-timer";
2438                 interrupts-extended = <&gic GIC_PPI 13
2439                                        (GIC_CPU_MASK_SIMPLE(8) |
2440                                        IRQ_TYPE_LEVEL_LOW)>,
2441                                       <&gic GIC_PPI 14
2442                                        (GIC_CPU_MASK_SIMPLE(8) |
2443                                        IRQ_TYPE_LEVEL_LOW)>,
2444                                       <&gic GIC_PPI 11
2445                                        (GIC_CPU_MASK_SIMPLE(8) |
2446                                        IRQ_TYPE_LEVEL_LOW)>,
2447                                       <&gic GIC_PPI 10
2448                                        (GIC_CPU_MASK_SIMPLE(8) |
2449                                        IRQ_TYPE_LEVEL_LOW)>;
2450         };
2451
2452         thermal-zones {
2453                 sensor_thermal1: sensor-thermal1 {
2454                         polling-delay-passive = <250>;
2455                         polling-delay = <1000>;
2456                         thermal-sensors = <&tsc 0>;
2457
2458                         trips {
2459                                 sensor1_passive: sensor1-passive {
2460                                         temperature = <95000>;
2461                                         hysteresis = <2000>;
2462                                         type = "passive";
2463                                 };
2464                                 sensor1_crit: sensor1-crit {
2465                                         temperature = <120000>;
2466                                         hysteresis = <2000>;
2467                                         type = "critical";
2468                                 };
2469                         };
2470
2471                         cooling-maps {
2472                                 map0 {
2473                                         trip = <&sensor1_passive>;
2474                                         cooling-device = <&a57_0 4 4>;
2475                                 };
2476                         };
2477                 };
2478
2479                 sensor_thermal2: sensor-thermal2 {
2480                         polling-delay-passive = <250>;
2481                         polling-delay = <1000>;
2482                         thermal-sensors = <&tsc 1>;
2483
2484                         trips {
2485                                 sensor2_passive: sensor2-passive {
2486                                         temperature = <95000>;
2487                                         hysteresis = <2000>;
2488                                         type = "passive";
2489                                 };
2490                                 sensor2_crit: sensor2-crit {
2491                                         temperature = <120000>;
2492                                         hysteresis = <2000>;
2493                                         type = "critical";
2494                                 };
2495                         };
2496
2497                         cooling-maps {
2498                                 map0 {
2499                                         trip = <&sensor2_passive>;
2500                                         cooling-device = <&a57_0 4 4>;
2501                                 };
2502                         };
2503                 };
2504
2505                 sensor_thermal3: sensor-thermal3 {
2506                         polling-delay-passive = <250>;
2507                         polling-delay = <1000>;
2508                         thermal-sensors = <&tsc 2>;
2509
2510                         trips {
2511                                 sensor3_passive: sensor3-passive {
2512                                         temperature = <95000>;
2513                                         hysteresis = <2000>;
2514                                         type = "passive";
2515                                 };
2516                                 sensor3_crit: sensor3-crit {
2517                                         temperature = <120000>;
2518                                         hysteresis = <2000>;
2519                                         type = "critical";
2520                                 };
2521                         };
2522
2523                         cooling-maps {
2524                                 map0 {
2525                                         trip = <&sensor3_passive>;
2526                                         cooling-device = <&a57_0 4 4>;
2527                                 };
2528                         };
2529                 };
2530         };
2531
2532         /* External USB clocks - can be overridden by the board */
2533         usb3s0_clk: usb3s0 {
2534                 compatible = "fixed-clock";
2535                 #clock-cells = <0>;
2536                 clock-frequency = <0>;
2537         };
2538
2539         usb_extal_clk: usb_extal {
2540                 compatible = "fixed-clock";
2541                 #clock-cells = <0>;
2542                 clock-frequency = <0>;
2543         };
2544 };