arch/arm/dts/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a57_3: cpu@3 {
  68                         compatible = "arm,cortex-a57","arm,armv8";
  69                         reg = <0x3>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_0: cpu@100 {
  77                         compatible = "arm,cortex-a53", "arm,armv8";
  78                         reg = <0x100>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_1: cpu@101 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x101>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 a53_2: cpu@102 {
  95                         compatible = "arm,cortex-a53","arm,armv8";
  96                         reg = <0x102>;
  97                         device_type = "cpu";
  98                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  99                         next-level-cache = <&L2_CA53>;
 100                         enable-method = "psci";
 101                 };
 102
 103                 a53_3: cpu@103 {
 104                         compatible = "arm,cortex-a53","arm,armv8";
 105                         reg = <0x103>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                 };
 111
 112                 L2_CA57: cache-controller-0 {
 113                         compatible = "cache";
 114                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 115                         cache-unified;
 116                         cache-level = <2>;
 117                 };
 118
 119                 L2_CA53: cache-controller-1 {
 120                         compatible = "cache";
 121                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 122                         cache-unified;
 123                         cache-level = <2>;
 124                 };
 125         };
 126
 127         extal_clk: extal {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 /* This value must be overridden by the board */
 131                 clock-frequency = <0>;
 132                 u-boot,dm-pre-reloc;
 133         };
 134
 135         extalr_clk: extalr {
 136                 compatible = "fixed-clock";
 137                 #clock-cells = <0>;
 138                 /* This value must be overridden by the board */
 139                 clock-frequency = <0>;
 140                 u-boot,dm-pre-reloc;
 141         };
 142
 143         /*
 144          * The external audio clocks are configured as 0 Hz fixed frequency
 145          * clocks by default.
 146          * Boards that provide audio clocks should override them.
 147          */
 148         audio_clk_a: audio_clk_a {
 149                 compatible = "fixed-clock";
 150                 #clock-cells = <0>;
 151                 clock-frequency = <0>;
 152         };
 153
 154         audio_clk_b: audio_clk_b {
 155                 compatible = "fixed-clock";
 156                 #clock-cells = <0>;
 157                 clock-frequency = <0>;
 158         };
 159
 160         audio_clk_c: audio_clk_c {
 161                 compatible = "fixed-clock";
 162                 #clock-cells = <0>;
 163                 clock-frequency = <0>;
 164         };
 165
 166         /* External CAN clock - to be overridden by boards that provide it */
 167         can_clk: can {
 168                 compatible = "fixed-clock";
 169                 #clock-cells = <0>;
 170                 clock-frequency = <0>;
 171         };
 172
 173         /* External SCIF clock - to be overridden by boards that provide it */
 174         scif_clk: scif {
 175                 compatible = "fixed-clock";
 176                 #clock-cells = <0>;
 177                 clock-frequency = <0>;
 178         };
 179
 180         /* External PCIe clock - can be overridden by the board */
 181         pcie_bus_clk: pcie_bus {
 182                 compatible = "fixed-clock";
 183                 #clock-cells = <0>;
 184                 clock-frequency = <0>;
 185         };
 186
 187         soc: soc {
 188                 compatible = "simple-bus";
 189                 interrupt-parent = <&gic>;
 190
 191                 #address-cells = <2>;
 192                 #size-cells = <2>;
 193                 ranges;
 194                 u-boot,dm-pre-reloc;
 195
 196                 gic: interrupt-controller@f1010000 {
 197                         compatible = "arm,gic-400";
 198                         #interrupt-cells = <3>;
 199                         #address-cells = <0>;
 200                         interrupt-controller;
 201                         reg = <0x0 0xf1010000 0 0x1000>,
 202                               <0x0 0xf1020000 0 0x20000>,
 203                               <0x0 0xf1040000 0 0x20000>,
 204                               <0x0 0xf1060000 0 0x20000>;
 205                         interrupts = <GIC_PPI 9
 206                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 207                         clocks = <&cpg CPG_MOD 408>;
 208                         clock-names = "clk";
 209                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 210                         resets = <&cpg 408>;
 211                 };
 212
 213                 wdt0: watchdog@e6020000 {
 214                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 215                         reg = <0 0xe6020000 0 0x0c>;
 216                         clocks = <&cpg CPG_MOD 402>;
 217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 218                         resets = <&cpg 402>;
 219                         status = "disabled";
 220                 };
 221
 222                 gpio0: gpio@e6050000 {
 223                         compatible = "renesas,gpio-r8a7795",
 224                                      "renesas,gpio-rcar";
 225                         reg = <0 0xe6050000 0 0x50>;
 226                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 227                         #gpio-cells = <2>;
 228                         gpio-controller;
 229                         gpio-ranges = <&pfc 0 0 16>;
 230                         #interrupt-cells = <2>;
 231                         interrupt-controller;
 232                         clocks = <&cpg CPG_MOD 912>;
 233                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 234                         resets = <&cpg 912>;
 235                 };
 236
 237                 gpio1: gpio@e6051000 {
 238                         compatible = "renesas,gpio-r8a7795",
 239                                      "renesas,gpio-rcar";
 240                         reg = <0 0xe6051000 0 0x50>;
 241                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 242                         #gpio-cells = <2>;
 243                         gpio-controller;
 244                         gpio-ranges = <&pfc 0 32 28>;
 245                         #interrupt-cells = <2>;
 246                         interrupt-controller;
 247                         clocks = <&cpg CPG_MOD 911>;
 248                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 249                         resets = <&cpg 911>;
 250                 };
 251
 252                 gpio2: gpio@e6052000 {
 253                         compatible = "renesas,gpio-r8a7795",
 254                                      "renesas,gpio-rcar";
 255                         reg = <0 0xe6052000 0 0x50>;
 256                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 257                         #gpio-cells = <2>;
 258                         gpio-controller;
 259                         gpio-ranges = <&pfc 0 64 15>;
 260                         #interrupt-cells = <2>;
 261                         interrupt-controller;
 262                         clocks = <&cpg CPG_MOD 910>;
 263                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 264                         resets = <&cpg 910>;
 265                 };
 266
 267                 gpio3: gpio@e6053000 {
 268                         compatible = "renesas,gpio-r8a7795",
 269                                      "renesas,gpio-rcar";
 270                         reg = <0 0xe6053000 0 0x50>;
 271                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 272                         #gpio-cells = <2>;
 273                         gpio-controller;
 274                         gpio-ranges = <&pfc 0 96 16>;
 275                         #interrupt-cells = <2>;
 276                         interrupt-controller;
 277                         clocks = <&cpg CPG_MOD 909>;
 278                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 279                         resets = <&cpg 909>;
 280                 };
 281
 282                 gpio4: gpio@e6054000 {
 283                         compatible = "renesas,gpio-r8a7795",
 284                                      "renesas,gpio-rcar";
 285                         reg = <0 0xe6054000 0 0x50>;
 286                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 287                         #gpio-cells = <2>;
 288                         gpio-controller;
 289                         gpio-ranges = <&pfc 0 128 18>;
 290                         #interrupt-cells = <2>;
 291                         interrupt-controller;
 292                         clocks = <&cpg CPG_MOD 908>;
 293                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 294                         resets = <&cpg 908>;
 295                 };
 296
 297                 gpio5: gpio@e6055000 {
 298                         compatible = "renesas,gpio-r8a7795",
 299                                      "renesas,gpio-rcar";
 300                         reg = <0 0xe6055000 0 0x50>;
 301                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 302                         #gpio-cells = <2>;
 303                         gpio-controller;
 304                         gpio-ranges = <&pfc 0 160 26>;
 305                         #interrupt-cells = <2>;
 306                         interrupt-controller;
 307                         clocks = <&cpg CPG_MOD 907>;
 308                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 309                         resets = <&cpg 907>;
 310                 };
 311
 312                 gpio6: gpio@e6055400 {
 313                         compatible = "renesas,gpio-r8a7795",
 314                                      "renesas,gpio-rcar";
 315                         reg = <0 0xe6055400 0 0x50>;
 316                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 317                         #gpio-cells = <2>;
 318                         gpio-controller;
 319                         gpio-ranges = <&pfc 0 192 32>;
 320                         #interrupt-cells = <2>;
 321                         interrupt-controller;
 322                         clocks = <&cpg CPG_MOD 906>;
 323                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 324                         resets = <&cpg 906>;
 325                 };
 326
 327                 gpio7: gpio@e6055800 {
 328                         compatible = "renesas,gpio-r8a7795",
 329                                      "renesas,gpio-rcar";
 330                         reg = <0 0xe6055800 0 0x50>;
 331                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 332                         #gpio-cells = <2>;
 333                         gpio-controller;
 334                         gpio-ranges = <&pfc 0 224 4>;
 335                         #interrupt-cells = <2>;
 336                         interrupt-controller;
 337                         clocks = <&cpg CPG_MOD 905>;
 338                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 339                         resets = <&cpg 905>;
 340                 };
 341
 342                 pmu_a57 {
 343                         compatible = "arm,cortex-a57-pmu";
 344                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 348                         interrupt-affinity = <&a57_0>,
 349                                              <&a57_1>,
 350                                              <&a57_2>,
 351                                              <&a57_3>;
 352                 };
 353
 354                 pmu_a53 {
 355                         compatible = "arm,cortex-a53-pmu";
 356                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 358                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 359                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 360                         interrupt-affinity = <&a53_0>,
 361                                              <&a53_1>,
 362                                              <&a53_2>,
 363                                              <&a53_3>;
 364                 };
 365
 366                 timer {
 367                         compatible = "arm,armv8-timer";
 368                         interrupts = <GIC_PPI 13
 369                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 370                                      <GIC_PPI 14
 371                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 372                                      <GIC_PPI 11
 373                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 374                                      <GIC_PPI 10
 375                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 376                 };
 377
 378                 cpg: clock-controller@e6150000 {
 379                         compatible = "renesas,r8a7795-cpg-mssr";
 380                         reg = <0 0xe6150000 0 0x1000>;
 381                         clocks = <&extal_clk>, <&extalr_clk>;
 382                         clock-names = "extal", "extalr";
 383                         #clock-cells = <2>;
 384                         #power-domain-cells = <0>;
 385                         #reset-cells = <1>;
 386                         u-boot,dm-pre-reloc;
 387                 };
 388
 389                 rst: reset-controller@e6160000 {
 390                         compatible = "renesas,r8a7795-rst";
 391                         reg = <0 0xe6160000 0 0x0200>;
 392                 };
 393
 394                 prr: chipid@fff00044 {
 395                         compatible = "renesas,prr";
 396                         reg = <0 0xfff00044 0 4>;
 397                         u-boot,dm-pre-reloc;
 398                 };
 399
 400                 sysc: system-controller@e6180000 {
 401                         compatible = "renesas,r8a7795-sysc";
 402                         reg = <0 0xe6180000 0 0x0400>;
 403                         #power-domain-cells = <1>;
 404                 };
 405
 406                 pfc: pin-controller@e6060000 {
 407                         compatible = "renesas,pfc-r8a7795";
 408                         reg = <0 0xe6060000 0 0x50c>;
 409                 };
 410
 411                 intc_ex: interrupt-controller@e61c0000 {
 412                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 413                         #interrupt-cells = <2>;
 414                         interrupt-controller;
 415                         reg = <0 0xe61c0000 0 0x200>;
 416                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 417                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 418                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 422                         clocks = <&cpg CPG_MOD 407>;
 423                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 424                         resets = <&cpg 407>;
 425                 };
 426
 427                 dmac0: dma-controller@e6700000 {
 428                         compatible = "renesas,dmac-r8a7795",
 429                                      "renesas,rcar-dmac";
 430                         reg = <0 0xe6700000 0 0x10000>;
 431                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 443                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 444                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 445                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 448                         interrupt-names = "error",
 449                                         "ch0", "ch1", "ch2", "ch3",
 450                                         "ch4", "ch5", "ch6", "ch7",
 451                                         "ch8", "ch9", "ch10", "ch11",
 452                                         "ch12", "ch13", "ch14", "ch15";
 453                         clocks = <&cpg CPG_MOD 219>;
 454                         clock-names = "fck";
 455                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 456                         resets = <&cpg 219>;
 457                         #dma-cells = <1>;
 458                         dma-channels = <16>;
 459                 };
 460
 461                 dmac1: dma-controller@e7300000 {
 462                         compatible = "renesas,dmac-r8a7795",
 463                                      "renesas,rcar-dmac";
 464                         reg = <0 0xe7300000 0 0x10000>;
 465                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 476                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 477                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 478                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 479                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 480                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 481                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 482                         interrupt-names = "error",
 483                                         "ch0", "ch1", "ch2", "ch3",
 484                                         "ch4", "ch5", "ch6", "ch7",
 485                                         "ch8", "ch9", "ch10", "ch11",
 486                                         "ch12", "ch13", "ch14", "ch15";
 487                         clocks = <&cpg CPG_MOD 218>;
 488                         clock-names = "fck";
 489                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 490                         resets = <&cpg 218>;
 491                         #dma-cells = <1>;
 492                         dma-channels = <16>;
 493                 };
 494
 495                 dmac2: dma-controller@e7310000 {
 496                         compatible = "renesas,dmac-r8a7795",
 497                                      "renesas,rcar-dmac";
 498                         reg = <0 0xe7310000 0 0x10000>;
 499                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 508                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 509                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 510                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 511                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 512                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 513                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 514                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 515                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 516                         interrupt-names = "error",
 517                                         "ch0", "ch1", "ch2", "ch3",
 518                                         "ch4", "ch5", "ch6", "ch7",
 519                                         "ch8", "ch9", "ch10", "ch11",
 520                                         "ch12", "ch13", "ch14", "ch15";
 521                         clocks = <&cpg CPG_MOD 217>;
 522                         clock-names = "fck";
 523                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 524                         resets = <&cpg 217>;
 525                         #dma-cells = <1>;
 526                         dma-channels = <16>;
 527                 };
 528
 529                 audma0: dma-controller@ec700000 {
 530                         compatible = "renesas,dmac-r8a7795",
 531                                      "renesas,rcar-dmac";
 532                         reg = <0 0xec700000 0 0x10000>;
 533                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 534                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 535                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 536                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 537                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 538                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 540                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 541                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 542                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 543                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 544                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 545                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 546                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 547                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 548                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 549                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 550                         interrupt-names = "error",
 551                                         "ch0", "ch1", "ch2", "ch3",
 552                                         "ch4", "ch5", "ch6", "ch7",
 553                                         "ch8", "ch9", "ch10", "ch11",
 554                                         "ch12", "ch13", "ch14", "ch15";
 555                         clocks = <&cpg CPG_MOD 502>;
 556                         clock-names = "fck";
 557                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 558                         resets = <&cpg 502>;
 559                         #dma-cells = <1>;
 560                         dma-channels = <16>;
 561                 };
 562
 563                 audma1: dma-controller@ec720000 {
 564                         compatible = "renesas,dmac-r8a7795",
 565                                      "renesas,rcar-dmac";
 566                         reg = <0 0xec720000 0 0x10000>;
 567                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 579                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 580                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 581                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 582                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 583                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 584                         interrupt-names = "error",
 585                                         "ch0", "ch1", "ch2", "ch3",
 586                                         "ch4", "ch5", "ch6", "ch7",
 587                                         "ch8", "ch9", "ch10", "ch11",
 588                                         "ch12", "ch13", "ch14", "ch15";
 589                         clocks = <&cpg CPG_MOD 501>;
 590                         clock-names = "fck";
 591                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 592                         resets = <&cpg 501>;
 593                         #dma-cells = <1>;
 594                         dma-channels = <16>;
 595                 };
 596
 597                 avb: ethernet@e6800000 {
 598                         compatible = "renesas,etheravb-r8a7795",
 599                                      "renesas,etheravb-rcar-gen3";
 600                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 601                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 621                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 624                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 625                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 626                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 627                                           "ch4", "ch5", "ch6", "ch7",
 628                                           "ch8", "ch9", "ch10", "ch11",
 629                                           "ch12", "ch13", "ch14", "ch15",
 630                                           "ch16", "ch17", "ch18", "ch19",
 631                                           "ch20", "ch21", "ch22", "ch23",
 632                                           "ch24";
 633                         clocks = <&cpg CPG_MOD 812>;
 634                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 635                         resets = <&cpg 812>;
 636                         phy-mode = "rgmii-txid";
 637                         #address-cells = <1>;
 638                         #size-cells = <0>;
 639                         status = "disabled";
 640                 };
 641
 642                 can0: can@e6c30000 {
 643                         compatible = "renesas,can-r8a7795",
 644                                      "renesas,rcar-gen3-can";
 645                         reg = <0 0xe6c30000 0 0x1000>;
 646                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 916>,
 648                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 649                                <&can_clk>;
 650                         clock-names = "clkp1", "clkp2", "can_clk";
 651                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 652                         assigned-clock-rates = <40000000>;
 653                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 654                         resets = <&cpg 916>;
 655                         status = "disabled";
 656                 };
 657
 658                 can1: can@e6c38000 {
 659                         compatible = "renesas,can-r8a7795",
 660                                      "renesas,rcar-gen3-can";
 661                         reg = <0 0xe6c38000 0 0x1000>;
 662                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 663                         clocks = <&cpg CPG_MOD 915>,
 664                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 665                                <&can_clk>;
 666                         clock-names = "clkp1", "clkp2", "can_clk";
 667                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 668                         assigned-clock-rates = <40000000>;
 669                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 670                         resets = <&cpg 915>;
 671                         status = "disabled";
 672                 };
 673
 674                 canfd: can@e66c0000 {
 675                         compatible = "renesas,r8a7795-canfd",
 676                                      "renesas,rcar-gen3-canfd";
 677                         reg = <0 0xe66c0000 0 0x8000>;
 678                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 679                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 680                         clocks = <&cpg CPG_MOD 914>,
 681                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 682                                <&can_clk>;
 683                         clock-names = "fck", "canfd", "can_clk";
 684                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 685                         assigned-clock-rates = <40000000>;
 686                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 687                         resets = <&cpg 914>;
 688                         status = "disabled";
 689
 690                         channel0 {
 691                                 status = "disabled";
 692                         };
 693
 694                         channel1 {
 695                                 status = "disabled";
 696                         };
 697                 };
 698
 699                 hscif0: serial@e6540000 {
 700                         compatible = "renesas,hscif-r8a7795",
 701                                      "renesas,rcar-gen3-hscif",
 702                                      "renesas,hscif";
 703                         reg = <0 0xe6540000 0 96>;
 704                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 705                         clocks = <&cpg CPG_MOD 520>,
 706                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 707                                  <&scif_clk>;
 708                         clock-names = "fck", "brg_int", "scif_clk";
 709                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 710                         dma-names = "tx", "rx";
 711                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 712                         resets = <&cpg 520>;
 713                         status = "disabled";
 714                 };
 715
 716                 hscif1: serial@e6550000 {
 717                         compatible = "renesas,hscif-r8a7795",
 718                                      "renesas,rcar-gen3-hscif",
 719                                      "renesas,hscif";
 720                         reg = <0 0xe6550000 0 96>;
 721                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 722                         clocks = <&cpg CPG_MOD 519>,
 723                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 724                                  <&scif_clk>;
 725                         clock-names = "fck", "brg_int", "scif_clk";
 726                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 727                         dma-names = "tx", "rx";
 728                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 729                         resets = <&cpg 519>;
 730                         status = "disabled";
 731                 };
 732
 733                 hscif2: serial@e6560000 {
 734                         compatible = "renesas,hscif-r8a7795",
 735                                      "renesas,rcar-gen3-hscif",
 736                                      "renesas,hscif";
 737                         reg = <0 0xe6560000 0 96>;
 738                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 739                         clocks = <&cpg CPG_MOD 518>,
 740                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 741                                  <&scif_clk>;
 742                         clock-names = "fck", "brg_int", "scif_clk";
 743                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 744                         dma-names = "tx", "rx";
 745                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 746                         resets = <&cpg 518>;
 747                         status = "disabled";
 748                 };
 749
 750                 hscif3: serial@e66a0000 {
 751                         compatible = "renesas,hscif-r8a7795",
 752                                      "renesas,rcar-gen3-hscif",
 753                                      "renesas,hscif";
 754                         reg = <0 0xe66a0000 0 96>;
 755                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 756                         clocks = <&cpg CPG_MOD 517>,
 757                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 758                                  <&scif_clk>;
 759                         clock-names = "fck", "brg_int", "scif_clk";
 760                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 761                         dma-names = "tx", "rx";
 762                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 763                         resets = <&cpg 517>;
 764                         status = "disabled";
 765                 };
 766
 767                 hscif4: serial@e66b0000 {
 768                         compatible = "renesas,hscif-r8a7795",
 769                                      "renesas,rcar-gen3-hscif",
 770                                      "renesas,hscif";
 771                         reg = <0 0xe66b0000 0 96>;
 772                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 516>,
 774                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 775                                  <&scif_clk>;
 776                         clock-names = "fck", "brg_int", "scif_clk";
 777                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 778                         dma-names = "tx", "rx";
 779                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 780                         resets = <&cpg 516>;
 781                         status = "disabled";
 782                 };
 783
 784                 scif0: serial@e6e60000 {
 785                         compatible = "renesas,scif-r8a7795",
 786                                      "renesas,rcar-gen3-scif", "renesas,scif";
 787                         reg = <0 0xe6e60000 0 64>;
 788                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 789                         clocks = <&cpg CPG_MOD 207>,
 790                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 791                                  <&scif_clk>;
 792                         clock-names = "fck", "brg_int", "scif_clk";
 793                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 794                         dma-names = "tx", "rx";
 795                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 796                         resets = <&cpg 207>;
 797                         status = "disabled";
 798                 };
 799
 800                 scif1: serial@e6e68000 {
 801                         compatible = "renesas,scif-r8a7795",
 802                                      "renesas,rcar-gen3-scif", "renesas,scif";
 803                         reg = <0 0xe6e68000 0 64>;
 804                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 805                         clocks = <&cpg CPG_MOD 206>,
 806                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 807                                  <&scif_clk>;
 808                         clock-names = "fck", "brg_int", "scif_clk";
 809                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 810                         dma-names = "tx", "rx";
 811                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 812                         resets = <&cpg 206>;
 813                         status = "disabled";
 814                 };
 815
 816                 scif2: serial@e6e88000 {
 817                         compatible = "renesas,scif-r8a7795",
 818                                      "renesas,rcar-gen3-scif", "renesas,scif";
 819                         reg = <0 0xe6e88000 0 64>;
 820                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&cpg CPG_MOD 310>,
 822                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 823                                  <&scif_clk>;
 824                         clock-names = "fck", "brg_int", "scif_clk";
 825                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 826                         dma-names = "tx", "rx";
 827                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 828                         resets = <&cpg 310>;
 829                         status = "disabled";
 830                 };
 831
 832                 scif3: serial@e6c50000 {
 833                         compatible = "renesas,scif-r8a7795",
 834                                      "renesas,rcar-gen3-scif", "renesas,scif";
 835                         reg = <0 0xe6c50000 0 64>;
 836                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 837                         clocks = <&cpg CPG_MOD 204>,
 838                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 839                                  <&scif_clk>;
 840                         clock-names = "fck", "brg_int", "scif_clk";
 841                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 842                         dma-names = "tx", "rx";
 843                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 844                         resets = <&cpg 204>;
 845                         status = "disabled";
 846                 };
 847
 848                 scif4: serial@e6c40000 {
 849                         compatible = "renesas,scif-r8a7795",
 850                                      "renesas,rcar-gen3-scif", "renesas,scif";
 851                         reg = <0 0xe6c40000 0 64>;
 852                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 853                         clocks = <&cpg CPG_MOD 203>,
 854                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 855                                  <&scif_clk>;
 856                         clock-names = "fck", "brg_int", "scif_clk";
 857                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 858                         dma-names = "tx", "rx";
 859                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 860                         resets = <&cpg 203>;
 861                         status = "disabled";
 862                 };
 863
 864                 scif5: serial@e6f30000 {
 865                         compatible = "renesas,scif-r8a7795",
 866                                      "renesas,rcar-gen3-scif", "renesas,scif";
 867                         reg = <0 0xe6f30000 0 64>;
 868                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 869                         clocks = <&cpg CPG_MOD 202>,
 870                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 871                                  <&scif_clk>;
 872                         clock-names = "fck", "brg_int", "scif_clk";
 873                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 874                         dma-names = "tx", "rx";
 875                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 876                         resets = <&cpg 202>;
 877                         status = "disabled";
 878                 };
 879
 880                 i2c_dvfs: i2c@e60b0000 {
 881                         #address-cells = <1>;
 882                         #size-cells = <0>;
 883                         compatible = "renesas,iic-r8a7795",
 884                                      "renesas,rcar-gen3-iic",
 885                                      "renesas,rmobile-iic";
 886                         reg = <0 0xe60b0000 0 0x425>;
 887                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 888                         clocks = <&cpg CPG_MOD 926>;
 889                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 890                         resets = <&cpg 926>;
 891                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 892                         dma-names = "tx", "rx";
 893                         status = "disabled";
 894                 };
 895
 896                 i2c0: i2c@e6500000 {
 897                         #address-cells = <1>;
 898                         #size-cells = <0>;
 899                         compatible = "renesas,i2c-r8a7795",
 900                                      "renesas,rcar-gen3-i2c";
 901                         reg = <0 0xe6500000 0 0x40>;
 902                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 903                         clocks = <&cpg CPG_MOD 931>;
 904                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 905                         resets = <&cpg 931>;
 906                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 907                         dma-names = "tx", "rx";
 908                         i2c-scl-internal-delay-ns = <110>;
 909                         status = "disabled";
 910                 };
 911
 912                 i2c1: i2c@e6508000 {
 913                         #address-cells = <1>;
 914                         #size-cells = <0>;
 915                         compatible = "renesas,i2c-r8a7795",
 916                                      "renesas,rcar-gen3-i2c";
 917                         reg = <0 0xe6508000 0 0x40>;
 918                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 919                         clocks = <&cpg CPG_MOD 930>;
 920                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 921                         resets = <&cpg 930>;
 922                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 923                         dma-names = "tx", "rx";
 924                         i2c-scl-internal-delay-ns = <6>;
 925                         status = "disabled";
 926                 };
 927
 928                 i2c2: i2c@e6510000 {
 929                         #address-cells = <1>;
 930                         #size-cells = <0>;
 931                         compatible = "renesas,i2c-r8a7795",
 932                                      "renesas,rcar-gen3-i2c";
 933                         reg = <0 0xe6510000 0 0x40>;
 934                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 935                         clocks = <&cpg CPG_MOD 929>;
 936                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 937                         resets = <&cpg 929>;
 938                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 939                         dma-names = "tx", "rx";
 940                         i2c-scl-internal-delay-ns = <6>;
 941                         status = "disabled";
 942                 };
 943
 944                 i2c3: i2c@e66d0000 {
 945                         #address-cells = <1>;
 946                         #size-cells = <0>;
 947                         compatible = "renesas,i2c-r8a7795",
 948                                      "renesas,rcar-gen3-i2c";
 949                         reg = <0 0xe66d0000 0 0x40>;
 950                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 951                         clocks = <&cpg CPG_MOD 928>;
 952                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 953                         resets = <&cpg 928>;
 954                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 955                         dma-names = "tx", "rx";
 956                         i2c-scl-internal-delay-ns = <110>;
 957                         status = "disabled";
 958                 };
 959
 960                 i2c4: i2c@e66d8000 {
 961                         #address-cells = <1>;
 962                         #size-cells = <0>;
 963                         compatible = "renesas,i2c-r8a7795",
 964                                      "renesas,rcar-gen3-i2c";
 965                         reg = <0 0xe66d8000 0 0x40>;
 966                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 967                         clocks = <&cpg CPG_MOD 927>;
 968                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 969                         resets = <&cpg 927>;
 970                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 971                         dma-names = "tx", "rx";
 972                         i2c-scl-internal-delay-ns = <110>;
 973                         status = "disabled";
 974                 };
 975
 976                 i2c5: i2c@e66e0000 {
 977                         #address-cells = <1>;
 978                         #size-cells = <0>;
 979                         compatible = "renesas,i2c-r8a7795",
 980                                      "renesas,rcar-gen3-i2c";
 981                         reg = <0 0xe66e0000 0 0x40>;
 982                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 983                         clocks = <&cpg CPG_MOD 919>;
 984                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 985                         resets = <&cpg 919>;
 986                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 987                         dma-names = "tx", "rx";
 988                         i2c-scl-internal-delay-ns = <110>;
 989                         status = "disabled";
 990                 };
 991
 992                 i2c6: i2c@e66e8000 {
 993                         #address-cells = <1>;
 994                         #size-cells = <0>;
 995                         compatible = "renesas,i2c-r8a7795",
 996                                      "renesas,rcar-gen3-i2c";
 997                         reg = <0 0xe66e8000 0 0x40>;
 998                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 999                         clocks = <&cpg CPG_MOD 918>;
1000                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1001                         resets = <&cpg 918>;
1002                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1003                         dma-names = "tx", "rx";
1004                         i2c-scl-internal-delay-ns = <6>;
1005                         status = "disabled";
1006                 };
1007
1008                 pwm0: pwm@e6e30000 {
1009                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1010                         reg = <0 0xe6e30000 0 0x8>;
1011                         clocks = <&cpg CPG_MOD 523>;
1012                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1013                         resets = <&cpg 523>;
1014                         #pwm-cells = <2>;
1015                         status = "disabled";
1016                 };
1017
1018                 pwm1: pwm@e6e31000 {
1019                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1020                         reg = <0 0xe6e31000 0 0x8>;
1021                         clocks = <&cpg CPG_MOD 523>;
1022                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1023                         resets = <&cpg 523>;
1024                         #pwm-cells = <2>;
1025                         status = "disabled";
1026                 };
1027
1028                 pwm2: pwm@e6e32000 {
1029                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1030                         reg = <0 0xe6e32000 0 0x8>;
1031                         clocks = <&cpg CPG_MOD 523>;
1032                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1033                         resets = <&cpg 523>;
1034                         #pwm-cells = <2>;
1035                         status = "disabled";
1036                 };
1037
1038                 pwm3: pwm@e6e33000 {
1039                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1040                         reg = <0 0xe6e33000 0 0x8>;
1041                         clocks = <&cpg CPG_MOD 523>;
1042                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1043                         resets = <&cpg 523>;
1044                         #pwm-cells = <2>;
1045                         status = "disabled";
1046                 };
1047
1048                 pwm4: pwm@e6e34000 {
1049                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1050                         reg = <0 0xe6e34000 0 0x8>;
1051                         clocks = <&cpg CPG_MOD 523>;
1052                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1053                         resets = <&cpg 523>;
1054                         #pwm-cells = <2>;
1055                         status = "disabled";
1056                 };
1057
1058                 pwm5: pwm@e6e35000 {
1059                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1060                         reg = <0 0xe6e35000 0 0x8>;
1061                         clocks = <&cpg CPG_MOD 523>;
1062                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1063                         resets = <&cpg 523>;
1064                         #pwm-cells = <2>;
1065                         status = "disabled";
1066                 };
1067
1068                 pwm6: pwm@e6e36000 {
1069                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1070                         reg = <0 0xe6e36000 0 0x8>;
1071                         clocks = <&cpg CPG_MOD 523>;
1072                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1073                         resets = <&cpg 523>;
1074                         #pwm-cells = <2>;
1075                         status = "disabled";
1076                 };
1077
1078                 rcar_sound: sound@ec500000 {
1079                         /*
1080                          * #sound-dai-cells is required
1081                          *
1082                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1083                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1084                          */
1085                         /*
1086                          * #clock-cells is required for audio_clkout0/1/2/3
1087                          *
1088                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1089                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1090                          */
1091                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1092                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1093                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1094                                 <0 0xec540000 0 0x1000>, /* SSIU */
1095                                 <0 0xec541000 0 0x280>,  /* SSI */
1096                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1097                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1098
1099                         clocks = <&cpg CPG_MOD 1005>,
1100                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1101                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1102                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1103                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1104                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1105                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1106                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1107                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1108                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1109                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1110                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1111                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1112                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1113                                  <&audio_clk_a>, <&audio_clk_b>,
1114                                  <&audio_clk_c>,
1115                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1116                         clock-names = "ssi-all",
1117                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1118                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1119                                       "ssi.1", "ssi.0",
1120                                       "src.9", "src.8", "src.7", "src.6",
1121                                       "src.5", "src.4", "src.3", "src.2",
1122                                       "src.1", "src.0",
1123                                       "mix.1", "mix.0",
1124                                       "ctu.1", "ctu.0",
1125                                       "dvc.0", "dvc.1",
1126                                       "clk_a", "clk_b", "clk_c", "clk_i";
1127                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1128                         resets = <&cpg 1005>,
1129                                  <&cpg 1006>, <&cpg 1007>,
1130                                  <&cpg 1008>, <&cpg 1009>,
1131                                  <&cpg 1010>, <&cpg 1011>,
1132                                  <&cpg 1012>, <&cpg 1013>,
1133                                  <&cpg 1014>, <&cpg 1015>;
1134                         reset-names = "ssi-all",
1135                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1136                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1137                                       "ssi.1", "ssi.0";
1138                         status = "disabled";
1139
1140                         rcar_sound,dvc {
1141                                 dvc0: dvc-0 {
1142                                         dmas = <&audma1 0xbc>;
1143                                         dma-names = "tx";
1144                                 };
1145                                 dvc1: dvc-1 {
1146                                         dmas = <&audma1 0xbe>;
1147                                         dma-names = "tx";
1148                                 };
1149                         };
1150
1151                         rcar_sound,mix {
1152                                 mix0: mix-0 { };
1153                                 mix1: mix-1 { };
1154                         };
1155
1156                         rcar_sound,ctu {
1157                                 ctu00: ctu-0 { };
1158                                 ctu01: ctu-1 { };
1159                                 ctu02: ctu-2 { };
1160                                 ctu03: ctu-3 { };
1161                                 ctu10: ctu-4 { };
1162                                 ctu11: ctu-5 { };
1163                                 ctu12: ctu-6 { };
1164                                 ctu13: ctu-7 { };
1165                         };
1166
1167                         rcar_sound,src {
1168                                 src0: src-0 {
1169                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1170                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1171                                         dma-names = "rx", "tx";
1172                                 };
1173                                 src1: src-1 {
1174                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1175                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1176                                         dma-names = "rx", "tx";
1177                                 };
1178                                 src2: src-2 {
1179                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1180                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1181                                         dma-names = "rx", "tx";
1182                                 };
1183                                 src3: src-3 {
1184                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1185                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1186                                         dma-names = "rx", "tx";
1187                                 };
1188                                 src4: src-4 {
1189                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1190                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1191                                         dma-names = "rx", "tx";
1192                                 };
1193                                 src5: src-5 {
1194                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1195                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1196                                         dma-names = "rx", "tx";
1197                                 };
1198                                 src6: src-6 {
1199                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1200                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1201                                         dma-names = "rx", "tx";
1202                                 };
1203                                 src7: src-7 {
1204                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1205                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1206                                         dma-names = "rx", "tx";
1207                                 };
1208                                 src8: src-8 {
1209                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1210                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1211                                         dma-names = "rx", "tx";
1212                                 };
1213                                 src9: src-9 {
1214                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1215                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1216                                         dma-names = "rx", "tx";
1217                                 };
1218                         };
1219
1220                         rcar_sound,ssi {
1221                                 ssi0: ssi-0 {
1222                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1223                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1224                                         dma-names = "rx", "tx", "rxu", "txu";
1225                                 };
1226                                 ssi1: ssi-1 {
1227                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1228                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1229                                         dma-names = "rx", "tx", "rxu", "txu";
1230                                 };
1231                                 ssi2: ssi-2 {
1232                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1233                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1234                                         dma-names = "rx", "tx", "rxu", "txu";
1235                                 };
1236                                 ssi3: ssi-3 {
1237                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1238                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1239                                         dma-names = "rx", "tx", "rxu", "txu";
1240                                 };
1241                                 ssi4: ssi-4 {
1242                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1243                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1244                                         dma-names = "rx", "tx", "rxu", "txu";
1245                                 };
1246                                 ssi5: ssi-5 {
1247                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1248                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1249                                         dma-names = "rx", "tx", "rxu", "txu";
1250                                 };
1251                                 ssi6: ssi-6 {
1252                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1253                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1254                                         dma-names = "rx", "tx", "rxu", "txu";
1255                                 };
1256                                 ssi7: ssi-7 {
1257                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1258                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1259                                         dma-names = "rx", "tx", "rxu", "txu";
1260                                 };
1261                                 ssi8: ssi-8 {
1262                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1263                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1264                                         dma-names = "rx", "tx", "rxu", "txu";
1265                                 };
1266                                 ssi9: ssi-9 {
1267                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1268                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1269                                         dma-names = "rx", "tx", "rxu", "txu";
1270                                 };
1271                         };
1272                 };
1273
1274                 sata: sata@ee300000 {
1275                         compatible = "renesas,sata-r8a7795";
1276                         reg = <0 0xee300000 0 0x200000>;
1277                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1278                         clocks = <&cpg CPG_MOD 815>;
1279                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1280                         resets = <&cpg 815>;
1281                         status = "disabled";
1282                 };
1283
1284                 xhci0: usb@ee000000 {
1285                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1286                         reg = <0 0xee000000 0 0xc00>;
1287                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1288                         clocks = <&cpg CPG_MOD 328>;
1289                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1290                         resets = <&cpg 328>;
1291                         status = "disabled";
1292                 };
1293
1294                 usb_dmac0: dma-controller@e65a0000 {
1295                         compatible = "renesas,r8a7795-usb-dmac",
1296                                      "renesas,usb-dmac";
1297                         reg = <0 0xe65a0000 0 0x100>;
1298                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1299                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1300                         interrupt-names = "ch0", "ch1";
1301                         clocks = <&cpg CPG_MOD 330>;
1302                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1303                         resets = <&cpg 330>;
1304                         #dma-cells = <1>;
1305                         dma-channels = <2>;
1306                 };
1307
1308                 usb_dmac1: dma-controller@e65b0000 {
1309                         compatible = "renesas,r8a7795-usb-dmac",
1310                                      "renesas,usb-dmac";
1311                         reg = <0 0xe65b0000 0 0x100>;
1312                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1313                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1314                         interrupt-names = "ch0", "ch1";
1315                         clocks = <&cpg CPG_MOD 331>;
1316                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1317                         resets = <&cpg 331>;
1318                         #dma-cells = <1>;
1319                         dma-channels = <2>;
1320                 };
1321
1322                 sdhi0: sd@ee100000 {
1323                         compatible = "renesas,sdhi-r8a7795";
1324                         reg = <0 0xee100000 0 0x2000>;
1325                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1326                         clocks = <&cpg CPG_MOD 314>;
1327                         max-frequency = <200000000>;
1328                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1329                         resets = <&cpg 314>;
1330                         status = "disabled";
1331                 };
1332
1333                 sdhi1: sd@ee120000 {
1334                         compatible = "renesas,sdhi-r8a7795";
1335                         reg = <0 0xee120000 0 0x2000>;
1336                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1337                         clocks = <&cpg CPG_MOD 313>;
1338                         max-frequency = <200000000>;
1339                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1340                         resets = <&cpg 313>;
1341                         status = "disabled";
1342                 };
1343
1344                 sdhi2: sd@ee140000 {
1345                         compatible = "renesas,sdhi-r8a7795";
1346                         reg = <0 0xee140000 0 0x2000>;
1347                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1348                         clocks = <&cpg CPG_MOD 312>;
1349                         max-frequency = <200000000>;
1350                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1351                         resets = <&cpg 312>;
1352                         status = "disabled";
1353                 };
1354
1355                 sdhi3: sd@ee160000 {
1356                         compatible = "renesas,sdhi-r8a7795";
1357                         reg = <0 0xee160000 0 0x2000>;
1358                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1359                         clocks = <&cpg CPG_MOD 311>;
1360                         max-frequency = <200000000>;
1361                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1362                         resets = <&cpg 311>;
1363                         status = "disabled";
1364                 };
1365
1366                 usb2_phy0: usb-phy@ee080200 {
1367                         compatible = "renesas,usb2-phy-r8a7795",
1368                                      "renesas,rcar-gen3-usb2-phy";
1369                         reg = <0 0xee080200 0 0x700>;
1370                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1371                         clocks = <&cpg CPG_MOD 703>;
1372                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1373                         resets = <&cpg 703>;
1374                         #phy-cells = <0>;
1375                         status = "disabled";
1376                 };
1377
1378                 usb2_phy1: usb-phy@ee0a0200 {
1379                         compatible = "renesas,usb2-phy-r8a7795",
1380                                      "renesas,rcar-gen3-usb2-phy";
1381                         reg = <0 0xee0a0200 0 0x700>;
1382                         clocks = <&cpg CPG_MOD 702>;
1383                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1384                         resets = <&cpg 702>;
1385                         #phy-cells = <0>;
1386                         status = "disabled";
1387                 };
1388
1389                 usb2_phy2: usb-phy@ee0c0200 {
1390                         compatible = "renesas,usb2-phy-r8a7795",
1391                                      "renesas,rcar-gen3-usb2-phy";
1392                         reg = <0 0xee0c0200 0 0x700>;
1393                         clocks = <&cpg CPG_MOD 701>;
1394                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1395                         resets = <&cpg 701>;
1396                         #phy-cells = <0>;
1397                         status = "disabled";
1398                 };
1399
1400                 ehci0: usb@ee080100 {
1401                         compatible = "generic-ehci";
1402                         reg = <0 0xee080100 0 0x100>;
1403                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1404                         clocks = <&cpg CPG_MOD 703>;
1405                         phys = <&usb2_phy0>;
1406                         phy-names = "usb";
1407                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1408                         resets = <&cpg 703>;
1409                         status = "disabled";
1410                 };
1411
1412                 ehci1: usb@ee0a0100 {
1413                         compatible = "generic-ehci";
1414                         reg = <0 0xee0a0100 0 0x100>;
1415                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1416                         clocks = <&cpg CPG_MOD 702>;
1417                         phys = <&usb2_phy1>;
1418                         phy-names = "usb";
1419                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1420                         resets = <&cpg 702>;
1421                         status = "disabled";
1422                 };
1423
1424                 ehci2: usb@ee0c0100 {
1425                         compatible = "generic-ehci";
1426                         reg = <0 0xee0c0100 0 0x100>;
1427                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1428                         clocks = <&cpg CPG_MOD 701>;
1429                         phys = <&usb2_phy2>;
1430                         phy-names = "usb";
1431                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1432                         resets = <&cpg 701>;
1433                         status = "disabled";
1434                 };
1435
1436                 ohci0: usb@ee080000 {
1437                         compatible = "generic-ohci";
1438                         reg = <0 0xee080000 0 0x100>;
1439                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1440                         clocks = <&cpg CPG_MOD 703>;
1441                         phys = <&usb2_phy0>;
1442                         phy-names = "usb";
1443                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1444                         resets = <&cpg 703>;
1445                         status = "disabled";
1446                 };
1447
1448                 ohci1: usb@ee0a0000 {
1449                         compatible = "generic-ohci";
1450                         reg = <0 0xee0a0000 0 0x100>;
1451                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1452                         clocks = <&cpg CPG_MOD 702>;
1453                         phys = <&usb2_phy1>;
1454                         phy-names = "usb";
1455                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1456                         resets = <&cpg 702>;
1457                         status = "disabled";
1458                 };
1459
1460                 ohci2: usb@ee0c0000 {
1461                         compatible = "generic-ohci";
1462                         reg = <0 0xee0c0000 0 0x100>;
1463                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1464                         clocks = <&cpg CPG_MOD 701>;
1465                         phys = <&usb2_phy2>;
1466                         phy-names = "usb";
1467                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1468                         resets = <&cpg 701>;
1469                         status = "disabled";
1470                 };
1471
1472                 hsusb: usb@e6590000 {
1473                         compatible = "renesas,usbhs-r8a7795",
1474                                      "renesas,rcar-gen3-usbhs";
1475                         reg = <0 0xe6590000 0 0x100>;
1476                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1477                         clocks = <&cpg CPG_MOD 704>;
1478                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1479                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1480                         dma-names = "ch0", "ch1", "ch2", "ch3";
1481                         renesas,buswait = <11>;
1482                         phys = <&usb2_phy0>;
1483                         phy-names = "usb";
1484                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1485                         resets = <&cpg 704>;
1486                         status = "disabled";
1487                 };
1488
1489                 pciec0: pcie@fe000000 {
1490                         compatible = "renesas,pcie-r8a7795",
1491                                      "renesas,pcie-rcar-gen3";
1492                         reg = <0 0xfe000000 0 0x80000>;
1493                         #address-cells = <3>;
1494                         #size-cells = <2>;
1495                         bus-range = <0x00 0xff>;
1496                         device_type = "pci";
1497                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1498                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1499                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1500                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1501                         /* Map all possible DDR as inbound ranges */
1502                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1503                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1504                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1505                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1506                         #interrupt-cells = <1>;
1507                         interrupt-map-mask = <0 0 0 0>;
1508                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1509                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1510                         clock-names = "pcie", "pcie_bus";
1511                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1512                         resets = <&cpg 319>;
1513                         status = "disabled";
1514                 };
1515
1516                 pciec1: pcie@ee800000 {
1517                         compatible = "renesas,pcie-r8a7795",
1518                                      "renesas,pcie-rcar-gen3";
1519                         reg = <0 0xee800000 0 0x80000>;
1520                         #address-cells = <3>;
1521                         #size-cells = <2>;
1522                         bus-range = <0x00 0xff>;
1523                         device_type = "pci";
1524                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1525                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1526                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1527                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1528                         /* Map all possible DDR as inbound ranges */
1529                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1530                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1531                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1532                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1533                         #interrupt-cells = <1>;
1534                         interrupt-map-mask = <0 0 0 0>;
1535                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1536                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1537                         clock-names = "pcie", "pcie_bus";
1538                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1539                         resets = <&cpg 318>;
1540                         status = "disabled";
1541                 };
1542
1543                 vspbc: vsp@fe920000 {
1544                         compatible = "renesas,vsp2";
1545                         reg = <0 0xfe920000 0 0x8000>;
1546                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1547                         clocks = <&cpg CPG_MOD 624>;
1548                         power-domains = <&sysc R8A7795_PD_A3VP>;
1549                         resets = <&cpg 624>;
1550
1551                         renesas,fcp = <&fcpvb1>;
1552                 };
1553
1554                 fcpvb1: fcp@fe92f000 {
1555                         compatible = "renesas,fcpv";
1556                         reg = <0 0xfe92f000 0 0x200>;
1557                         clocks = <&cpg CPG_MOD 606>;
1558                         power-domains = <&sysc R8A7795_PD_A3VP>;
1559                         resets = <&cpg 606>;
1560                 };
1561
1562                 fcpf0: fcp@fe950000 {
1563                         compatible = "renesas,fcpf";
1564                         reg = <0 0xfe950000 0 0x200>;
1565                         clocks = <&cpg CPG_MOD 615>;
1566                         power-domains = <&sysc R8A7795_PD_A3VP>;
1567                         resets = <&cpg 615>;
1568                 };
1569
1570                 fcpf1: fcp@fe951000 {
1571                         compatible = "renesas,fcpf";
1572                         reg = <0 0xfe951000 0 0x200>;
1573                         clocks = <&cpg CPG_MOD 614>;
1574                         power-domains = <&sysc R8A7795_PD_A3VP>;
1575                         resets = <&cpg 614>;
1576                 };
1577
1578                 vspbd: vsp@fe960000 {
1579                         compatible = "renesas,vsp2";
1580                         reg = <0 0xfe960000 0 0x8000>;
1581                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1582                         clocks = <&cpg CPG_MOD 626>;
1583                         power-domains = <&sysc R8A7795_PD_A3VP>;
1584                         resets = <&cpg 626>;
1585
1586                         renesas,fcp = <&fcpvb0>;
1587                 };
1588
1589                 fcpvb0: fcp@fe96f000 {
1590                         compatible = "renesas,fcpv";
1591                         reg = <0 0xfe96f000 0 0x200>;
1592                         clocks = <&cpg CPG_MOD 607>;
1593                         power-domains = <&sysc R8A7795_PD_A3VP>;
1594                         resets = <&cpg 607>;
1595                 };
1596
1597                 vspi0: vsp@fe9a0000 {
1598                         compatible = "renesas,vsp2";
1599                         reg = <0 0xfe9a0000 0 0x8000>;
1600                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1601                         clocks = <&cpg CPG_MOD 631>;
1602                         power-domains = <&sysc R8A7795_PD_A3VP>;
1603                         resets = <&cpg 631>;
1604
1605                         renesas,fcp = <&fcpvi0>;
1606                 };
1607
1608                 fcpvi0: fcp@fe9af000 {
1609                         compatible = "renesas,fcpv";
1610                         reg = <0 0xfe9af000 0 0x200>;
1611                         clocks = <&cpg CPG_MOD 611>;
1612                         power-domains = <&sysc R8A7795_PD_A3VP>;
1613                         resets = <&cpg 611>;
1614                 };
1615
1616                 vspi1: vsp@fe9b0000 {
1617                         compatible = "renesas,vsp2";
1618                         reg = <0 0xfe9b0000 0 0x8000>;
1619                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1620                         clocks = <&cpg CPG_MOD 630>;
1621                         power-domains = <&sysc R8A7795_PD_A3VP>;
1622                         resets = <&cpg 630>;
1623
1624                         renesas,fcp = <&fcpvi1>;
1625                 };
1626
1627                 fcpvi1: fcp@fe9bf000 {
1628                         compatible = "renesas,fcpv";
1629                         reg = <0 0xfe9bf000 0 0x200>;
1630                         clocks = <&cpg CPG_MOD 610>;
1631                         power-domains = <&sysc R8A7795_PD_A3VP>;
1632                         resets = <&cpg 610>;
1633                 };
1634
1635                 vspd0: vsp@fea20000 {
1636                         compatible = "renesas,vsp2";
1637                         reg = <0 0xfea20000 0 0x4000>;
1638                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1639                         clocks = <&cpg CPG_MOD 623>;
1640                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1641                         resets = <&cpg 623>;
1642
1643                         renesas,fcp = <&fcpvd0>;
1644                 };
1645
1646                 fcpvd0: fcp@fea27000 {
1647                         compatible = "renesas,fcpv";
1648                         reg = <0 0xfea27000 0 0x200>;
1649                         clocks = <&cpg CPG_MOD 603>;
1650                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1651                         resets = <&cpg 603>;
1652                 };
1653
1654                 vspd1: vsp@fea28000 {
1655                         compatible = "renesas,vsp2";
1656                         reg = <0 0xfea28000 0 0x4000>;
1657                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1658                         clocks = <&cpg CPG_MOD 622>;
1659                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1660                         resets = <&cpg 622>;
1661
1662                         renesas,fcp = <&fcpvd1>;
1663                 };
1664
1665                 fcpvd1: fcp@fea2f000 {
1666                         compatible = "renesas,fcpv";
1667                         reg = <0 0xfea2f000 0 0x200>;
1668                         clocks = <&cpg CPG_MOD 602>;
1669                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1670                         resets = <&cpg 602>;
1671                 };
1672
1673                 vspd2: vsp@fea30000 {
1674                         compatible = "renesas,vsp2";
1675                         reg = <0 0xfea30000 0 0x4000>;
1676                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1677                         clocks = <&cpg CPG_MOD 621>;
1678                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1679                         resets = <&cpg 621>;
1680
1681                         renesas,fcp = <&fcpvd2>;
1682                 };
1683
1684                 fcpvd2: fcp@fea37000 {
1685                         compatible = "renesas,fcpv";
1686                         reg = <0 0xfea37000 0 0x200>;
1687                         clocks = <&cpg CPG_MOD 601>;
1688                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1689                         resets = <&cpg 601>;
1690                 };
1691
1692                 fdp1@fe940000 {
1693                         compatible = "renesas,fdp1";
1694                         reg = <0 0xfe940000 0 0x2400>;
1695                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1696                         clocks = <&cpg CPG_MOD 119>;
1697                         power-domains = <&sysc R8A7795_PD_A3VP>;
1698                         resets = <&cpg 119>;
1699                         renesas,fcp = <&fcpf0>;
1700                 };
1701
1702                 fdp1@fe944000 {
1703                         compatible = "renesas,fdp1";
1704                         reg = <0 0xfe944000 0 0x2400>;
1705                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 118>;
1707                         power-domains = <&sysc R8A7795_PD_A3VP>;
1708                         resets = <&cpg 118>;
1709                         renesas,fcp = <&fcpf1>;
1710                 };
1711
1712                 hdmi0: hdmi0@fead0000 {
1713                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1714                         reg = <0 0xfead0000 0 0x10000>;
1715                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1716                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1717                         clock-names = "iahb", "isfr";
1718                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1719                         resets = <&cpg 729>;
1720                         status = "disabled";
1721
1722                         ports {
1723                                 #address-cells = <1>;
1724                                 #size-cells = <0>;
1725                                 port@0 {
1726                                         reg = <0>;
1727                                         dw_hdmi0_in: endpoint {
1728                                                 remote-endpoint = <&du_out_hdmi0>;
1729                                         };
1730                                 };
1731                                 port@1 {
1732                                         reg = <1>;
1733                                 };
1734                         };
1735                 };
1736
1737                 hdmi1: hdmi1@feae0000 {
1738                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1739                         reg = <0 0xfeae0000 0 0x10000>;
1740                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
1741                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1742                         clock-names = "iahb", "isfr";
1743                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1744                         resets = <&cpg 728>;
1745                         status = "disabled";
1746
1747                         ports {
1748                                 #address-cells = <1>;
1749                                 #size-cells = <0>;
1750                                 port@0 {
1751                                         reg = <0>;
1752                                         dw_hdmi1_in: endpoint {
1753                                                 remote-endpoint = <&du_out_hdmi1>;
1754                                         };
1755                                 };
1756                                 port@1 {
1757                                         reg = <1>;
1758                                 };
1759                         };
1760                 };
1761
1762                 du: display@feb00000 {
1763                         reg = <0 0xfeb00000 0 0x80000>,
1764                               <0 0xfeb90000 0 0x14>;
1765                         reg-names = "du", "lvds.0";
1766                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1767                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1768                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1769                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1770                         clocks = <&cpg CPG_MOD 724>,
1771                                  <&cpg CPG_MOD 723>,
1772                                  <&cpg CPG_MOD 722>,
1773                                  <&cpg CPG_MOD 721>,
1774                                  <&cpg CPG_MOD 727>;
1775                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1776                         status = "disabled";
1777
1778                         ports {
1779                                 #address-cells = <1>;
1780                                 #size-cells = <0>;
1781
1782                                 port@0 {
1783                                         reg = <0>;
1784                                         du_out_rgb: endpoint {
1785                                         };
1786                                 };
1787                                 port@1 {
1788                                         reg = <1>;
1789                                         du_out_hdmi0: endpoint {
1790                                                 remote-endpoint = <&dw_hdmi0_in>;
1791                                         };
1792                                 };
1793                                 port@2 {
1794                                         reg = <2>;
1795                                         du_out_hdmi1: endpoint {
1796                                                 remote-endpoint = <&dw_hdmi1_in>;
1797                                         };
1798                                 };
1799                                 port@3 {
1800                                         reg = <3>;
1801                                         du_out_lvds0: endpoint {
1802                                         };
1803                                 };
1804                         };
1805                 };
1806
1807                 tsc: thermal@e6198000 {
1808                         compatible = "renesas,r8a7795-thermal";
1809                         reg = <0 0xe6198000 0 0x68>,
1810                               <0 0xe61a0000 0 0x5c>,
1811                               <0 0xe61a8000 0 0x5c>;
1812                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1813                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1814                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1815                         clocks = <&cpg CPG_MOD 522>;
1816                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1817                         resets = <&cpg 522>;
1818                         #thermal-sensor-cells = <1>;
1819                         status = "okay";
1820                 };
1821
1822                 thermal-zones {
1823                         sensor_thermal1: sensor-thermal1 {
1824                                 polling-delay-passive = <250>;
1825                                 polling-delay = <1000>;
1826                                 thermal-sensors = <&tsc 0>;
1827
1828                                 trips {
1829                                         sensor1_crit: sensor1-crit {
1830                                                 temperature = <120000>;
1831                                                 hysteresis = <2000>;
1832                                                 type = "critical";
1833                                         };
1834                                 };
1835                         };
1836
1837                         sensor_thermal2: sensor-thermal2 {
1838                                 polling-delay-passive = <250>;
1839                                 polling-delay = <1000>;
1840                                 thermal-sensors = <&tsc 1>;
1841
1842                                 trips {
1843                                         sensor2_crit: sensor2-crit {
1844                                                 temperature = <120000>;
1845                                                 hysteresis = <2000>;
1846                                                 type = "critical";
1847                                         };
1848                                 };
1849                         };
1850
1851                         sensor_thermal3: sensor-thermal3 {
1852                                 polling-delay-passive = <250>;
1853                                 polling-delay = <1000>;
1854                                 thermal-sensors = <&tsc 2>;
1855
1856                                 trips {
1857                                         sensor3_crit: sensor3-crit {
1858                                                 temperature = <120000>;
1859                                                 hysteresis = <2000>;
1860                                                 type = "critical";
1861                                         };
1862                                 };
1863                         };
1864                 };
1865         };
1866 };