arch/arm/dts/r8a7794.dtsi

   1 /*
   2  * Device Tree Source for the r8a7794 SoC
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  * Copyright (C) 2014 Ulrich Hecht
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0
   8  */
   9
  10 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/power/r8a7794-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7794";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &i2c6;
  29                 i2c7 = &i2c7;
  30                 spi0 = &qspi;
  31                 vin0 = &vin0;
  32                 vin1 = &vin1;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 cpu0: cpu@0 {
  40                         device_type = "cpu";
  41                         compatible = "arm,cortex-a7";
  42                         reg = <0>;
  43                         clock-frequency = <1000000000>;
  44                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  45                         power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
  46                         next-level-cache = <&L2_CA7>;
  47                 };
  48
  49                 cpu1: cpu@1 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a7";
  52                         reg = <1>;
  53                         clock-frequency = <1000000000>;
  54                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  55                         power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
  56                         next-level-cache = <&L2_CA7>;
  57                 };
  58
  59                 L2_CA7: cache-controller-0 {
  60                         compatible = "cache";
  61                         power-domains = <&sysc R8A7794_PD_CA7_SCU>;
  62                         cache-unified;
  63                         cache-level = <2>;
  64                 };
  65         };
  66
  67         gic: interrupt-controller@f1001000 {
  68                 compatible = "arm,gic-400";
  69                 #interrupt-cells = <3>;
  70                 #address-cells = <0>;
  71                 interrupt-controller;
  72                 reg = <0 0xf1001000 0 0x1000>,
  73                         <0 0xf1002000 0 0x2000>,
  74                         <0 0xf1004000 0 0x2000>,
  75                         <0 0xf1006000 0 0x2000>;
  76                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  77                 clocks = <&cpg CPG_MOD 408>;
  78                 clock-names = "clk";
  79                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
  80                 resets = <&cpg 408>;
  81         };
  82
  83         gpio0: gpio@e6050000 {
  84                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
  85                 reg = <0 0xe6050000 0 0x50>;
  86                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  87                 #gpio-cells = <2>;
  88                 gpio-controller;
  89                 gpio-ranges = <&pfc 0 0 32>;
  90                 #interrupt-cells = <2>;
  91                 interrupt-controller;
  92                 clocks = <&cpg CPG_MOD 912>;
  93                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
  94                 resets = <&cpg 912>;
  95         };
  96
  97         gpio1: gpio@e6051000 {
  98                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
  99                 reg = <0 0xe6051000 0 0x50>;
 100                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 101                 #gpio-cells = <2>;
 102                 gpio-controller;
 103                 gpio-ranges = <&pfc 0 32 26>;
 104                 #interrupt-cells = <2>;
 105                 interrupt-controller;
 106                 clocks = <&cpg CPG_MOD 911>;
 107                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 108                 resets = <&cpg 911>;
 109         };
 110
 111         gpio2: gpio@e6052000 {
 112                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 113                 reg = <0 0xe6052000 0 0x50>;
 114                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 115                 #gpio-cells = <2>;
 116                 gpio-controller;
 117                 gpio-ranges = <&pfc 0 64 32>;
 118                 #interrupt-cells = <2>;
 119                 interrupt-controller;
 120                 clocks = <&cpg CPG_MOD 910>;
 121                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 122                 resets = <&cpg 910>;
 123         };
 124
 125         gpio3: gpio@e6053000 {
 126                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 127                 reg = <0 0xe6053000 0 0x50>;
 128                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 129                 #gpio-cells = <2>;
 130                 gpio-controller;
 131                 gpio-ranges = <&pfc 0 96 32>;
 132                 #interrupt-cells = <2>;
 133                 interrupt-controller;
 134                 clocks = <&cpg CPG_MOD 909>;
 135                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 136                 resets = <&cpg 909>;
 137         };
 138
 139         gpio4: gpio@e6054000 {
 140                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 141                 reg = <0 0xe6054000 0 0x50>;
 142                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 143                 #gpio-cells = <2>;
 144                 gpio-controller;
 145                 gpio-ranges = <&pfc 0 128 32>;
 146                 #interrupt-cells = <2>;
 147                 interrupt-controller;
 148                 clocks = <&cpg CPG_MOD 908>;
 149                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 150                 resets = <&cpg 908>;
 151         };
 152
 153         gpio5: gpio@e6055000 {
 154                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 155                 reg = <0 0xe6055000 0 0x50>;
 156                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 157                 #gpio-cells = <2>;
 158                 gpio-controller;
 159                 gpio-ranges = <&pfc 0 160 28>;
 160                 #interrupt-cells = <2>;
 161                 interrupt-controller;
 162                 clocks = <&cpg CPG_MOD 907>;
 163                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 164                 resets = <&cpg 907>;
 165         };
 166
 167         gpio6: gpio@e6055400 {
 168                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 169                 reg = <0 0xe6055400 0 0x50>;
 170                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 171                 #gpio-cells = <2>;
 172                 gpio-controller;
 173                 gpio-ranges = <&pfc 0 192 26>;
 174                 #interrupt-cells = <2>;
 175                 interrupt-controller;
 176                 clocks = <&cpg CPG_MOD 905>;
 177                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 178                 resets = <&cpg 905>;
 179         };
 180
 181         cmt0: timer@ffca0000 {
 182                 compatible = "renesas,cmt-48-gen2";
 183                 reg = <0 0xffca0000 0 0x1004>;
 184                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 185                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 186                 clocks = <&cpg CPG_MOD 124>;
 187                 clock-names = "fck";
 188                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 189                 resets = <&cpg 124>;
 190
 191                 renesas,channels-mask = <0x60>;
 192
 193                 status = "disabled";
 194         };
 195
 196         cmt1: timer@e6130000 {
 197                 compatible = "renesas,cmt-48-gen2";
 198                 reg = <0 0xe6130000 0 0x1004>;
 199                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 200                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 201                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 202                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 203                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 204                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 205                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 206                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 207                 clocks = <&cpg CPG_MOD 329>;
 208                 clock-names = "fck";
 209                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 210                 resets = <&cpg 329>;
 211
 212                 renesas,channels-mask = <0xff>;
 213
 214                 status = "disabled";
 215         };
 216
 217         timer {
 218                 compatible = "arm,armv7-timer";
 219                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 220                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 221                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 222                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 223         };
 224
 225         irqc0: interrupt-controller@e61c0000 {
 226                 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
 227                 #interrupt-cells = <2>;
 228                 interrupt-controller;
 229                 reg = <0 0xe61c0000 0 0x200>;
 230                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 231                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 232                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 233                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 234                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 235                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 236                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 237                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 238                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 239                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 240                 clocks = <&cpg CPG_MOD 407>;
 241                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 242                 resets = <&cpg 407>;
 243         };
 244
 245         pfc: pin-controller@e6060000 {
 246                 compatible = "renesas,pfc-r8a7794";
 247                 reg = <0 0xe6060000 0 0x11c>;
 248         };
 249
 250         dmac0: dma-controller@e6700000 {
 251                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 252                 reg = <0 0xe6700000 0 0x20000>;
 253                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 254                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 255                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 256                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 257                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 258                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 259                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 260                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 261                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 262                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 263                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 264                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 265                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 266                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 267                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 268                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 269                 interrupt-names = "error",
 270                                 "ch0", "ch1", "ch2", "ch3",
 271                                 "ch4", "ch5", "ch6", "ch7",
 272                                 "ch8", "ch9", "ch10", "ch11",
 273                                 "ch12", "ch13", "ch14";
 274                 clocks = <&cpg CPG_MOD 219>;
 275                 clock-names = "fck";
 276                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 277                 resets = <&cpg 219>;
 278                 #dma-cells = <1>;
 279                 dma-channels = <15>;
 280         };
 281
 282         dmac1: dma-controller@e6720000 {
 283                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 284                 reg = <0 0xe6720000 0 0x20000>;
 285                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 286                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 287                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 288                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 289                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 290                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 291                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 292                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 293                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 294                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 295                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 296                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 297                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 298                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 299                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 300                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 301                 interrupt-names = "error",
 302                                 "ch0", "ch1", "ch2", "ch3",
 303                                 "ch4", "ch5", "ch6", "ch7",
 304                                 "ch8", "ch9", "ch10", "ch11",
 305                                 "ch12", "ch13", "ch14";
 306                 clocks = <&cpg CPG_MOD 218>;
 307                 clock-names = "fck";
 308                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 309                 resets = <&cpg 218>;
 310                 #dma-cells = <1>;
 311                 dma-channels = <15>;
 312         };
 313
 314         audma0: dma-controller@ec700000 {
 315                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 316                 reg = <0 0xec700000 0 0x10000>;
 317                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 318                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 319                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 320                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 321                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 322                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 323                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 324                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 325                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 326                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 327                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 328                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 329                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 330                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 331                 interrupt-names = "error",
 332                                   "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
 333                                   "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
 334                                   "ch12";
 335                 clocks = <&cpg CPG_MOD 502>;
 336                 clock-names = "fck";
 337                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 338                 resets = <&cpg 502>;
 339                 #dma-cells = <1>;
 340                 dma-channels = <13>;
 341         };
 342
 343         scifa0: serial@e6c40000 {
 344                 compatible = "renesas,scifa-r8a7794",
 345                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 346                 reg = <0 0xe6c40000 0 64>;
 347                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 348                 clocks = <&cpg CPG_MOD 204>;
 349                 clock-names = "fck";
 350                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 351                        <&dmac1 0x21>, <&dmac1 0x22>;
 352                 dma-names = "tx", "rx", "tx", "rx";
 353                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 354                 resets = <&cpg 204>;
 355                 status = "disabled";
 356         };
 357
 358         scifa1: serial@e6c50000 {
 359                 compatible = "renesas,scifa-r8a7794",
 360                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 361                 reg = <0 0xe6c50000 0 64>;
 362                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 363                 clocks = <&cpg CPG_MOD 203>;
 364                 clock-names = "fck";
 365                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 366                        <&dmac1 0x25>, <&dmac1 0x26>;
 367                 dma-names = "tx", "rx", "tx", "rx";
 368                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 369                 resets = <&cpg 203>;
 370                 status = "disabled";
 371         };
 372
 373         scifa2: serial@e6c60000 {
 374                 compatible = "renesas,scifa-r8a7794",
 375                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 376                 reg = <0 0xe6c60000 0 64>;
 377                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 378                 clocks = <&cpg CPG_MOD 202>;
 379                 clock-names = "fck";
 380                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 381                        <&dmac1 0x27>, <&dmac1 0x28>;
 382                 dma-names = "tx", "rx", "tx", "rx";
 383                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 384                 resets = <&cpg 202>;
 385                 status = "disabled";
 386         };
 387
 388         scifa3: serial@e6c70000 {
 389                 compatible = "renesas,scifa-r8a7794",
 390                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 391                 reg = <0 0xe6c70000 0 64>;
 392                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 393                 clocks = <&cpg CPG_MOD 1106>;
 394                 clock-names = "fck";
 395                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 396                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 397                 dma-names = "tx", "rx", "tx", "rx";
 398                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 399                 resets = <&cpg 1106>;
 400                 status = "disabled";
 401         };
 402
 403         scifa4: serial@e6c78000 {
 404                 compatible = "renesas,scifa-r8a7794",
 405                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 406                 reg = <0 0xe6c78000 0 64>;
 407                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 408                 clocks = <&cpg CPG_MOD 1107>;
 409                 clock-names = "fck";
 410                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 411                        <&dmac1 0x1f>, <&dmac1 0x20>;
 412                 dma-names = "tx", "rx", "tx", "rx";
 413                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 414                 resets = <&cpg 1107>;
 415                 status = "disabled";
 416         };
 417
 418         scifa5: serial@e6c80000 {
 419                 compatible = "renesas,scifa-r8a7794",
 420                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 421                 reg = <0 0xe6c80000 0 64>;
 422                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 423                 clocks = <&cpg CPG_MOD 1108>;
 424                 clock-names = "fck";
 425                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 426                        <&dmac1 0x23>, <&dmac1 0x24>;
 427                 dma-names = "tx", "rx", "tx", "rx";
 428                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 429                 resets = <&cpg 1108>;
 430                 status = "disabled";
 431         };
 432
 433         scifb0: serial@e6c20000 {
 434                 compatible = "renesas,scifb-r8a7794",
 435                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 436                 reg = <0 0xe6c20000 0 0x100>;
 437                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 438                 clocks = <&cpg CPG_MOD 206>;
 439                 clock-names = "fck";
 440                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 441                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 442                 dma-names = "tx", "rx", "tx", "rx";
 443                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 444                 resets = <&cpg 206>;
 445                 status = "disabled";
 446         };
 447
 448         scifb1: serial@e6c30000 {
 449                 compatible = "renesas,scifb-r8a7794",
 450                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 451                 reg = <0 0xe6c30000 0 0x100>;
 452                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 453                 clocks = <&cpg CPG_MOD 207>;
 454                 clock-names = "fck";
 455                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 456                        <&dmac1 0x19>, <&dmac1 0x1a>;
 457                 dma-names = "tx", "rx", "tx", "rx";
 458                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 459                 resets = <&cpg 207>;
 460                 status = "disabled";
 461         };
 462
 463         scifb2: serial@e6ce0000 {
 464                 compatible = "renesas,scifb-r8a7794",
 465                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 466                 reg = <0 0xe6ce0000 0 0x100>;
 467                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 468                 clocks = <&cpg CPG_MOD 216>;
 469                 clock-names = "fck";
 470                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 471                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 472                 dma-names = "tx", "rx", "tx", "rx";
 473                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 474                 resets = <&cpg 216>;
 475                 status = "disabled";
 476         };
 477
 478         scif0: serial@e6e60000 {
 479                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 480                              "renesas,scif";
 481                 reg = <0 0xe6e60000 0 64>;
 482                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 483                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 484                          <&scif_clk>;
 485                 clock-names = "fck", "brg_int", "scif_clk";
 486                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 487                        <&dmac1 0x29>, <&dmac1 0x2a>;
 488                 dma-names = "tx", "rx", "tx", "rx";
 489                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 490                 resets = <&cpg 721>;
 491                 status = "disabled";
 492         };
 493
 494         scif1: serial@e6e68000 {
 495                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 496                              "renesas,scif";
 497                 reg = <0 0xe6e68000 0 64>;
 498                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 499                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 500                          <&scif_clk>;
 501                 clock-names = "fck", "brg_int", "scif_clk";
 502                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 503                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 504                 dma-names = "tx", "rx", "tx", "rx";
 505                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 506                 resets = <&cpg 720>;
 507                 status = "disabled";
 508         };
 509
 510         scif2: serial@e6e58000 {
 511                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 512                              "renesas,scif";
 513                 reg = <0 0xe6e58000 0 64>;
 514                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 515                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 516                          <&scif_clk>;
 517                 clock-names = "fck", "brg_int", "scif_clk";
 518                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 519                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 520                 dma-names = "tx", "rx", "tx", "rx";
 521                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 522                 resets = <&cpg 719>;
 523                 status = "disabled";
 524         };
 525
 526         scif3: serial@e6ea8000 {
 527                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 528                              "renesas,scif";
 529                 reg = <0 0xe6ea8000 0 64>;
 530                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 531                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 532                          <&scif_clk>;
 533                 clock-names = "fck", "brg_int", "scif_clk";
 534                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 535                        <&dmac1 0x2f>, <&dmac1 0x30>;
 536                 dma-names = "tx", "rx", "tx", "rx";
 537                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 538                 resets = <&cpg 718>;
 539                 status = "disabled";
 540         };
 541
 542         scif4: serial@e6ee0000 {
 543                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 544                              "renesas,scif";
 545                 reg = <0 0xe6ee0000 0 64>;
 546                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 547                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 548                          <&scif_clk>;
 549                 clock-names = "fck", "brg_int", "scif_clk";
 550                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 551                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 552                 dma-names = "tx", "rx", "tx", "rx";
 553                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 554                 resets = <&cpg 715>;
 555                 status = "disabled";
 556         };
 557
 558         scif5: serial@e6ee8000 {
 559                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 560                              "renesas,scif";
 561                 reg = <0 0xe6ee8000 0 64>;
 562                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 563                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 564                          <&scif_clk>;
 565                 clock-names = "fck", "brg_int", "scif_clk";
 566                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 567                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 568                 dma-names = "tx", "rx", "tx", "rx";
 569                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 570                 resets = <&cpg 714>;
 571                 status = "disabled";
 572         };
 573
 574         hscif0: serial@e62c0000 {
 575                 compatible = "renesas,hscif-r8a7794",
 576                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 577                 reg = <0 0xe62c0000 0 96>;
 578                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 579                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 580                          <&scif_clk>;
 581                 clock-names = "fck", "brg_int", "scif_clk";
 582                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 583                        <&dmac1 0x39>, <&dmac1 0x3a>;
 584                 dma-names = "tx", "rx", "tx", "rx";
 585                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 586                 resets = <&cpg 717>;
 587                 status = "disabled";
 588         };
 589
 590         hscif1: serial@e62c8000 {
 591                 compatible = "renesas,hscif-r8a7794",
 592                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 593                 reg = <0 0xe62c8000 0 96>;
 594                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 595                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 596                          <&scif_clk>;
 597                 clock-names = "fck", "brg_int", "scif_clk";
 598                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 599                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 600                 dma-names = "tx", "rx", "tx", "rx";
 601                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 602                 resets = <&cpg 716>;
 603                 status = "disabled";
 604         };
 605
 606         hscif2: serial@e62d0000 {
 607                 compatible = "renesas,hscif-r8a7794",
 608                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 609                 reg = <0 0xe62d0000 0 96>;
 610                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 611                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 612                          <&scif_clk>;
 613                 clock-names = "fck", "brg_int", "scif_clk";
 614                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 615                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 616                 dma-names = "tx", "rx", "tx", "rx";
 617                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 618                 resets = <&cpg 713>;
 619                 status = "disabled";
 620         };
 621
 622         icram0: sram@e63a0000 {
 623                 compatible = "mmio-sram";
 624                 reg = <0 0xe63a0000 0 0x12000>;
 625         };
 626
 627         icram1: sram@e63c0000 {
 628                 compatible = "mmio-sram";
 629                 reg = <0 0xe63c0000 0 0x1000>;
 630                 #address-cells = <1>;
 631                 #size-cells = <1>;
 632                 ranges = <0 0 0xe63c0000 0x1000>;
 633
 634                 smp-sram@0 {
 635                         compatible = "renesas,smp-sram";
 636                         reg = <0 0x10>;
 637                 };
 638         };
 639
 640         ether: ethernet@ee700000 {
 641                 compatible = "renesas,ether-r8a7794";
 642                 reg = <0 0xee700000 0 0x400>;
 643                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 644                 clocks = <&cpg CPG_MOD 813>;
 645                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 646                 resets = <&cpg 813>;
 647                 phy-mode = "rmii";
 648                 #address-cells = <1>;
 649                 #size-cells = <0>;
 650                 status = "disabled";
 651         };
 652
 653         avb: ethernet@e6800000 {
 654                 compatible = "renesas,etheravb-r8a7794",
 655                              "renesas,etheravb-rcar-gen2";
 656                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 657                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 658                 clocks = <&cpg CPG_MOD 812>;
 659                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 660                 resets = <&cpg 812>;
 661                 #address-cells = <1>;
 662                 #size-cells = <0>;
 663                 status = "disabled";
 664         };
 665
 666         /* The memory map in the User's Manual maps the cores to bus numbers */
 667         i2c0: i2c@e6508000 {
 668                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 669                 reg = <0 0xe6508000 0 0x40>;
 670                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 671                 clocks = <&cpg CPG_MOD 931>;
 672                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 673                 resets = <&cpg 931>;
 674                 #address-cells = <1>;
 675                 #size-cells = <0>;
 676                 i2c-scl-internal-delay-ns = <6>;
 677                 status = "disabled";
 678         };
 679
 680         i2c1: i2c@e6518000 {
 681                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 682                 reg = <0 0xe6518000 0 0x40>;
 683                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 684                 clocks = <&cpg CPG_MOD 930>;
 685                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 686                 resets = <&cpg 930>;
 687                 #address-cells = <1>;
 688                 #size-cells = <0>;
 689                 i2c-scl-internal-delay-ns = <6>;
 690                 status = "disabled";
 691         };
 692
 693         i2c2: i2c@e6530000 {
 694                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 695                 reg = <0 0xe6530000 0 0x40>;
 696                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 697                 clocks = <&cpg CPG_MOD 929>;
 698                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 699                 resets = <&cpg 929>;
 700                 #address-cells = <1>;
 701                 #size-cells = <0>;
 702                 i2c-scl-internal-delay-ns = <6>;
 703                 status = "disabled";
 704         };
 705
 706         i2c3: i2c@e6540000 {
 707                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 708                 reg = <0 0xe6540000 0 0x40>;
 709                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 710                 clocks = <&cpg CPG_MOD 928>;
 711                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 712                 resets = <&cpg 928>;
 713                 #address-cells = <1>;
 714                 #size-cells = <0>;
 715                 i2c-scl-internal-delay-ns = <6>;
 716                 status = "disabled";
 717         };
 718
 719         i2c4: i2c@e6520000 {
 720                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 721                 reg = <0 0xe6520000 0 0x40>;
 722                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 723                 clocks = <&cpg CPG_MOD 927>;
 724                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 725                 resets = <&cpg 927>;
 726                 #address-cells = <1>;
 727                 #size-cells = <0>;
 728                 i2c-scl-internal-delay-ns = <6>;
 729                 status = "disabled";
 730         };
 731
 732         i2c5: i2c@e6528000 {
 733                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 734                 reg = <0 0xe6528000 0 0x40>;
 735                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 736                 clocks = <&cpg CPG_MOD 925>;
 737                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 738                 resets = <&cpg 925>;
 739                 #address-cells = <1>;
 740                 #size-cells = <0>;
 741                 i2c-scl-internal-delay-ns = <6>;
 742                 status = "disabled";
 743         };
 744
 745         i2c6: i2c@e6500000 {
 746                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 747                              "renesas,rmobile-iic";
 748                 reg = <0 0xe6500000 0 0x425>;
 749                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 750                 clocks = <&cpg CPG_MOD 318>;
 751                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 752                        <&dmac1 0x61>, <&dmac1 0x62>;
 753                 dma-names = "tx", "rx", "tx", "rx";
 754                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 755                 resets = <&cpg 318>;
 756                 #address-cells = <1>;
 757                 #size-cells = <0>;
 758                 status = "disabled";
 759         };
 760
 761         i2c7: i2c@e6510000 {
 762                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 763                              "renesas,rmobile-iic";
 764                 reg = <0 0xe6510000 0 0x425>;
 765                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 766                 clocks = <&cpg CPG_MOD 323>;
 767                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 768                        <&dmac1 0x65>, <&dmac1 0x66>;
 769                 dma-names = "tx", "rx", "tx", "rx";
 770                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 771                 resets = <&cpg 323>;
 772                 #address-cells = <1>;
 773                 #size-cells = <0>;
 774                 status = "disabled";
 775         };
 776
 777         mmcif0: mmc@ee200000 {
 778                 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
 779                 reg = <0 0xee200000 0 0x80>;
 780                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 781                 clocks = <&cpg CPG_MOD 315>;
 782                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 783                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 784                 dma-names = "tx", "rx", "tx", "rx";
 785                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 786                 resets = <&cpg 315>;
 787                 reg-io-width = <4>;
 788                 status = "disabled";
 789         };
 790
 791         sdhi0: sd@ee100000 {
 792                 compatible = "renesas,sdhi-r8a7794";
 793                 reg = <0 0xee100000 0 0x328>;
 794                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 795                 clocks = <&cpg CPG_MOD 314>;
 796                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 797                        <&dmac1 0xcd>, <&dmac1 0xce>;
 798                 dma-names = "tx", "rx", "tx", "rx";
 799                 max-frequency = <195000000>;
 800                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 801                 resets = <&cpg 314>;
 802                 status = "disabled";
 803         };
 804
 805         sdhi1: sd@ee140000 {
 806                 compatible = "renesas,sdhi-r8a7794";
 807                 reg = <0 0xee140000 0 0x100>;
 808                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 809                 clocks = <&cpg CPG_MOD 312>;
 810                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 811                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 812                 dma-names = "tx", "rx", "tx", "rx";
 813                 max-frequency = <97500000>;
 814                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 815                 resets = <&cpg 312>;
 816                 status = "disabled";
 817         };
 818
 819         sdhi2: sd@ee160000 {
 820                 compatible = "renesas,sdhi-r8a7794";
 821                 reg = <0 0xee160000 0 0x100>;
 822                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 823                 clocks = <&cpg CPG_MOD 311>;
 824                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 825                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 826                 dma-names = "tx", "rx", "tx", "rx";
 827                 max-frequency = <97500000>;
 828                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 829                 resets = <&cpg 311>;
 830                 status = "disabled";
 831         };
 832
 833         qspi: spi@e6b10000 {
 834                 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
 835                 reg = <0 0xe6b10000 0 0x2c>;
 836                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 837                 clocks = <&cpg CPG_MOD 917>;
 838                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 839                        <&dmac1 0x17>, <&dmac1 0x18>;
 840                 dma-names = "tx", "rx", "tx", "rx";
 841                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 842                 resets = <&cpg 917>;
 843                 num-cs = <1>;
 844                 #address-cells = <1>;
 845                 #size-cells = <0>;
 846                 status = "disabled";
 847         };
 848
 849         vin0: video@e6ef0000 {
 850                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 851                 reg = <0 0xe6ef0000 0 0x1000>;
 852                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 853                 clocks = <&cpg CPG_MOD 811>;
 854                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 855                 resets = <&cpg 811>;
 856                 status = "disabled";
 857         };
 858
 859         vin1: video@e6ef1000 {
 860                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 861                 reg = <0 0xe6ef1000 0 0x1000>;
 862                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 863                 clocks = <&cpg CPG_MOD 810>;
 864                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 865                 resets = <&cpg 810>;
 866                 status = "disabled";
 867         };
 868
 869         pci0: pci@ee090000 {
 870                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 871                 device_type = "pci";
 872                 reg = <0 0xee090000 0 0xc00>,
 873                       <0 0xee080000 0 0x1100>;
 874                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 875                 clocks = <&cpg CPG_MOD 703>;
 876                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 877                 resets = <&cpg 703>;
 878                 status = "disabled";
 879
 880                 bus-range = <0 0>;
 881                 #address-cells = <3>;
 882                 #size-cells = <2>;
 883                 #interrupt-cells = <1>;
 884                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
 885                 interrupt-map-mask = <0xff00 0 0 0x7>;
 886                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 887                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 888                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 889
 890                 usb@1,0 {
 891                         reg = <0x800 0 0 0 0>;
 892                         phys = <&usb0 0>;
 893                         phy-names = "usb";
 894                 };
 895
 896                 usb@2,0 {
 897                         reg = <0x1000 0 0 0 0>;
 898                         phys = <&usb0 0>;
 899                         phy-names = "usb";
 900                 };
 901         };
 902
 903         pci1: pci@ee0d0000 {
 904                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 905                 device_type = "pci";
 906                 reg = <0 0xee0d0000 0 0xc00>,
 907                       <0 0xee0c0000 0 0x1100>;
 908                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 909                 clocks = <&cpg CPG_MOD 703>;
 910                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 911                 resets = <&cpg 703>;
 912                 status = "disabled";
 913
 914                 bus-range = <1 1>;
 915                 #address-cells = <3>;
 916                 #size-cells = <2>;
 917                 #interrupt-cells = <1>;
 918                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
 919                 interrupt-map-mask = <0xff00 0 0 0x7>;
 920                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 921                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 922                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 923
 924                 usb@1,0 {
 925                         reg = <0x10800 0 0 0 0>;
 926                         phys = <&usb2 0>;
 927                         phy-names = "usb";
 928                 };
 929
 930                 usb@2,0 {
 931                         reg = <0x11000 0 0 0 0>;
 932                         phys = <&usb2 0>;
 933                         phy-names = "usb";
 934                 };
 935         };
 936
 937         hsusb: usb@e6590000 {
 938                 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
 939                 reg = <0 0xe6590000 0 0x100>;
 940                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 941                 clocks = <&cpg CPG_MOD 704>;
 942                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 943                 resets = <&cpg 704>;
 944                 renesas,buswait = <4>;
 945                 phys = <&usb0 1>;
 946                 phy-names = "usb";
 947                 status = "disabled";
 948         };
 949
 950         usbphy: usb-phy@e6590100 {
 951                 compatible = "renesas,usb-phy-r8a7794",
 952                              "renesas,rcar-gen2-usb-phy";
 953                 reg = <0 0xe6590100 0 0x100>;
 954                 #address-cells = <1>;
 955                 #size-cells = <0>;
 956                 clocks = <&cpg CPG_MOD 704>;
 957                 clock-names = "usbhs";
 958                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 959                 resets = <&cpg 704>;
 960                 status = "disabled";
 961
 962                 usb0: usb-channel@0 {
 963                         reg = <0>;
 964                         #phy-cells = <1>;
 965                 };
 966                 usb2: usb-channel@2 {
 967                         reg = <2>;
 968                         #phy-cells = <1>;
 969                 };
 970         };
 971
 972         vsp@fe928000 {
 973                 compatible = "renesas,vsp1";
 974                 reg = <0 0xfe928000 0 0x8000>;
 975                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
 976                 clocks = <&cpg CPG_MOD 131>;
 977                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 978                 resets = <&cpg 131>;
 979         };
 980
 981         vsp@fe930000 {
 982                 compatible = "renesas,vsp1";
 983                 reg = <0 0xfe930000 0 0x8000>;
 984                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
 985                 clocks = <&cpg CPG_MOD 128>;
 986                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 987                 resets = <&cpg 128>;
 988         };
 989
 990         du: display@feb00000 {
 991                 compatible = "renesas,du-r8a7794";
 992                 reg = <0 0xfeb00000 0 0x40000>;
 993                 reg-names = "du";
 994                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 995                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 996                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
 997                 clock-names = "du.0", "du.1";
 998                 status = "disabled";
 999
1000                 ports {
1001                         #address-cells = <1>;
1002                         #size-cells = <0>;
1003
1004                         port@0 {
1005                                 reg = <0>;
1006                                 du_out_rgb0: endpoint {
1007                                 };
1008                         };
1009                         port@1 {
1010                                 reg = <1>;
1011                                 du_out_rgb1: endpoint {
1012                                 };
1013                         };
1014                 };
1015         };
1016
1017         can0: can@e6e80000 {
1018                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1019                 reg = <0 0xe6e80000 0 0x1000>;
1020                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1021                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1022                          <&can_clk>;
1023                 clock-names = "clkp1", "clkp2", "can_clk";
1024                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1025                 resets = <&cpg 916>;
1026                 status = "disabled";
1027         };
1028
1029         can1: can@e6e88000 {
1030                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1031                 reg = <0 0xe6e88000 0 0x1000>;
1032                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1033                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1034                          <&can_clk>;
1035                 clock-names = "clkp1", "clkp2", "can_clk";
1036                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1037                 resets = <&cpg 915>;
1038                 status = "disabled";
1039         };
1040
1041         /* External root clock */
1042         extal_clk: extal {
1043                 compatible = "fixed-clock";
1044                 #clock-cells = <0>;
1045                 /* This value must be overridden by the board. */
1046                 clock-frequency = <0>;
1047         };
1048
1049         /* External USB clock - can be overridden by the board */
1050         usb_extal_clk: usb_extal {
1051                 compatible = "fixed-clock";
1052                 #clock-cells = <0>;
1053                 clock-frequency = <48000000>;
1054         };
1055
1056         /* External CAN clock */
1057         can_clk: can {
1058                 compatible = "fixed-clock";
1059                 #clock-cells = <0>;
1060                 /* This value must be overridden by the board. */
1061                 clock-frequency = <0>;
1062         };
1063
1064         /* External SCIF clock */
1065         scif_clk: scif {
1066                 compatible = "fixed-clock";
1067                 #clock-cells = <0>;
1068                 /* This value must be overridden by the board. */
1069                 clock-frequency = <0>;
1070         };
1071
1072         /*
1073          * The external audio clocks are configured  as 0 Hz fixed
1074          * frequency clocks by default.  Boards that provide audio
1075          * clocks should override them.
1076          */
1077         audio_clka: audio_clka {
1078                 compatible = "fixed-clock";
1079                 #clock-cells = <0>;
1080                 clock-frequency = <0>;
1081         };
1082         audio_clkb: audio_clkb {
1083                 compatible = "fixed-clock";
1084                 #clock-cells = <0>;
1085                 clock-frequency = <0>;
1086         };
1087         audio_clkc: audio_clkc {
1088                 compatible = "fixed-clock";
1089                 #clock-cells = <0>;
1090                 clock-frequency = <0>;
1091         };
1092
1093         cpg: clock-controller@e6150000 {
1094                 compatible = "renesas,r8a7794-cpg-mssr";
1095                 reg = <0 0xe6150000 0 0x1000>;
1096                 clocks = <&extal_clk>, <&usb_extal_clk>;
1097                 clock-names = "extal", "usb_extal";
1098                 #clock-cells = <2>;
1099                 #power-domain-cells = <0>;
1100                 #reset-cells = <1>;
1101         };
1102
1103         rst: reset-controller@e6160000 {
1104                 compatible = "renesas,r8a7794-rst";
1105                 reg = <0 0xe6160000 0 0x0100>;
1106         };
1107
1108         prr: chipid@ff000044 {
1109                 compatible = "renesas,prr";
1110                 reg = <0 0xff000044 0 4>;
1111         };
1112
1113         sysc: system-controller@e6180000 {
1114                 compatible = "renesas,r8a7794-sysc";
1115                 reg = <0 0xe6180000 0 0x0200>;
1116                 #power-domain-cells = <1>;
1117         };
1118
1119         ipmmu_sy0: mmu@e6280000 {
1120                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1121                 reg = <0 0xe6280000 0 0x1000>;
1122                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1123                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1124                 #iommu-cells = <1>;
1125                 status = "disabled";
1126         };
1127
1128         ipmmu_sy1: mmu@e6290000 {
1129                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1130                 reg = <0 0xe6290000 0 0x1000>;
1131                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1132                 #iommu-cells = <1>;
1133                 status = "disabled";
1134         };
1135
1136         ipmmu_ds: mmu@e6740000 {
1137                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1138                 reg = <0 0xe6740000 0 0x1000>;
1139                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1140                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1141                 #iommu-cells = <1>;
1142                 status = "disabled";
1143         };
1144
1145         ipmmu_mp: mmu@ec680000 {
1146                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1147                 reg = <0 0xec680000 0 0x1000>;
1148                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1149                 #iommu-cells = <1>;
1150                 status = "disabled";
1151         };
1152
1153         ipmmu_mx: mmu@fe951000 {
1154                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1155                 reg = <0 0xfe951000 0 0x1000>;
1156                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1157                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1158                 #iommu-cells = <1>;
1159                 status = "disabled";
1160         };
1161
1162         ipmmu_gp: mmu@e62a0000 {
1163                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1164                 reg = <0 0xe62a0000 0 0x1000>;
1165                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1166                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1167                 #iommu-cells = <1>;
1168                 status = "disabled";
1169         };
1170
1171         rcar_sound: sound@ec500000 {
1172                 /*
1173                  * #sound-dai-cells is required
1174                  *
1175                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1176                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1177                  */
1178                 compatible = "renesas,rcar_sound-r8a7794",
1179                              "renesas,rcar_sound-gen2";
1180                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1181                         <0 0xec5a0000 0 0x100>,  /* ADG */
1182                         <0 0xec540000 0 0x1000>, /* SSIU */
1183                         <0 0xec541000 0 0x280>,  /* SSI */
1184                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1185                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1186
1187                 clocks = <&cpg CPG_MOD 1005>,
1188                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1189                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1190                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1191                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1192                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1193                          <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1194                          <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1195                          <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1196                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1197                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1198                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1199                          <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1200                          <&cpg CPG_CORE R8A7794_CLK_M2>;
1201                 clock-names = "ssi-all",
1202                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1203                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1204                               "src.6", "src.5", "src.4", "src.3", "src.2",
1205                               "src.1",
1206                               "ctu.0", "ctu.1",
1207                               "mix.0", "mix.1",
1208                               "dvc.0", "dvc.1",
1209                               "clk_a", "clk_b", "clk_c", "clk_i";
1210                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1211                 resets = <&cpg 1005>,
1212                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1213                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1214                          <&cpg 1014>, <&cpg 1015>;
1215                 reset-names = "ssi-all",
1216                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1217                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1218
1219                 status = "disabled";
1220
1221                 rcar_sound,dvc {
1222                         dvc0: dvc-0 {
1223                                 dmas = <&audma0 0xbc>;
1224                                 dma-names = "tx";
1225                         };
1226                         dvc1: dvc-1 {
1227                                 dmas = <&audma0 0xbe>;
1228                                 dma-names = "tx";
1229                         };
1230                 };
1231
1232                 rcar_sound,mix {
1233                         mix0: mix-0 { };
1234                         mix1: mix-1 { };
1235                 };
1236
1237                 rcar_sound,ctu {
1238                         ctu00: ctu-0 { };
1239                         ctu01: ctu-1 { };
1240                         ctu02: ctu-2 { };
1241                         ctu03: ctu-3 { };
1242                         ctu10: ctu-4 { };
1243                         ctu11: ctu-5 { };
1244                         ctu12: ctu-6 { };
1245                         ctu13: ctu-7 { };
1246                 };
1247
1248                 rcar_sound,src {
1249                         src-0 {
1250                                 status = "disabled";
1251                         };
1252                         src1: src-1 {
1253                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1254                                 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1255                                 dma-names = "rx", "tx";
1256                         };
1257                         src2: src-2 {
1258                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1259                                 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1260                                 dma-names = "rx", "tx";
1261                         };
1262                         src3: src-3 {
1263                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1264                                 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1265                                 dma-names = "rx", "tx";
1266                         };
1267                         src4: src-4 {
1268                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1269                                 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1270                                 dma-names = "rx", "tx";
1271                         };
1272                         src5: src-5 {
1273                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1274                                 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1275                                 dma-names = "rx", "tx";
1276                         };
1277                         src6: src-6 {
1278                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1279                                 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1280                                 dma-names = "rx", "tx";
1281                         };
1282                 };
1283
1284                 rcar_sound,ssi {
1285                         ssi0: ssi-0 {
1286                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1287                                 dmas = <&audma0 0x01>, <&audma0 0x02>,
1288                                        <&audma0 0x15>, <&audma0 0x16>;
1289                                 dma-names = "rx", "tx", "rxu", "txu";
1290                         };
1291                         ssi1: ssi-1 {
1292                                 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1293                                 dmas = <&audma0 0x03>, <&audma0 0x04>,
1294                                        <&audma0 0x49>, <&audma0 0x4a>;
1295                                 dma-names = "rx", "tx", "rxu", "txu";
1296                         };
1297                         ssi2: ssi-2 {
1298                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1299                                 dmas = <&audma0 0x05>, <&audma0 0x06>,
1300                                        <&audma0 0x63>, <&audma0 0x64>;
1301                                 dma-names = "rx", "tx", "rxu", "txu";
1302                         };
1303                         ssi3: ssi-3 {
1304                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1305                                 dmas = <&audma0 0x07>, <&audma0 0x08>,
1306                                        <&audma0 0x6f>, <&audma0 0x70>;
1307                                 dma-names = "rx", "tx", "rxu", "txu";
1308                         };
1309                         ssi4: ssi-4 {
1310                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1311                                 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1312                                        <&audma0 0x71>, <&audma0 0x72>;
1313                                 dma-names = "rx", "tx", "rxu", "txu";
1314                         };
1315                         ssi5: ssi-5 {
1316                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1317                                 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1318                                        <&audma0 0x73>, <&audma0 0x74>;
1319                                 dma-names = "rx", "tx", "rxu", "txu";
1320                         };
1321                         ssi6: ssi-6 {
1322                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1323                                 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1324                                        <&audma0 0x75>, <&audma0 0x76>;
1325                                 dma-names = "rx", "tx", "rxu", "txu";
1326                         };
1327                         ssi7: ssi-7 {
1328                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1329                                 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1330                                        <&audma0 0x79>, <&audma0 0x7a>;
1331                                 dma-names = "rx", "tx", "rxu", "txu";
1332                         };
1333                         ssi8: ssi-8 {
1334                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1335                                 dmas = <&audma0 0x11>, <&audma0 0x12>,
1336                                        <&audma0 0x7b>, <&audma0 0x7c>;
1337                                 dma-names = "rx", "tx", "rxu", "txu";
1338                         };
1339                         ssi9: ssi-9 {
1340                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1341                                 dmas = <&audma0 0x13>, <&audma0 0x14>,
1342                                        <&audma0 0x7d>, <&audma0 0x7e>;
1343                                 dma-names = "rx", "tx", "rxu", "txu";
1344                         };
1345                 };
1346         };
1347 };