arch/arm/dts/r8a7790.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7790 SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corporation
   6  * Copyright (C) 2013-2014 Renesas Solutions Corp.
   7  * Copyright (C) 2014 Cogent Embedded Inc.
   8  */
   9
  10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/power/r8a7790-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7790";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &iic0;
  27                 i2c5 = &iic1;
  28                 i2c6 = &iic2;
  29                 i2c7 = &iic3;
  30                 spi0 = &qspi;
  31                 spi1 = &msiof0;
  32                 spi2 = &msiof1;
  33                 spi3 = &msiof2;
  34                 spi4 = &msiof3;
  35                 vin0 = &vin0;
  36                 vin1 = &vin1;
  37                 vin2 = &vin2;
  38                 vin3 = &vin3;
  39         };
  40
  41         cpus {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 enable-method = "renesas,apmu";
  45
  46                 cpu0: cpu@0 {
  47                         device_type = "cpu";
  48                         compatible = "arm,cortex-a15";
  49                         reg = <0>;
  50                         clock-frequency = <1300000000>;
  51                         voltage-tolerance = <1>; /* 1% */
  52                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  53                         clock-latency = <300000>; /* 300 us */
  54                         power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
  55                         next-level-cache = <&L2_CA15>;
  56                         capacity-dmips-mhz = <1024>;
  57
  58                         /* kHz - uV - OPPs unknown yet */
  59                         operating-points = <1400000 1000000>,
  60                                            <1225000 1000000>,
  61                                            <1050000 1000000>,
  62                                            < 875000 1000000>,
  63                                            < 700000 1000000>,
  64                                            < 350000 1000000>;
  65                 };
  66
  67                 cpu1: cpu@1 {
  68                         device_type = "cpu";
  69                         compatible = "arm,cortex-a15";
  70                         reg = <1>;
  71                         clock-frequency = <1300000000>;
  72                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  73                         power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
  74                         next-level-cache = <&L2_CA15>;
  75                         capacity-dmips-mhz = <1024>;
  76                 };
  77
  78                 cpu2: cpu@2 {
  79                         device_type = "cpu";
  80                         compatible = "arm,cortex-a15";
  81                         reg = <2>;
  82                         clock-frequency = <1300000000>;
  83                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  84                         power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
  85                         next-level-cache = <&L2_CA15>;
  86                         capacity-dmips-mhz = <1024>;
  87                 };
  88
  89                 cpu3: cpu@3 {
  90                         device_type = "cpu";
  91                         compatible = "arm,cortex-a15";
  92                         reg = <3>;
  93                         clock-frequency = <1300000000>;
  94                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  95                         power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
  96                         next-level-cache = <&L2_CA15>;
  97                         capacity-dmips-mhz = <1024>;
  98                 };
  99
 100                 cpu4: cpu@100 {
 101                         device_type = "cpu";
 102                         compatible = "arm,cortex-a7";
 103                         reg = <0x100>;
 104                         clock-frequency = <780000000>;
 105                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 106                         power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
 107                         next-level-cache = <&L2_CA7>;
 108                         capacity-dmips-mhz = <539>;
 109                 };
 110
 111                 cpu5: cpu@101 {
 112                         device_type = "cpu";
 113                         compatible = "arm,cortex-a7";
 114                         reg = <0x101>;
 115                         clock-frequency = <780000000>;
 116                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 117                         power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
 118                         next-level-cache = <&L2_CA7>;
 119                         capacity-dmips-mhz = <539>;
 120                 };
 121
 122                 cpu6: cpu@102 {
 123                         device_type = "cpu";
 124                         compatible = "arm,cortex-a7";
 125                         reg = <0x102>;
 126                         clock-frequency = <780000000>;
 127                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 128                         power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
 129                         next-level-cache = <&L2_CA7>;
 130                         capacity-dmips-mhz = <539>;
 131                 };
 132
 133                 cpu7: cpu@103 {
 134                         device_type = "cpu";
 135                         compatible = "arm,cortex-a7";
 136                         reg = <0x103>;
 137                         clock-frequency = <780000000>;
 138                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 139                         power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
 140                         next-level-cache = <&L2_CA7>;
 141                         capacity-dmips-mhz = <539>;
 142                 };
 143
 144                 L2_CA15: cache-controller-0 {
 145                         compatible = "cache";
 146                         power-domains = <&sysc R8A7790_PD_CA15_SCU>;
 147                         cache-unified;
 148                         cache-level = <2>;
 149                 };
 150
 151                 L2_CA7: cache-controller-1 {
 152                         compatible = "cache";
 153                         power-domains = <&sysc R8A7790_PD_CA7_SCU>;
 154                         cache-unified;
 155                         cache-level = <2>;
 156                 };
 157         };
 158
 159         thermal-zones {
 160                 cpu_thermal: cpu-thermal {
 161                         polling-delay-passive   = <0>;
 162                         polling-delay           = <0>;
 163
 164                         thermal-sensors = <&thermal>;
 165
 166                         trips {
 167                                 cpu-crit {
 168                                         temperature     = <115000>;
 169                                         hysteresis      = <0>;
 170                                         type            = "critical";
 171                                 };
 172                         };
 173                         cooling-maps {
 174                         };
 175                 };
 176         };
 177
 178         apmu@e6151000 {
 179                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 180                 reg = <0 0xe6151000 0 0x188>;
 181                 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 182         };
 183
 184         apmu@e6152000 {
 185                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 186                 reg = <0 0xe6152000 0 0x188>;
 187                 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 188         };
 189
 190         gic: interrupt-controller@f1001000 {
 191                 compatible = "arm,gic-400";
 192                 #interrupt-cells = <3>;
 193                 #address-cells = <0>;
 194                 interrupt-controller;
 195                 reg = <0 0xf1001000 0 0x1000>,
 196                         <0 0xf1002000 0 0x2000>,
 197                         <0 0xf1004000 0 0x2000>,
 198                         <0 0xf1006000 0 0x2000>;
 199                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 200                 clocks = <&cpg CPG_MOD 408>;
 201                 clock-names = "clk";
 202                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 203                 resets = <&cpg 408>;
 204         };
 205
 206         gpio0: gpio@e6050000 {
 207                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 208                 reg = <0 0xe6050000 0 0x50>;
 209                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 210                 #gpio-cells = <2>;
 211                 gpio-controller;
 212                 gpio-ranges = <&pfc 0 0 32>;
 213                 #interrupt-cells = <2>;
 214                 interrupt-controller;
 215                 clocks = <&cpg CPG_MOD 912>;
 216                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 217                 resets = <&cpg 912>;
 218         };
 219
 220         gpio1: gpio@e6051000 {
 221                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 222                 reg = <0 0xe6051000 0 0x50>;
 223                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 224                 #gpio-cells = <2>;
 225                 gpio-controller;
 226                 gpio-ranges = <&pfc 0 32 30>;
 227                 #interrupt-cells = <2>;
 228                 interrupt-controller;
 229                 clocks = <&cpg CPG_MOD 911>;
 230                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 231                 resets = <&cpg 911>;
 232         };
 233
 234         gpio2: gpio@e6052000 {
 235                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 236                 reg = <0 0xe6052000 0 0x50>;
 237                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 238                 #gpio-cells = <2>;
 239                 gpio-controller;
 240                 gpio-ranges = <&pfc 0 64 30>;
 241                 #interrupt-cells = <2>;
 242                 interrupt-controller;
 243                 clocks = <&cpg CPG_MOD 910>;
 244                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 245                 resets = <&cpg 910>;
 246         };
 247
 248         gpio3: gpio@e6053000 {
 249                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 250                 reg = <0 0xe6053000 0 0x50>;
 251                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 252                 #gpio-cells = <2>;
 253                 gpio-controller;
 254                 gpio-ranges = <&pfc 0 96 32>;
 255                 #interrupt-cells = <2>;
 256                 interrupt-controller;
 257                 clocks = <&cpg CPG_MOD 909>;
 258                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 259                 resets = <&cpg 909>;
 260         };
 261
 262         gpio4: gpio@e6054000 {
 263                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 264                 reg = <0 0xe6054000 0 0x50>;
 265                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 266                 #gpio-cells = <2>;
 267                 gpio-controller;
 268                 gpio-ranges = <&pfc 0 128 32>;
 269                 #interrupt-cells = <2>;
 270                 interrupt-controller;
 271                 clocks = <&cpg CPG_MOD 908>;
 272                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 273                 resets = <&cpg 908>;
 274         };
 275
 276         gpio5: gpio@e6055000 {
 277                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 278                 reg = <0 0xe6055000 0 0x50>;
 279                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 280                 #gpio-cells = <2>;
 281                 gpio-controller;
 282                 gpio-ranges = <&pfc 0 160 32>;
 283                 #interrupt-cells = <2>;
 284                 interrupt-controller;
 285                 clocks = <&cpg CPG_MOD 907>;
 286                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 287                 resets = <&cpg 907>;
 288         };
 289
 290         thermal: thermal@e61f0000 {
 291                 compatible =    "renesas,thermal-r8a7790",
 292                                 "renesas,rcar-gen2-thermal",
 293                                 "renesas,rcar-thermal";
 294                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 295                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 296                 clocks = <&cpg CPG_MOD 522>;
 297                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 298                 resets = <&cpg 522>;
 299                 #thermal-sensor-cells = <0>;
 300         };
 301
 302         timer {
 303                 compatible = "arm,armv7-timer";
 304                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 305                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 306                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 307                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 308         };
 309
 310         cmt0: timer@ffca0000 {
 311                 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
 312                 reg = <0 0xffca0000 0 0x1004>;
 313                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 314                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 315                 clocks = <&cpg CPG_MOD 124>;
 316                 clock-names = "fck";
 317                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 318                 resets = <&cpg 124>;
 319
 320                 renesas,channels-mask = <0x60>;
 321
 322                 status = "disabled";
 323         };
 324
 325         cmt1: timer@e6130000 {
 326                 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
 327                 reg = <0 0xe6130000 0 0x1004>;
 328                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 329                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 330                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 331                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 332                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 333                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 334                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 335                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 336                 clocks = <&cpg CPG_MOD 329>;
 337                 clock-names = "fck";
 338                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 339                 resets = <&cpg 329>;
 340
 341                 renesas,channels-mask = <0xff>;
 342
 343                 status = "disabled";
 344         };
 345
 346         irqc0: interrupt-controller@e61c0000 {
 347                 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
 348                 #interrupt-cells = <2>;
 349                 interrupt-controller;
 350                 reg = <0 0xe61c0000 0 0x200>;
 351                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 352                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 353                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 354                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 355                 clocks = <&cpg CPG_MOD 407>;
 356                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 357                 resets = <&cpg 407>;
 358         };
 359
 360         dmac0: dma-controller@e6700000 {
 361                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 362                 reg = <0 0xe6700000 0 0x20000>;
 363                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 364                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 365                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 366                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 367                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 368                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 369                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 370                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 371                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 378                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 379                 interrupt-names = "error",
 380                                 "ch0", "ch1", "ch2", "ch3",
 381                                 "ch4", "ch5", "ch6", "ch7",
 382                                 "ch8", "ch9", "ch10", "ch11",
 383                                 "ch12", "ch13", "ch14";
 384                 clocks = <&cpg CPG_MOD 219>;
 385                 clock-names = "fck";
 386                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 387                 resets = <&cpg 219>;
 388                 #dma-cells = <1>;
 389                 dma-channels = <15>;
 390         };
 391
 392         dmac1: dma-controller@e6720000 {
 393                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 394                 reg = <0 0xe6720000 0 0x20000>;
 395                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 396                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 397                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 398                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 399                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 400                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 401                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 410                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 411                 interrupt-names = "error",
 412                                 "ch0", "ch1", "ch2", "ch3",
 413                                 "ch4", "ch5", "ch6", "ch7",
 414                                 "ch8", "ch9", "ch10", "ch11",
 415                                 "ch12", "ch13", "ch14";
 416                 clocks = <&cpg CPG_MOD 218>;
 417                 clock-names = "fck";
 418                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 419                 resets = <&cpg 218>;
 420                 #dma-cells = <1>;
 421                 dma-channels = <15>;
 422         };
 423
 424         audma0: dma-controller@ec700000 {
 425                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 426                 reg = <0 0xec700000 0 0x10000>;
 427                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 428                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 429                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 430                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 431                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 432                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 433                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 434                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 435                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 436                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 437                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 438                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 439                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 440                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 441                 interrupt-names = "error",
 442                                 "ch0", "ch1", "ch2", "ch3",
 443                                 "ch4", "ch5", "ch6", "ch7",
 444                                 "ch8", "ch9", "ch10", "ch11",
 445                                 "ch12";
 446                 clocks = <&cpg CPG_MOD 502>;
 447                 clock-names = "fck";
 448                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 449                 resets = <&cpg 502>;
 450                 #dma-cells = <1>;
 451                 dma-channels = <13>;
 452         };
 453
 454         audma1: dma-controller@ec720000 {
 455                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 456                 reg = <0 0xec720000 0 0x10000>;
 457                 interrupts =    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 458                                  GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 459                                  GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 460                                  GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 461                                  GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 462                                  GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 463                                  GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 464                                  GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 465                                  GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 466                                  GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 467                                  GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 468                                  GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 469                                  GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 470                                  GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 471                 interrupt-names = "error",
 472                                 "ch0", "ch1", "ch2", "ch3",
 473                                 "ch4", "ch5", "ch6", "ch7",
 474                                 "ch8", "ch9", "ch10", "ch11",
 475                                 "ch12";
 476                 clocks = <&cpg CPG_MOD 501>;
 477                 clock-names = "fck";
 478                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 479                 resets = <&cpg 501>;
 480                 #dma-cells = <1>;
 481                 dma-channels = <13>;
 482         };
 483
 484         usb_dmac0: dma-controller@e65a0000 {
 485                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 486                 reg = <0 0xe65a0000 0 0x100>;
 487                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 488                               GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 489                 interrupt-names = "ch0", "ch1";
 490                 clocks = <&cpg CPG_MOD 330>;
 491                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 492                 resets = <&cpg 330>;
 493                 #dma-cells = <1>;
 494                 dma-channels = <2>;
 495         };
 496
 497         usb_dmac1: dma-controller@e65b0000 {
 498                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 499                 reg = <0 0xe65b0000 0 0x100>;
 500                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 501                               GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 502                 interrupt-names = "ch0", "ch1";
 503                 clocks = <&cpg CPG_MOD 331>;
 504                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 505                 resets = <&cpg 331>;
 506                 #dma-cells = <1>;
 507                 dma-channels = <2>;
 508         };
 509
 510         i2c0: i2c@e6508000 {
 511                 #address-cells = <1>;
 512                 #size-cells = <0>;
 513                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 514                 reg = <0 0xe6508000 0 0x40>;
 515                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 516                 clocks = <&cpg CPG_MOD 931>;
 517                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 518                 resets = <&cpg 931>;
 519                 i2c-scl-internal-delay-ns = <110>;
 520                 status = "disabled";
 521         };
 522
 523         i2c1: i2c@e6518000 {
 524                 #address-cells = <1>;
 525                 #size-cells = <0>;
 526                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 527                 reg = <0 0xe6518000 0 0x40>;
 528                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 529                 clocks = <&cpg CPG_MOD 930>;
 530                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 531                 resets = <&cpg 930>;
 532                 i2c-scl-internal-delay-ns = <6>;
 533                 status = "disabled";
 534         };
 535
 536         i2c2: i2c@e6530000 {
 537                 #address-cells = <1>;
 538                 #size-cells = <0>;
 539                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 540                 reg = <0 0xe6530000 0 0x40>;
 541                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 542                 clocks = <&cpg CPG_MOD 929>;
 543                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 544                 resets = <&cpg 929>;
 545                 i2c-scl-internal-delay-ns = <6>;
 546                 status = "disabled";
 547         };
 548
 549         i2c3: i2c@e6540000 {
 550                 #address-cells = <1>;
 551                 #size-cells = <0>;
 552                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 553                 reg = <0 0xe6540000 0 0x40>;
 554                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 555                 clocks = <&cpg CPG_MOD 928>;
 556                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 557                 resets = <&cpg 928>;
 558                 i2c-scl-internal-delay-ns = <110>;
 559                 status = "disabled";
 560         };
 561
 562         iic0: i2c@e6500000 {
 563                 #address-cells = <1>;
 564                 #size-cells = <0>;
 565                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 566                              "renesas,rmobile-iic";
 567                 reg = <0 0xe6500000 0 0x425>;
 568                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 569                 clocks = <&cpg CPG_MOD 318>;
 570                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 571                        <&dmac1 0x61>, <&dmac1 0x62>;
 572                 dma-names = "tx", "rx", "tx", "rx";
 573                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 574                 resets = <&cpg 318>;
 575                 status = "disabled";
 576         };
 577
 578         iic1: i2c@e6510000 {
 579                 #address-cells = <1>;
 580                 #size-cells = <0>;
 581                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 582                              "renesas,rmobile-iic";
 583                 reg = <0 0xe6510000 0 0x425>;
 584                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 585                 clocks = <&cpg CPG_MOD 323>;
 586                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 587                        <&dmac1 0x65>, <&dmac1 0x66>;
 588                 dma-names = "tx", "rx", "tx", "rx";
 589                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 590                 resets = <&cpg 323>;
 591                 status = "disabled";
 592         };
 593
 594         iic2: i2c@e6520000 {
 595                 #address-cells = <1>;
 596                 #size-cells = <0>;
 597                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 598                              "renesas,rmobile-iic";
 599                 reg = <0 0xe6520000 0 0x425>;
 600                 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 601                 clocks = <&cpg CPG_MOD 300>;
 602                 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 603                        <&dmac1 0x69>, <&dmac1 0x6a>;
 604                 dma-names = "tx", "rx", "tx", "rx";
 605                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 606                 resets = <&cpg 300>;
 607                 status = "disabled";
 608         };
 609
 610         iic3: i2c@e60b0000 {
 611                 #address-cells = <1>;
 612                 #size-cells = <0>;
 613                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 614                              "renesas,rmobile-iic";
 615                 reg = <0 0xe60b0000 0 0x425>;
 616                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 617                 clocks = <&cpg CPG_MOD 926>;
 618                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 619                        <&dmac1 0x77>, <&dmac1 0x78>;
 620                 dma-names = "tx", "rx", "tx", "rx";
 621                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 622                 resets = <&cpg 926>;
 623                 status = "disabled";
 624         };
 625
 626         mmcif0: mmc@ee200000 {
 627                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 628                 reg = <0 0xee200000 0 0x80>;
 629                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 630                 clocks = <&cpg CPG_MOD 315>;
 631                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 632                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 633                 dma-names = "tx", "rx", "tx", "rx";
 634                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 635                 resets = <&cpg 315>;
 636                 reg-io-width = <4>;
 637                 status = "disabled";
 638                 max-frequency = <97500000>;
 639         };
 640
 641         mmcif1: mmc@ee220000 {
 642                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 643                 reg = <0 0xee220000 0 0x80>;
 644                 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
 645                 clocks = <&cpg CPG_MOD 305>;
 646                 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
 647                        <&dmac1 0xe1>, <&dmac1 0xe2>;
 648                 dma-names = "tx", "rx", "tx", "rx";
 649                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 650                 resets = <&cpg 305>;
 651                 reg-io-width = <4>;
 652                 status = "disabled";
 653                 max-frequency = <97500000>;
 654         };
 655
 656         pfc: pin-controller@e6060000 {
 657                 compatible = "renesas,pfc-r8a7790";
 658                 reg = <0 0xe6060000 0 0x250>;
 659         };
 660
 661         sdhi0: sd@ee100000 {
 662                 compatible = "renesas,sdhi-r8a7790";
 663                 reg = <0 0xee100000 0 0x328>;
 664                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 665                 clocks = <&cpg CPG_MOD 314>;
 666                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 667                        <&dmac1 0xcd>, <&dmac1 0xce>;
 668                 dma-names = "tx", "rx", "tx", "rx";
 669                 max-frequency = <195000000>;
 670                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 671                 resets = <&cpg 314>;
 672                 status = "disabled";
 673         };
 674
 675         sdhi1: sd@ee120000 {
 676                 compatible = "renesas,sdhi-r8a7790";
 677                 reg = <0 0xee120000 0 0x328>;
 678                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 679                 clocks = <&cpg CPG_MOD 313>;
 680                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
 681                        <&dmac1 0xc9>, <&dmac1 0xca>;
 682                 dma-names = "tx", "rx", "tx", "rx";
 683                 max-frequency = <195000000>;
 684                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 685                 resets = <&cpg 313>;
 686                 status = "disabled";
 687         };
 688
 689         sdhi2: sd@ee140000 {
 690                 compatible = "renesas,sdhi-r8a7790";
 691                 reg = <0 0xee140000 0 0x100>;
 692                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 693                 clocks = <&cpg CPG_MOD 312>;
 694                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 695                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 696                 dma-names = "tx", "rx", "tx", "rx";
 697                 max-frequency = <97500000>;
 698                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 699                 resets = <&cpg 312>;
 700                 status = "disabled";
 701         };
 702
 703         sdhi3: sd@ee160000 {
 704                 compatible = "renesas,sdhi-r8a7790";
 705                 reg = <0 0xee160000 0 0x100>;
 706                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 707                 clocks = <&cpg CPG_MOD 311>;
 708                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 709                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 710                 dma-names = "tx", "rx", "tx", "rx";
 711                 max-frequency = <97500000>;
 712                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 713                 resets = <&cpg 311>;
 714                 status = "disabled";
 715         };
 716
 717         scifa0: serial@e6c40000 {
 718                 compatible = "renesas,scifa-r8a7790",
 719                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 720                 reg = <0 0xe6c40000 0 64>;
 721                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 722                 clocks = <&cpg CPG_MOD 204>;
 723                 clock-names = "fck";
 724                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 725                        <&dmac1 0x21>, <&dmac1 0x22>;
 726                 dma-names = "tx", "rx", "tx", "rx";
 727                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 728                 resets = <&cpg 204>;
 729                 status = "disabled";
 730         };
 731
 732         scifa1: serial@e6c50000 {
 733                 compatible = "renesas,scifa-r8a7790",
 734                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 735                 reg = <0 0xe6c50000 0 64>;
 736                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 737                 clocks = <&cpg CPG_MOD 203>;
 738                 clock-names = "fck";
 739                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 740                        <&dmac1 0x25>, <&dmac1 0x26>;
 741                 dma-names = "tx", "rx", "tx", "rx";
 742                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 743                 resets = <&cpg 203>;
 744                 status = "disabled";
 745         };
 746
 747         scifa2: serial@e6c60000 {
 748                 compatible = "renesas,scifa-r8a7790",
 749                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 750                 reg = <0 0xe6c60000 0 64>;
 751                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 752                 clocks = <&cpg CPG_MOD 202>;
 753                 clock-names = "fck";
 754                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 755                        <&dmac1 0x27>, <&dmac1 0x28>;
 756                 dma-names = "tx", "rx", "tx", "rx";
 757                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 758                 resets = <&cpg 202>;
 759                 status = "disabled";
 760         };
 761
 762         scifb0: serial@e6c20000 {
 763                 compatible = "renesas,scifb-r8a7790",
 764                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 765                 reg = <0 0xe6c20000 0 0x100>;
 766                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 767                 clocks = <&cpg CPG_MOD 206>;
 768                 clock-names = "fck";
 769                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 770                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 771                 dma-names = "tx", "rx", "tx", "rx";
 772                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 773                 resets = <&cpg 206>;
 774                 status = "disabled";
 775         };
 776
 777         scifb1: serial@e6c30000 {
 778                 compatible = "renesas,scifb-r8a7790",
 779                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 780                 reg = <0 0xe6c30000 0 0x100>;
 781                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 782                 clocks = <&cpg CPG_MOD 207>;
 783                 clock-names = "fck";
 784                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 785                        <&dmac1 0x19>, <&dmac1 0x1a>;
 786                 dma-names = "tx", "rx", "tx", "rx";
 787                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 788                 resets = <&cpg 207>;
 789                 status = "disabled";
 790         };
 791
 792         scifb2: serial@e6ce0000 {
 793                 compatible = "renesas,scifb-r8a7790",
 794                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 795                 reg = <0 0xe6ce0000 0 0x100>;
 796                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 797                 clocks = <&cpg CPG_MOD 216>;
 798                 clock-names = "fck";
 799                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 800                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 801                 dma-names = "tx", "rx", "tx", "rx";
 802                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 803                 resets = <&cpg 216>;
 804                 status = "disabled";
 805         };
 806
 807         scif0: serial@e6e60000 {
 808                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 809                              "renesas,scif";
 810                 reg = <0 0xe6e60000 0 64>;
 811                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 812                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 813                          <&scif_clk>;
 814                 clock-names = "fck", "brg_int", "scif_clk";
 815                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 816                        <&dmac1 0x29>, <&dmac1 0x2a>;
 817                 dma-names = "tx", "rx", "tx", "rx";
 818                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 819                 resets = <&cpg 721>;
 820                 status = "disabled";
 821         };
 822
 823         scif1: serial@e6e68000 {
 824                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 825                              "renesas,scif";
 826                 reg = <0 0xe6e68000 0 64>;
 827                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 828                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 829                          <&scif_clk>;
 830                 clock-names = "fck", "brg_int", "scif_clk";
 831                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 832                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 833                 dma-names = "tx", "rx", "tx", "rx";
 834                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 835                 resets = <&cpg 720>;
 836                 status = "disabled";
 837         };
 838
 839         scif2: serial@e6e56000 {
 840                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 841                              "renesas,scif";
 842                 reg = <0 0xe6e56000 0 64>;
 843                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 844                 clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 845                          <&scif_clk>;
 846                 clock-names = "fck", "brg_int", "scif_clk";
 847                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 848                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 849                 dma-names = "tx", "rx", "tx", "rx";
 850                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 851                 resets = <&cpg 310>;
 852                 status = "disabled";
 853         };
 854
 855         hscif0: serial@e62c0000 {
 856                 compatible = "renesas,hscif-r8a7790",
 857                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 858                 reg = <0 0xe62c0000 0 96>;
 859                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 860                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 861                          <&scif_clk>;
 862                 clock-names = "fck", "brg_int", "scif_clk";
 863                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 864                        <&dmac1 0x39>, <&dmac1 0x3a>;
 865                 dma-names = "tx", "rx", "tx", "rx";
 866                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 867                 resets = <&cpg 717>;
 868                 status = "disabled";
 869         };
 870
 871         hscif1: serial@e62c8000 {
 872                 compatible = "renesas,hscif-r8a7790",
 873                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 874                 reg = <0 0xe62c8000 0 96>;
 875                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 876                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 877                          <&scif_clk>;
 878                 clock-names = "fck", "brg_int", "scif_clk";
 879                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 880                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 881                 dma-names = "tx", "rx", "tx", "rx";
 882                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 883                 resets = <&cpg 716>;
 884                 status = "disabled";
 885         };
 886
 887         icram0: sram@e63a0000 {
 888                 compatible = "mmio-sram";
 889                 reg = <0 0xe63a0000 0 0x12000>;
 890         };
 891
 892         icram1: sram@e63c0000 {
 893                 compatible = "mmio-sram";
 894                 reg = <0 0xe63c0000 0 0x1000>;
 895                 #address-cells = <1>;
 896                 #size-cells = <1>;
 897                 ranges = <0 0 0xe63c0000 0x1000>;
 898
 899                 smp-sram@0 {
 900                         compatible = "renesas,smp-sram";
 901                         reg = <0 0x10>;
 902                 };
 903         };
 904
 905         ether: ethernet@ee700000 {
 906                 compatible = "renesas,ether-r8a7790";
 907                 reg = <0 0xee700000 0 0x400>;
 908                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 909                 clocks = <&cpg CPG_MOD 813>;
 910                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 911                 resets = <&cpg 813>;
 912                 phy-mode = "rmii";
 913                 #address-cells = <1>;
 914                 #size-cells = <0>;
 915                 status = "disabled";
 916         };
 917
 918         avb: ethernet@e6800000 {
 919                 compatible = "renesas,etheravb-r8a7790",
 920                              "renesas,etheravb-rcar-gen2";
 921                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 922                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 923                 clocks = <&cpg CPG_MOD 812>;
 924                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 925                 resets = <&cpg 812>;
 926                 #address-cells = <1>;
 927                 #size-cells = <0>;
 928                 status = "disabled";
 929         };
 930
 931         sata0: sata@ee300000 {
 932                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 933                 reg = <0 0xee300000 0 0x2000>;
 934                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 935                 clocks = <&cpg CPG_MOD 815>;
 936                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 937                 resets = <&cpg 815>;
 938                 status = "disabled";
 939         };
 940
 941         sata1: sata@ee500000 {
 942                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 943                 reg = <0 0xee500000 0 0x2000>;
 944                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 945                 clocks = <&cpg CPG_MOD 814>;
 946                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 947                 resets = <&cpg 814>;
 948                 status = "disabled";
 949         };
 950
 951         hsusb: usb@e6590000 {
 952                 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
 953                 reg = <0 0xe6590000 0 0x100>;
 954                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 955                 clocks = <&cpg CPG_MOD 704>;
 956                 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 957                        <&usb_dmac1 0>, <&usb_dmac1 1>;
 958                 dma-names = "ch0", "ch1", "ch2", "ch3";
 959                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 960                 resets = <&cpg 704>;
 961                 renesas,buswait = <4>;
 962                 phys = <&usb0 1>;
 963                 phy-names = "usb";
 964                 status = "disabled";
 965         };
 966
 967         usbphy: usb-phy@e6590100 {
 968                 compatible = "renesas,usb-phy-r8a7790",
 969                              "renesas,rcar-gen2-usb-phy";
 970                 reg = <0 0xe6590100 0 0x100>;
 971                 #address-cells = <1>;
 972                 #size-cells = <0>;
 973                 clocks = <&cpg CPG_MOD 704>;
 974                 clock-names = "usbhs";
 975                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 976                 resets = <&cpg 704>;
 977                 status = "disabled";
 978
 979                 usb0: usb-channel@0 {
 980                         reg = <0>;
 981                         #phy-cells = <1>;
 982                 };
 983                 usb2: usb-channel@2 {
 984                         reg = <2>;
 985                         #phy-cells = <1>;
 986                 };
 987         };
 988
 989         vin0: video@e6ef0000 {
 990                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
 991                 reg = <0 0xe6ef0000 0 0x1000>;
 992                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 993                 clocks = <&cpg CPG_MOD 811>;
 994                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 995                 resets = <&cpg 811>;
 996                 status = "disabled";
 997         };
 998
 999         vin1: video@e6ef1000 {
1000                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1001                 reg = <0 0xe6ef1000 0 0x1000>;
1002                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1003                 clocks = <&cpg CPG_MOD 810>;
1004                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1005                 resets = <&cpg 810>;
1006                 status = "disabled";
1007         };
1008
1009         vin2: video@e6ef2000 {
1010                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1011                 reg = <0 0xe6ef2000 0 0x1000>;
1012                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1013                 clocks = <&cpg CPG_MOD 809>;
1014                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1015                 resets = <&cpg 809>;
1016                 status = "disabled";
1017         };
1018
1019         vin3: video@e6ef3000 {
1020                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1021                 reg = <0 0xe6ef3000 0 0x1000>;
1022                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1023                 clocks = <&cpg CPG_MOD 808>;
1024                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1025                 resets = <&cpg 808>;
1026                 status = "disabled";
1027         };
1028
1029         vsp@fe920000 {
1030                 compatible = "renesas,vsp1";
1031                 reg = <0 0xfe920000 0 0x8000>;
1032                 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1033                 clocks = <&cpg CPG_MOD 130>;
1034                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1035                 resets = <&cpg 130>;
1036         };
1037
1038         vsp@fe928000 {
1039                 compatible = "renesas,vsp1";
1040                 reg = <0 0xfe928000 0 0x8000>;
1041                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1042                 clocks = <&cpg CPG_MOD 131>;
1043                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1044                 resets = <&cpg 131>;
1045         };
1046
1047         vsp@fe930000 {
1048                 compatible = "renesas,vsp1";
1049                 reg = <0 0xfe930000 0 0x8000>;
1050                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1051                 clocks = <&cpg CPG_MOD 128>;
1052                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1053                 resets = <&cpg 128>;
1054         };
1055
1056         vsp@fe938000 {
1057                 compatible = "renesas,vsp1";
1058                 reg = <0 0xfe938000 0 0x8000>;
1059                 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1060                 clocks = <&cpg CPG_MOD 127>;
1061                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1062                 resets = <&cpg 127>;
1063         };
1064
1065         du: display@feb00000 {
1066                 compatible = "renesas,du-r8a7790";
1067                 reg = <0 0xfeb00000 0 0x70000>,
1068                       <0 0xfeb90000 0 0x1c>,
1069                       <0 0xfeb94000 0 0x1c>;
1070                 reg-names = "du", "lvds.0", "lvds.1";
1071                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1072                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1073                              <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1074                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1075                          <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
1076                          <&cpg CPG_MOD 725>;
1077                 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
1078                 status = "disabled";
1079
1080                 ports {
1081                         #address-cells = <1>;
1082                         #size-cells = <0>;
1083
1084                         port@0 {
1085                                 reg = <0>;
1086                                 du_out_rgb: endpoint {
1087                                 };
1088                         };
1089                         port@1 {
1090                                 reg = <1>;
1091                                 du_out_lvds0: endpoint {
1092                                 };
1093                         };
1094                         port@2 {
1095                                 reg = <2>;
1096                                 du_out_lvds1: endpoint {
1097                                 };
1098                         };
1099                 };
1100         };
1101
1102         can0: can@e6e80000 {
1103                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1104                 reg = <0 0xe6e80000 0 0x1000>;
1105                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1106                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1107                          <&can_clk>;
1108                 clock-names = "clkp1", "clkp2", "can_clk";
1109                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1110                 resets = <&cpg 916>;
1111                 status = "disabled";
1112         };
1113
1114         can1: can@e6e88000 {
1115                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1116                 reg = <0 0xe6e88000 0 0x1000>;
1117                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1118                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1119                          <&can_clk>;
1120                 clock-names = "clkp1", "clkp2", "can_clk";
1121                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1122                 resets = <&cpg 915>;
1123                 status = "disabled";
1124         };
1125
1126         jpu: jpeg-codec@fe980000 {
1127                 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1128                 reg = <0 0xfe980000 0 0x10300>;
1129                 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1130                 clocks = <&cpg CPG_MOD 106>;
1131                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1132                 resets = <&cpg 106>;
1133         };
1134
1135         /* External root clock */
1136         extal_clk: extal {
1137                 compatible = "fixed-clock";
1138                 #clock-cells = <0>;
1139                 /* This value must be overridden by the board. */
1140                 clock-frequency = <0>;
1141         };
1142
1143         /* External PCIe clock - can be overridden by the board */
1144         pcie_bus_clk: pcie_bus {
1145                 compatible = "fixed-clock";
1146                 #clock-cells = <0>;
1147                 clock-frequency = <0>;
1148         };
1149
1150         /*
1151          * The external audio clocks are configured as 0 Hz fixed frequency
1152          * clocks by default.
1153          * Boards that provide audio clocks should override them.
1154          */
1155         audio_clk_a: audio_clk_a {
1156                 compatible = "fixed-clock";
1157                 #clock-cells = <0>;
1158                 clock-frequency = <0>;
1159         };
1160         audio_clk_b: audio_clk_b {
1161                 compatible = "fixed-clock";
1162                 #clock-cells = <0>;
1163                 clock-frequency = <0>;
1164         };
1165         audio_clk_c: audio_clk_c {
1166                 compatible = "fixed-clock";
1167                 #clock-cells = <0>;
1168                 clock-frequency = <0>;
1169         };
1170
1171         /* External SCIF clock */
1172         scif_clk: scif {
1173                 compatible = "fixed-clock";
1174                 #clock-cells = <0>;
1175                 /* This value must be overridden by the board. */
1176                 clock-frequency = <0>;
1177         };
1178
1179         /* External USB clock - can be overridden by the board */
1180         usb_extal_clk: usb_extal {
1181                 compatible = "fixed-clock";
1182                 #clock-cells = <0>;
1183                 clock-frequency = <48000000>;
1184         };
1185
1186         /* External CAN clock */
1187         can_clk: can {
1188                 compatible = "fixed-clock";
1189                 #clock-cells = <0>;
1190                 /* This value must be overridden by the board. */
1191                 clock-frequency = <0>;
1192         };
1193
1194         cpg: clock-controller@e6150000 {
1195                 compatible = "renesas,r8a7790-cpg-mssr";
1196                 reg = <0 0xe6150000 0 0x1000>;
1197                 clocks = <&extal_clk>, <&usb_extal_clk>;
1198                 clock-names = "extal", "usb_extal";
1199                 #clock-cells = <2>;
1200                 #power-domain-cells = <0>;
1201                 #reset-cells = <1>;
1202         };
1203
1204         prr: chipid@ff000044 {
1205                 compatible = "renesas,prr";
1206                 reg = <0 0xff000044 0 4>;
1207         };
1208
1209         rst: reset-controller@e6160000 {
1210                 compatible = "renesas,r8a7790-rst";
1211                 reg = <0 0xe6160000 0 0x0100>;
1212         };
1213
1214         sysc: system-controller@e6180000 {
1215                 compatible = "renesas,r8a7790-sysc";
1216                 reg = <0 0xe6180000 0 0x0200>;
1217                 #power-domain-cells = <1>;
1218         };
1219
1220         qspi: spi@e6b10000 {
1221                 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1222                 reg = <0 0xe6b10000 0 0x2c>;
1223                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1224                 clocks = <&cpg CPG_MOD 917>;
1225                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1226                        <&dmac1 0x17>, <&dmac1 0x18>;
1227                 dma-names = "tx", "rx", "tx", "rx";
1228                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1229                 resets = <&cpg 917>;
1230                 num-cs = <1>;
1231                 #address-cells = <1>;
1232                 #size-cells = <0>;
1233                 status = "disabled";
1234         };
1235
1236         msiof0: spi@e6e20000 {
1237                 compatible = "renesas,msiof-r8a7790",
1238                              "renesas,rcar-gen2-msiof";
1239                 reg = <0 0xe6e20000 0 0x0064>;
1240                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1241                 clocks = <&cpg CPG_MOD 0>;
1242                 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1243                        <&dmac1 0x51>, <&dmac1 0x52>;
1244                 dma-names = "tx", "rx", "tx", "rx";
1245                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1246                 resets = <&cpg 0>;
1247                 #address-cells = <1>;
1248                 #size-cells = <0>;
1249                 status = "disabled";
1250         };
1251
1252         msiof1: spi@e6e10000 {
1253                 compatible = "renesas,msiof-r8a7790",
1254                              "renesas,rcar-gen2-msiof";
1255                 reg = <0 0xe6e10000 0 0x0064>;
1256                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1257                 clocks = <&cpg CPG_MOD 208>;
1258                 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1259                        <&dmac1 0x55>, <&dmac1 0x56>;
1260                 dma-names = "tx", "rx", "tx", "rx";
1261                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1262                 resets = <&cpg 208>;
1263                 #address-cells = <1>;
1264                 #size-cells = <0>;
1265                 status = "disabled";
1266         };
1267
1268         msiof2: spi@e6e00000 {
1269                 compatible = "renesas,msiof-r8a7790",
1270                              "renesas,rcar-gen2-msiof";
1271                 reg = <0 0xe6e00000 0 0x0064>;
1272                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1273                 clocks = <&cpg CPG_MOD 205>;
1274                 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1275                        <&dmac1 0x41>, <&dmac1 0x42>;
1276                 dma-names = "tx", "rx", "tx", "rx";
1277                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1278                 resets = <&cpg 205>;
1279                 #address-cells = <1>;
1280                 #size-cells = <0>;
1281                 status = "disabled";
1282         };
1283
1284         msiof3: spi@e6c90000 {
1285                 compatible = "renesas,msiof-r8a7790",
1286                              "renesas,rcar-gen2-msiof";
1287                 reg = <0 0xe6c90000 0 0x0064>;
1288                 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1289                 clocks = <&cpg CPG_MOD 215>;
1290                 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1291                        <&dmac1 0x45>, <&dmac1 0x46>;
1292                 dma-names = "tx", "rx", "tx", "rx";
1293                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1294                 resets = <&cpg 215>;
1295                 #address-cells = <1>;
1296                 #size-cells = <0>;
1297                 status = "disabled";
1298         };
1299
1300         xhci: usb@ee000000 {
1301                 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1302                 reg = <0 0xee000000 0 0xc00>;
1303                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1304                 clocks = <&cpg CPG_MOD 328>;
1305                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1306                 resets = <&cpg 328>;
1307                 phys = <&usb2 1>;
1308                 phy-names = "usb";
1309                 status = "disabled";
1310         };
1311
1312         pci0: pci@ee090000 {
1313                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1314                 device_type = "pci";
1315                 reg = <0 0xee090000 0 0xc00>,
1316                       <0 0xee080000 0 0x1100>;
1317                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1318                 clocks = <&cpg CPG_MOD 703>;
1319                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1320                 resets = <&cpg 703>;
1321                 status = "disabled";
1322
1323                 bus-range = <0 0>;
1324                 #address-cells = <3>;
1325                 #size-cells = <2>;
1326                 #interrupt-cells = <1>;
1327                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1328                 interrupt-map-mask = <0xff00 0 0 0x7>;
1329                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1330                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1331                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1332
1333                 usb@1,0 {
1334                         reg = <0x800 0 0 0 0>;
1335                         phys = <&usb0 0>;
1336                         phy-names = "usb";
1337                 };
1338
1339                 usb@2,0 {
1340                         reg = <0x1000 0 0 0 0>;
1341                         phys = <&usb0 0>;
1342                         phy-names = "usb";
1343                 };
1344         };
1345
1346         pci1: pci@ee0b0000 {
1347                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1348                 device_type = "pci";
1349                 reg = <0 0xee0b0000 0 0xc00>,
1350                       <0 0xee0a0000 0 0x1100>;
1351                 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1352                 clocks = <&cpg CPG_MOD 703>;
1353                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1354                 resets = <&cpg 703>;
1355                 status = "disabled";
1356
1357                 bus-range = <1 1>;
1358                 #address-cells = <3>;
1359                 #size-cells = <2>;
1360                 #interrupt-cells = <1>;
1361                 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1362                 interrupt-map-mask = <0xff00 0 0 0x7>;
1363                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1364                                  0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1365                                  0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1366         };
1367
1368         pci2: pci@ee0d0000 {
1369                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1370                 device_type = "pci";
1371                 clocks = <&cpg CPG_MOD 703>;
1372                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1373                 resets = <&cpg 703>;
1374                 reg = <0 0xee0d0000 0 0xc00>,
1375                       <0 0xee0c0000 0 0x1100>;
1376                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1377                 status = "disabled";
1378
1379                 bus-range = <2 2>;
1380                 #address-cells = <3>;
1381                 #size-cells = <2>;
1382                 #interrupt-cells = <1>;
1383                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1384                 interrupt-map-mask = <0xff00 0 0 0x7>;
1385                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1386                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1387                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1388
1389                 usb@1,0 {
1390                         reg = <0x20800 0 0 0 0>;
1391                         phys = <&usb2 0>;
1392                         phy-names = "usb";
1393                 };
1394
1395                 usb@2,0 {
1396                         reg = <0x21000 0 0 0 0>;
1397                         phys = <&usb2 0>;
1398                         phy-names = "usb";
1399                 };
1400         };
1401
1402         pciec: pcie@fe000000 {
1403                 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1404                 reg = <0 0xfe000000 0 0x80000>;
1405                 #address-cells = <3>;
1406                 #size-cells = <2>;
1407                 bus-range = <0x00 0xff>;
1408                 device_type = "pci";
1409                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1410                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1411                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1412                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1413                 /* Map all possible DDR as inbound ranges */
1414                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1415                               0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1416                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1417                              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1418                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1419                 #interrupt-cells = <1>;
1420                 interrupt-map-mask = <0 0 0 0>;
1421                 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1422                 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1423                 clock-names = "pcie", "pcie_bus";
1424                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1425                 resets = <&cpg 319>;
1426                 status = "disabled";
1427         };
1428
1429         rcar_sound: sound@ec500000 {
1430                 /*
1431                  * #sound-dai-cells is required
1432                  *
1433                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1434                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1435                  */
1436                 compatible =  "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1437                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1438                         <0 0xec5a0000 0 0x100>,  /* ADG */
1439                         <0 0xec540000 0 0x1000>, /* SSIU */
1440                         <0 0xec541000 0 0x280>,  /* SSI */
1441                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1442                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1443
1444                 clocks = <&cpg CPG_MOD 1005>,
1445                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1446                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1447                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1448                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1449                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1450                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1451                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1452                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1453                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1454                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1455                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1456                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1457                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1458                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1459                          <&cpg CPG_CORE R8A7790_CLK_M2>;
1460                 clock-names = "ssi-all",
1461                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1462                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1463                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1464                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1465                                 "ctu.0", "ctu.1",
1466                                 "mix.0", "mix.1",
1467                                 "dvc.0", "dvc.1",
1468                                 "clk_a", "clk_b", "clk_c", "clk_i";
1469                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1470                 resets = <&cpg 1005>,
1471                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1472                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1473                          <&cpg 1014>, <&cpg 1015>;
1474                 reset-names = "ssi-all",
1475                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1476                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1477
1478                 status = "disabled";
1479
1480                 rcar_sound,dvc {
1481                         dvc0: dvc-0 {
1482                                 dmas = <&audma1 0xbc>;
1483                                 dma-names = "tx";
1484                         };
1485                         dvc1: dvc-1 {
1486                                 dmas = <&audma1 0xbe>;
1487                                 dma-names = "tx";
1488                         };
1489                 };
1490
1491                 rcar_sound,mix {
1492                         mix0: mix-0 { };
1493                         mix1: mix-1 { };
1494                 };
1495
1496                 rcar_sound,ctu {
1497                         ctu00: ctu-0 { };
1498                         ctu01: ctu-1 { };
1499                         ctu02: ctu-2 { };
1500                         ctu03: ctu-3 { };
1501                         ctu10: ctu-4 { };
1502                         ctu11: ctu-5 { };
1503                         ctu12: ctu-6 { };
1504                         ctu13: ctu-7 { };
1505                 };
1506
1507                 rcar_sound,src {
1508                         src0: src-0 {
1509                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1510                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1511                                 dma-names = "rx", "tx";
1512                         };
1513                         src1: src-1 {
1514                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1515                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1516                                 dma-names = "rx", "tx";
1517                         };
1518                         src2: src-2 {
1519                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1520                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1521                                 dma-names = "rx", "tx";
1522                         };
1523                         src3: src-3 {
1524                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1525                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1526                                 dma-names = "rx", "tx";
1527                         };
1528                         src4: src-4 {
1529                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1530                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1531                                 dma-names = "rx", "tx";
1532                         };
1533                         src5: src-5 {
1534                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1535                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1536                                 dma-names = "rx", "tx";
1537                         };
1538                         src6: src-6 {
1539                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1540                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1541                                 dma-names = "rx", "tx";
1542                         };
1543                         src7: src-7 {
1544                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1545                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1546                                 dma-names = "rx", "tx";
1547                         };
1548                         src8: src-8 {
1549                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1550                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1551                                 dma-names = "rx", "tx";
1552                         };
1553                         src9: src-9 {
1554                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1555                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1556                                 dma-names = "rx", "tx";
1557                         };
1558                 };
1559
1560                 rcar_sound,ssi {
1561                         ssi0: ssi-0 {
1562                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1563                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1564                                 dma-names = "rx", "tx", "rxu", "txu";
1565                         };
1566                         ssi1: ssi-1 {
1567                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1568                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1569                                 dma-names = "rx", "tx", "rxu", "txu";
1570                         };
1571                         ssi2: ssi-2 {
1572                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1573                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1574                                 dma-names = "rx", "tx", "rxu", "txu";
1575                         };
1576                         ssi3: ssi-3 {
1577                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1578                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1579                                 dma-names = "rx", "tx", "rxu", "txu";
1580                         };
1581                         ssi4: ssi-4 {
1582                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1583                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1584                                 dma-names = "rx", "tx", "rxu", "txu";
1585                         };
1586                         ssi5: ssi-5 {
1587                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1588                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1589                                 dma-names = "rx", "tx", "rxu", "txu";
1590                         };
1591                         ssi6: ssi-6 {
1592                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1593                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1594                                 dma-names = "rx", "tx", "rxu", "txu";
1595                         };
1596                         ssi7: ssi-7 {
1597                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1598                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1599                                 dma-names = "rx", "tx", "rxu", "txu";
1600                         };
1601                         ssi8: ssi-8 {
1602                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1603                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1604                                 dma-names = "rx", "tx", "rxu", "txu";
1605                         };
1606                         ssi9: ssi-9 {
1607                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1608                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1609                                 dma-names = "rx", "tx", "rxu", "txu";
1610                         };
1611                 };
1612         };
1613
1614         ipmmu_sy0: mmu@e6280000 {
1615                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1616                 reg = <0 0xe6280000 0 0x1000>;
1617                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1618                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1619                 #iommu-cells = <1>;
1620                 status = "disabled";
1621         };
1622
1623         ipmmu_sy1: mmu@e6290000 {
1624                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1625                 reg = <0 0xe6290000 0 0x1000>;
1626                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1627                 #iommu-cells = <1>;
1628                 status = "disabled";
1629         };
1630
1631         ipmmu_ds: mmu@e6740000 {
1632                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1633                 reg = <0 0xe6740000 0 0x1000>;
1634                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1635                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1636                 #iommu-cells = <1>;
1637                 status = "disabled";
1638         };
1639
1640         ipmmu_mp: mmu@ec680000 {
1641                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1642                 reg = <0 0xec680000 0 0x1000>;
1643                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1644                 #iommu-cells = <1>;
1645                 status = "disabled";
1646         };
1647
1648         ipmmu_mx: mmu@fe951000 {
1649                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1650                 reg = <0 0xfe951000 0 0x1000>;
1651                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1652                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1653                 #iommu-cells = <1>;
1654                 status = "disabled";
1655         };
1656
1657         ipmmu_rt: mmu@ffc80000 {
1658                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1659                 reg = <0 0xffc80000 0 0x1000>;
1660                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1661                 #iommu-cells = <1>;
1662                 status = "disabled";
1663         };
1664 };