arch/arm/dts/mt8518-ap1-emmc.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (C) 2019 MediaTek Inc.
   4  * Author: Mingming Lee <mingming.lee@mediatek.com>
   5  *
   6  */
   7
   8 /dts-v1/;
   9
  10 #include <config.h>
  11 #include "mt8518.dtsi"
  12
  13 / {
  14         #address-cells = <1>;
  15         #size-cells = <1>;
  16
  17         model = "MT8518 AP1 EMMC";
  18
  19         chosen {
  20                 stdout-path = &uart0;
  21                 tick-timer = &timer0;
  22         };
  23
  24         memory@40000000 {
  25                 device_type = "memory";
  26                 reg = <0x40000000 0x10000000>;
  27         };
  28
  29         reg_1p8v: regulator-1p8v {
  30                 compatible = "regulator-fixed";
  31                 regulator-name = "fixed-1.8V";
  32                 regulator-min-microvolt = <1800000>;
  33                 regulator-max-microvolt = <1800000>;
  34                 regulator-boot-on;
  35                 regulator-always-on;
  36         };
  37
  38         reg_3p3v: regulator-3p3v {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "fixed-3.3V";
  41                 regulator-min-microvolt = <3300000>;
  42                 regulator-max-microvolt = <3300000>;
  43                 regulator-boot-on;
  44                 regulator-always-on;
  45         };
  46 };
  47
  48 &mmc0 {
  49         pinctrl-names = "default";
  50         pinctrl-0 = <&mmc0_pins_default>;
  51         bus-width = <8>;
  52         max-frequency = <200000000>;
  53         cap-mmc-highspeed;
  54         mmc-hs200-1_8v;
  55         cap-mmc-hw-reset;
  56         vmmc-supply = <&reg_3p3v>;
  57         vqmmc-supply = <&reg_1p8v>;
  58         non-removable;
  59         status = "okay";
  60 };
  61
  62 &pinctrl {
  63         mmc0_pins_default: mmc0default {
  64                 mux {
  65                         function = "msdc";
  66                         groups =  "msdc0";
  67                 };
  68
  69                 conf-cmd-data {
  70                         pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
  71                                "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
  72                                "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
  73                         input-enable;
  74                         bias-pull-up;
  75                 };
  76
  77                 conf-clk {
  78                         pins = "MSDC0_CLK";
  79                         bias-pull-down;
  80                 };
  81
  82                 conf-rst {
  83                         pins = "MSDC0_RSTB";
  84                         bias-pull-up;
  85                 };
  86         };
  87
  88                 uart0_pins: uart0 {
  89                         mux {
  90                                 function = "uart";
  91                                 groups = "uart0_0_rxd_txd";
  92                         };
  93                 };
  94 };
  95
  96 &uart0 {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&uart0_pins>;
  99         status = "okay";
 100 };
 101
 102 &watchdog0 {
 103         status = "okay";
 104 };