1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/clock/g12a-clkc.h>
10 #include <dt-bindings/clock/g12a-aoclkc.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
17 compatible = "amlogic,g12a";
19 interrupt-parent = <&gic>;
23 tdmif_a: audio-controller-0 {
24 compatible = "amlogic,axg-tdm-iface";
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "TDM_A";
27 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
29 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
30 clock-names = "mclk", "sclk", "lrclk";
34 tdmif_b: audio-controller-1 {
35 compatible = "amlogic,axg-tdm-iface";
36 #sound-dai-cells = <0>;
37 sound-name-prefix = "TDM_B";
38 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
40 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
41 clock-names = "mclk", "sclk", "lrclk";
45 tdmif_c: audio-controller-2 {
46 compatible = "amlogic,axg-tdm-iface";
47 #sound-dai-cells = <0>;
48 sound-name-prefix = "TDM_C";
49 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
51 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
52 clock-names = "mclk", "sclk", "lrclk";
57 #address-cells = <0x2>;
62 compatible = "arm,cortex-a53";
64 enable-method = "psci";
65 next-level-cache = <&l2>;
70 compatible = "arm,cortex-a53";
72 enable-method = "psci";
73 next-level-cache = <&l2>;
78 compatible = "arm,cortex-a53";
80 enable-method = "psci";
81 next-level-cache = <&l2>;
86 compatible = "arm,cortex-a53";
88 enable-method = "psci";
89 next-level-cache = <&l2>;
98 compatible = "amlogic,meson-gxbb-efuse";
99 clocks = <&clkc CLKID_EFUSE>;
100 #address-cells = <1>;
106 compatible = "arm,psci-1.0";
111 #address-cells = <2>;
115 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
116 secmon_reserved: secmon@5000000 {
117 reg = <0x0 0x05000000 0x0 0x300000>;
122 compatible = "shared-dma-pool";
124 size = <0x0 0x10000000>;
125 alignment = <0x0 0x400000>;
131 compatible = "amlogic,meson-gxbb-sm";
135 compatible = "simple-bus";
136 #address-cells = <2>;
140 ethmac: ethernet@ff3f0000 {
141 compatible = "amlogic,meson-axg-dwmac",
144 reg = <0x0 0xff3f0000 0x0 0x10000
145 0x0 0xff634540 0x0 0x8>;
146 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
147 interrupt-names = "macirq";
148 clocks = <&clkc CLKID_ETH>,
149 <&clkc CLKID_FCLK_DIV2>,
151 clock-names = "stmmaceth", "clkin0", "clkin1";
155 #address-cells = <1>;
157 compatible = "snps,dwmac-mdio";
162 compatible = "simple-bus";
163 reg = <0x0 0xff600000 0x0 0x200000>;
164 #address-cells = <2>;
166 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
169 compatible = "amlogic,meson-g12a-dw-hdmi";
170 reg = <0x0 0x0 0x0 0x10000>;
171 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
172 resets = <&reset RESET_HDMITX_CAPB3>,
173 <&reset RESET_HDMITX_PHY>,
174 <&reset RESET_HDMITX>;
175 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
176 clocks = <&clkc CLKID_HDMI>,
177 <&clkc CLKID_HTX_PCLK>,
178 <&clkc CLKID_VPU_INTR>;
179 clock-names = "isfr", "iahb", "venci";
180 #address-cells = <1>;
182 #sound-dai-cells = <0>;
186 hdmi_tx_venc_port: port@0 {
189 hdmi_tx_in: endpoint {
190 remote-endpoint = <&hdmi_tx_out>;
195 hdmi_tx_tmds_port: port@1 {
200 apb_efuse: bus@30000 {
201 compatible = "simple-bus";
202 reg = <0x0 0x30000 0x0 0x2000>;
203 #address-cells = <2>;
205 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
208 compatible = "amlogic,meson-rng";
209 reg = <0x0 0x218 0x0 0x4>;
214 compatible = "simple-bus";
215 reg = <0x0 0x34400 0x0 0x400>;
216 #address-cells = <2>;
218 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
220 periphs_pinctrl: pinctrl@40 {
221 compatible = "amlogic,meson-g12a-periphs-pinctrl";
222 #address-cells = <2>;
227 reg = <0x0 0x40 0x0 0x4c>,
229 <0x0 0x120 0x0 0x18>,
230 <0x0 0x2c0 0x0 0x40>,
231 <0x0 0x340 0x0 0x1c>;
239 gpio-ranges = <&periphs_pinctrl 0 0 86>;
242 cec_ao_a_h_pins: cec_ao_a_h {
244 groups = "cec_ao_a_h";
245 function = "cec_ao_a_h";
250 cec_ao_b_h_pins: cec_ao_b_h {
252 groups = "cec_ao_b_h";
253 function = "cec_ao_b_h";
260 groups = "emmc_nand_d0",
271 drive-strength-microamp = <4000>;
278 drive-strength-microamp = <4000>;
282 emmc_ds_pins: emmc-ds {
284 groups = "emmc_nand_ds";
287 drive-strength-microamp = <4000>;
291 emmc_clk_gate_pins: emmc_clk_gate {
294 function = "gpio_periphs";
296 drive-strength-microamp = <4000>;
300 hdmitx_ddc_pins: hdmitx_ddc {
302 groups = "hdmitx_sda",
306 drive-strength-microamp = <4000>;
310 hdmitx_hpd_pins: hdmitx_hpd {
312 groups = "hdmitx_hpd_in";
319 i2c0_sda_c_pins: i2c0-sda-c {
321 groups = "i2c0_sda_c";
324 drive-strength-microamp = <3000>;
329 i2c0_sck_c_pins: i2c0-sck-c {
331 groups = "i2c0_sck_c";
334 drive-strength-microamp = <3000>;
338 i2c0_sda_z0_pins: i2c0-sda-z0 {
340 groups = "i2c0_sda_z0";
343 drive-strength-microamp = <3000>;
347 i2c0_sck_z1_pins: i2c0-sck-z1 {
349 groups = "i2c0_sck_z1";
352 drive-strength-microamp = <3000>;
356 i2c0_sda_z7_pins: i2c0-sda-z7 {
358 groups = "i2c0_sda_z7";
361 drive-strength-microamp = <3000>;
365 i2c0_sda_z8_pins: i2c0-sda-z8 {
367 groups = "i2c0_sda_z8";
370 drive-strength-microamp = <3000>;
374 i2c1_sda_x_pins: i2c1-sda-x {
376 groups = "i2c1_sda_x";
379 drive-strength-microamp = <3000>;
383 i2c1_sck_x_pins: i2c1-sck-x {
385 groups = "i2c1_sck_x";
388 drive-strength-microamp = <3000>;
392 i2c1_sda_h2_pins: i2c1-sda-h2 {
394 groups = "i2c1_sda_h2";
397 drive-strength-microamp = <3000>;
401 i2c1_sck_h3_pins: i2c1-sck-h3 {
403 groups = "i2c1_sck_h3";
406 drive-strength-microamp = <3000>;
410 i2c1_sda_h6_pins: i2c1-sda-h6 {
412 groups = "i2c1_sda_h6";
415 drive-strength-microamp = <3000>;
419 i2c1_sck_h7_pins: i2c1-sck-h7 {
421 groups = "i2c1_sck_h7";
424 drive-strength-microamp = <3000>;
428 i2c2_sda_x_pins: i2c2-sda-x {
430 groups = "i2c2_sda_x";
433 drive-strength-microamp = <3000>;
437 i2c2_sck_x_pins: i2c2-sck-x {
439 groups = "i2c2_sck_x";
442 drive-strength-microamp = <3000>;
446 i2c2_sda_z_pins: i2c2-sda-z {
448 groups = "i2c2_sda_z";
451 drive-strength-microamp = <3000>;
455 i2c2_sck_z_pins: i2c2-sck-z {
457 groups = "i2c2_sck_z";
460 drive-strength-microamp = <3000>;
464 i2c3_sda_h_pins: i2c3-sda-h {
466 groups = "i2c3_sda_h";
469 drive-strength-microamp = <3000>;
473 i2c3_sck_h_pins: i2c3-sck-h {
475 groups = "i2c3_sck_h";
478 drive-strength-microamp = <3000>;
482 i2c3_sda_a_pins: i2c3-sda-a {
484 groups = "i2c3_sda_a";
487 drive-strength-microamp = <3000>;
491 i2c3_sck_a_pins: i2c3-sck-a {
493 groups = "i2c3_sck_a";
496 drive-strength-microamp = <3000>;
500 mclk0_a_pins: mclk0-a {
505 drive-strength-microamp = <3000>;
509 mclk1_a_pins: mclk1-a {
514 drive-strength-microamp = <3000>;
518 mclk1_x_pins: mclk1-x {
523 drive-strength-microamp = <3000>;
527 mclk1_z_pins: mclk1-z {
532 drive-strength-microamp = <3000>;
536 pdm_din0_a_pins: pdm-din0-a {
538 groups = "pdm_din0_a";
544 pdm_din0_c_pins: pdm-din0-c {
546 groups = "pdm_din0_c";
552 pdm_din0_x_pins: pdm-din0-x {
554 groups = "pdm_din0_x";
560 pdm_din0_z_pins: pdm-din0-z {
562 groups = "pdm_din0_z";
568 pdm_din1_a_pins: pdm-din1-a {
570 groups = "pdm_din1_a";
576 pdm_din1_c_pins: pdm-din1-c {
578 groups = "pdm_din1_c";
584 pdm_din1_x_pins: pdm-din1-x {
586 groups = "pdm_din1_x";
592 pdm_din1_z_pins: pdm-din1-z {
594 groups = "pdm_din1_z";
600 pdm_din2_a_pins: pdm-din2-a {
602 groups = "pdm_din2_a";
608 pdm_din2_c_pins: pdm-din2-c {
610 groups = "pdm_din2_c";
616 pdm_din2_x_pins: pdm-din2-x {
618 groups = "pdm_din2_x";
624 pdm_din2_z_pins: pdm-din2-z {
626 groups = "pdm_din2_z";
632 pdm_din3_a_pins: pdm-din3-a {
634 groups = "pdm_din3_a";
640 pdm_din3_c_pins: pdm-din3-c {
642 groups = "pdm_din3_c";
648 pdm_din3_x_pins: pdm-din3-x {
650 groups = "pdm_din3_x";
656 pdm_din3_z_pins: pdm-din3-z {
658 groups = "pdm_din3_z";
664 pdm_dclk_a_pins: pdm-dclk-a {
666 groups = "pdm_dclk_a";
669 drive-strength-microamp = <500>;
673 pdm_dclk_c_pins: pdm-dclk-c {
675 groups = "pdm_dclk_c";
678 drive-strength-microamp = <500>;
682 pdm_dclk_x_pins: pdm-dclk-x {
684 groups = "pdm_dclk_x";
687 drive-strength-microamp = <500>;
691 pdm_dclk_z_pins: pdm-dclk-z {
693 groups = "pdm_dclk_z";
696 drive-strength-microamp = <500>;
708 pwm_b_x7_pins: pwm-b-x7 {
716 pwm_b_x19_pins: pwm-b-x19 {
718 groups = "pwm_b_x19";
724 pwm_c_c_pins: pwm-c-c {
732 pwm_c_x5_pins: pwm-c-x5 {
740 pwm_c_x8_pins: pwm-c-x8 {
748 pwm_d_x3_pins: pwm-d-x3 {
756 pwm_d_x6_pins: pwm-d-x6 {
772 pwm_f_x_pins: pwm-f-x {
780 pwm_f_h_pins: pwm-f-h {
788 sdcard_c_pins: sdcard_c {
790 groups = "sdcard_d0_c",
797 drive-strength-microamp = <4000>;
801 groups = "sdcard_clk_c";
804 drive-strength-microamp = <4000>;
808 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
811 function = "gpio_periphs";
813 drive-strength-microamp = <4000>;
817 sdcard_z_pins: sdcard_z {
819 groups = "sdcard_d0_z",
826 drive-strength-microamp = <4000>;
830 groups = "sdcard_clk_z";
833 drive-strength-microamp = <4000>;
837 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
840 function = "gpio_periphs";
842 drive-strength-microamp = <4000>;
856 drive-strength-microamp = <4000>;
860 sdio_clk_gate_pins: sdio_clk_gate {
863 function = "gpio_periphs";
865 drive-strength-microamp = <4000>;
869 spdif_in_a10_pins: spdif-in-a10 {
871 groups = "spdif_in_a10";
872 function = "spdif_in";
877 spdif_in_a12_pins: spdif-in-a12 {
879 groups = "spdif_in_a12";
880 function = "spdif_in";
885 spdif_in_h_pins: spdif-in-h {
887 groups = "spdif_in_h";
888 function = "spdif_in";
893 spdif_out_h_pins: spdif-out-h {
895 groups = "spdif_out_h";
896 function = "spdif_out";
897 drive-strength-microamp = <500>;
902 spdif_out_a11_pins: spdif-out-a11 {
904 groups = "spdif_out_a11";
905 function = "spdif_out";
906 drive-strength-microamp = <500>;
911 spdif_out_a13_pins: spdif-out-a13 {
913 groups = "spdif_out_a13";
914 function = "spdif_out";
915 drive-strength-microamp = <500>;
920 tdm_a_din0_pins: tdm-a-din0 {
922 groups = "tdm_a_din0";
929 tdm_a_din1_pins: tdm-a-din1 {
931 groups = "tdm_a_din1";
937 tdm_a_dout0_pins: tdm-a-dout0 {
939 groups = "tdm_a_dout0";
942 drive-strength-microamp = <3000>;
946 tdm_a_dout1_pins: tdm-a-dout1 {
948 groups = "tdm_a_dout1";
951 drive-strength-microamp = <3000>;
955 tdm_a_fs_pins: tdm-a-fs {
960 drive-strength-microamp = <3000>;
964 tdm_a_sclk_pins: tdm-a-sclk {
966 groups = "tdm_a_sclk";
969 drive-strength-microamp = <3000>;
973 tdm_a_slv_fs_pins: tdm-a-slv-fs {
975 groups = "tdm_a_slv_fs";
982 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
984 groups = "tdm_a_slv_sclk";
990 tdm_b_din0_pins: tdm-b-din0 {
992 groups = "tdm_b_din0";
998 tdm_b_din1_pins: tdm-b-din1 {
1000 groups = "tdm_b_din1";
1006 tdm_b_din2_pins: tdm-b-din2 {
1008 groups = "tdm_b_din2";
1014 tdm_b_din3_a_pins: tdm-b-din3-a {
1016 groups = "tdm_b_din3_a";
1022 tdm_b_din3_h_pins: tdm-b-din3-h {
1024 groups = "tdm_b_din3_h";
1030 tdm_b_dout0_pins: tdm-b-dout0 {
1032 groups = "tdm_b_dout0";
1035 drive-strength-microamp = <3000>;
1039 tdm_b_dout1_pins: tdm-b-dout1 {
1041 groups = "tdm_b_dout1";
1044 drive-strength-microamp = <3000>;
1048 tdm_b_dout2_pins: tdm-b-dout2 {
1050 groups = "tdm_b_dout2";
1053 drive-strength-microamp = <3000>;
1057 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1059 groups = "tdm_b_dout3_a";
1062 drive-strength-microamp = <3000>;
1066 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1068 groups = "tdm_b_dout3_h";
1071 drive-strength-microamp = <3000>;
1075 tdm_b_fs_pins: tdm-b-fs {
1077 groups = "tdm_b_fs";
1080 drive-strength-microamp = <3000>;
1084 tdm_b_sclk_pins: tdm-b-sclk {
1086 groups = "tdm_b_sclk";
1089 drive-strength-microamp = <3000>;
1093 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1095 groups = "tdm_b_slv_fs";
1101 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1103 groups = "tdm_b_slv_sclk";
1109 tdm_c_din0_a_pins: tdm-c-din0-a {
1111 groups = "tdm_c_din0_a";
1117 tdm_c_din0_z_pins: tdm-c-din0-z {
1119 groups = "tdm_c_din0_z";
1125 tdm_c_din1_a_pins: tdm-c-din1-a {
1127 groups = "tdm_c_din1_a";
1133 tdm_c_din1_z_pins: tdm-c-din1-z {
1135 groups = "tdm_c_din1_z";
1141 tdm_c_din2_a_pins: tdm-c-din2-a {
1143 groups = "tdm_c_din2_a";
1149 eth_leds_pins: eth-leds {
1151 groups = "eth_link_led",
1160 groups = "eth_mdio",
1170 drive-strength-microamp = <4000>;
1175 eth_rgmii_pins: eth-rgmii {
1177 groups = "eth_rxd2_rgmii",
1183 drive-strength-microamp = <4000>;
1188 tdm_c_din2_z_pins: tdm-c-din2-z {
1190 groups = "tdm_c_din2_z";
1196 tdm_c_din3_a_pins: tdm-c-din3-a {
1198 groups = "tdm_c_din3_a";
1204 tdm_c_din3_z_pins: tdm-c-din3-z {
1206 groups = "tdm_c_din3_z";
1212 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1214 groups = "tdm_c_dout0_a";
1217 drive-strength-microamp = <3000>;
1221 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1223 groups = "tdm_c_dout0_z";
1226 drive-strength-microamp = <3000>;
1230 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1232 groups = "tdm_c_dout1_a";
1235 drive-strength-microamp = <3000>;
1239 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1241 groups = "tdm_c_dout1_z";
1244 drive-strength-microamp = <3000>;
1248 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1250 groups = "tdm_c_dout2_a";
1253 drive-strength-microamp = <3000>;
1257 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1259 groups = "tdm_c_dout2_z";
1262 drive-strength-microamp = <3000>;
1266 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1268 groups = "tdm_c_dout3_a";
1271 drive-strength-microamp = <3000>;
1275 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1277 groups = "tdm_c_dout3_z";
1280 drive-strength-microamp = <3000>;
1284 tdm_c_fs_a_pins: tdm-c-fs-a {
1286 groups = "tdm_c_fs_a";
1289 drive-strength-microamp = <3000>;
1293 tdm_c_fs_z_pins: tdm-c-fs-z {
1295 groups = "tdm_c_fs_z";
1298 drive-strength-microamp = <3000>;
1302 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1304 groups = "tdm_c_sclk_a";
1307 drive-strength-microamp = <3000>;
1311 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1313 groups = "tdm_c_sclk_z";
1316 drive-strength-microamp = <3000>;
1320 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1322 groups = "tdm_c_slv_fs_a";
1328 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1330 groups = "tdm_c_slv_fs_z";
1336 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1338 groups = "tdm_c_slv_sclk_a";
1344 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1346 groups = "tdm_c_slv_sclk_z";
1352 uart_a_pins: uart-a {
1354 groups = "uart_a_tx",
1356 function = "uart_a";
1361 uart_a_cts_rts_pins: uart-a-cts-rts {
1363 groups = "uart_a_cts",
1365 function = "uart_a";
1370 uart_b_pins: uart-b {
1372 groups = "uart_b_tx",
1374 function = "uart_b";
1379 uart_c_pins: uart-c {
1381 groups = "uart_c_tx",
1383 function = "uart_c";
1388 uart_c_cts_rts_pins: uart-c-cts-rts {
1390 groups = "uart_c_cts",
1392 function = "uart_c";
1399 usb2_phy0: phy@36000 {
1400 compatible = "amlogic,g12a-usb2-phy";
1401 reg = <0x0 0x36000 0x0 0x2000>;
1403 clock-names = "xtal";
1404 resets = <&reset RESET_USB_PHY20>;
1405 reset-names = "phy";
1410 compatible = "simple-bus";
1411 reg = <0x0 0x38000 0x0 0x400>;
1412 #address-cells = <2>;
1414 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1416 canvas: video-lut@48 {
1417 compatible = "amlogic,canvas";
1418 reg = <0x0 0x48 0x0 0x14>;
1422 usb2_phy1: phy@3a000 {
1423 compatible = "amlogic,g12a-usb2-phy";
1424 reg = <0x0 0x3a000 0x0 0x2000>;
1426 clock-names = "xtal";
1427 resets = <&reset RESET_USB_PHY21>;
1428 reset-names = "phy";
1433 compatible = "simple-bus";
1434 reg = <0x0 0x3c000 0x0 0x1400>;
1435 #address-cells = <2>;
1437 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1439 hhi: system-controller@0 {
1440 compatible = "amlogic,meson-gx-hhi-sysctrl",
1441 "simple-mfd", "syscon";
1442 reg = <0 0 0 0x400>;
1444 clkc: clock-controller {
1445 compatible = "amlogic,g12a-clkc";
1448 clock-names = "xtal";
1453 pdm: audio-controller@40000 {
1454 compatible = "amlogic,g12a-pdm",
1456 reg = <0x0 0x40000 0x0 0x34>;
1457 #sound-dai-cells = <0>;
1458 sound-name-prefix = "PDM";
1459 clocks = <&clkc_audio AUD_CLKID_PDM>,
1460 <&clkc_audio AUD_CLKID_PDM_DCLK>,
1461 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
1462 clock-names = "pclk", "dclk", "sysclk";
1463 status = "disabled";
1467 compatible = "simple-bus";
1468 reg = <0x0 0x42000 0x0 0x2000>;
1469 #address-cells = <2>;
1471 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
1473 clkc_audio: clock-controller@0 {
1474 status = "disabled";
1475 compatible = "amlogic,g12a-audio-clkc";
1476 reg = <0x0 0x0 0x0 0xb4>;
1479 clocks = <&clkc CLKID_AUDIO>,
1480 <&clkc CLKID_MPLL0>,
1481 <&clkc CLKID_MPLL1>,
1482 <&clkc CLKID_MPLL2>,
1483 <&clkc CLKID_MPLL3>,
1484 <&clkc CLKID_HIFI_PLL>,
1485 <&clkc CLKID_FCLK_DIV3>,
1486 <&clkc CLKID_FCLK_DIV4>,
1487 <&clkc CLKID_GP0_PLL>;
1488 clock-names = "pclk",
1498 resets = <&reset RESET_AUDIO>;
1501 toddr_a: audio-controller@100 {
1502 compatible = "amlogic,g12a-toddr",
1503 "amlogic,axg-toddr";
1504 reg = <0x0 0x100 0x0 0x1c>;
1505 #sound-dai-cells = <0>;
1506 sound-name-prefix = "TODDR_A";
1507 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
1508 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1509 resets = <&arb AXG_ARB_TODDR_A>;
1510 status = "disabled";
1513 toddr_b: audio-controller@140 {
1514 compatible = "amlogic,g12a-toddr",
1515 "amlogic,axg-toddr";
1516 reg = <0x0 0x140 0x0 0x1c>;
1517 #sound-dai-cells = <0>;
1518 sound-name-prefix = "TODDR_B";
1519 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
1520 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1521 resets = <&arb AXG_ARB_TODDR_B>;
1522 status = "disabled";
1525 toddr_c: audio-controller@180 {
1526 compatible = "amlogic,g12a-toddr",
1527 "amlogic,axg-toddr";
1528 reg = <0x0 0x180 0x0 0x1c>;
1529 #sound-dai-cells = <0>;
1530 sound-name-prefix = "TODDR_C";
1531 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
1532 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1533 resets = <&arb AXG_ARB_TODDR_C>;
1534 status = "disabled";
1537 frddr_a: audio-controller@1c0 {
1538 compatible = "amlogic,g12a-frddr",
1539 "amlogic,axg-frddr";
1540 reg = <0x0 0x1c0 0x0 0x1c>;
1541 #sound-dai-cells = <0>;
1542 sound-name-prefix = "FRDDR_A";
1543 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
1544 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1545 resets = <&arb AXG_ARB_FRDDR_A>;
1546 status = "disabled";
1549 frddr_b: audio-controller@200 {
1550 compatible = "amlogic,g12a-frddr",
1551 "amlogic,axg-frddr";
1552 reg = <0x0 0x200 0x0 0x1c>;
1553 #sound-dai-cells = <0>;
1554 sound-name-prefix = "FRDDR_B";
1555 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
1556 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1557 resets = <&arb AXG_ARB_FRDDR_B>;
1558 status = "disabled";
1561 frddr_c: audio-controller@240 {
1562 compatible = "amlogic,g12a-frddr",
1563 "amlogic,axg-frddr";
1564 reg = <0x0 0x240 0x0 0x1c>;
1565 #sound-dai-cells = <0>;
1566 sound-name-prefix = "FRDDR_C";
1567 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
1568 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1569 resets = <&arb AXG_ARB_FRDDR_C>;
1570 status = "disabled";
1573 arb: reset-controller@280 {
1574 status = "disabled";
1575 compatible = "amlogic,meson-axg-audio-arb";
1576 reg = <0x0 0x280 0x0 0x4>;
1578 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1581 tdmin_a: audio-controller@300 {
1582 compatible = "amlogic,g12a-tdmin",
1583 "amlogic,axg-tdmin";
1584 reg = <0x0 0x300 0x0 0x40>;
1585 sound-name-prefix = "TDMIN_A";
1586 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1587 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1588 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1589 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1590 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1591 clock-names = "pclk", "sclk", "sclk_sel",
1592 "lrclk", "lrclk_sel";
1593 status = "disabled";
1596 tdmin_b: audio-controller@340 {
1597 compatible = "amlogic,g12a-tdmin",
1598 "amlogic,axg-tdmin";
1599 reg = <0x0 0x340 0x0 0x40>;
1600 sound-name-prefix = "TDMIN_B";
1601 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1602 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1603 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1604 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1605 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1606 clock-names = "pclk", "sclk", "sclk_sel",
1607 "lrclk", "lrclk_sel";
1608 status = "disabled";
1611 tdmin_c: audio-controller@380 {
1612 compatible = "amlogic,g12a-tdmin",
1613 "amlogic,axg-tdmin";
1614 reg = <0x0 0x380 0x0 0x40>;
1615 sound-name-prefix = "TDMIN_C";
1616 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1617 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1618 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1619 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1620 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1621 clock-names = "pclk", "sclk", "sclk_sel",
1622 "lrclk", "lrclk_sel";
1623 status = "disabled";
1626 tdmin_lb: audio-controller@3c0 {
1627 compatible = "amlogic,g12a-tdmin",
1628 "amlogic,axg-tdmin";
1629 reg = <0x0 0x3c0 0x0 0x40>;
1630 sound-name-prefix = "TDMIN_LB";
1631 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1632 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1633 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1634 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1635 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1636 clock-names = "pclk", "sclk", "sclk_sel",
1637 "lrclk", "lrclk_sel";
1638 status = "disabled";
1641 spdifin: audio-controller@400 {
1642 compatible = "amlogic,g12a-spdifin",
1643 "amlogic,axg-spdifin";
1644 reg = <0x0 0x400 0x0 0x30>;
1645 #sound-dai-cells = <0>;
1646 sound-name-prefix = "SPDIFIN";
1647 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1648 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1649 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1650 clock-names = "pclk", "refclk";
1651 status = "disabled";
1654 spdifout: audio-controller@480 {
1655 compatible = "amlogic,g12a-spdifout",
1656 "amlogic,axg-spdifout";
1657 reg = <0x0 0x480 0x0 0x50>;
1658 #sound-dai-cells = <0>;
1659 sound-name-prefix = "SPDIFOUT";
1660 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1661 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1662 clock-names = "pclk", "mclk";
1663 status = "disabled";
1666 tdmout_a: audio-controller@500 {
1667 compatible = "amlogic,g12a-tdmout";
1668 reg = <0x0 0x500 0x0 0x40>;
1669 sound-name-prefix = "TDMOUT_A";
1670 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1671 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1672 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1673 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1674 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1675 clock-names = "pclk", "sclk", "sclk_sel",
1676 "lrclk", "lrclk_sel";
1677 status = "disabled";
1680 tdmout_b: audio-controller@540 {
1681 compatible = "amlogic,g12a-tdmout";
1682 reg = <0x0 0x540 0x0 0x40>;
1683 sound-name-prefix = "TDMOUT_B";
1684 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1685 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1686 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1687 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1688 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1689 clock-names = "pclk", "sclk", "sclk_sel",
1690 "lrclk", "lrclk_sel";
1691 status = "disabled";
1694 tdmout_c: audio-controller@580 {
1695 compatible = "amlogic,g12a-tdmout";
1696 reg = <0x0 0x580 0x0 0x40>;
1697 sound-name-prefix = "TDMOUT_C";
1698 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1699 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1700 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1701 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1702 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1703 clock-names = "pclk", "sclk", "sclk_sel",
1704 "lrclk", "lrclk_sel";
1705 status = "disabled";
1708 spdifout_b: audio-controller@680 {
1709 compatible = "amlogic,g12a-spdifout",
1710 "amlogic,axg-spdifout";
1711 reg = <0x0 0x680 0x0 0x50>;
1712 #sound-dai-cells = <0>;
1713 sound-name-prefix = "SPDIFOUT_B";
1714 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
1715 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
1716 clock-names = "pclk", "mclk";
1717 status = "disabled";
1720 tohdmitx: audio-controller@744 {
1721 compatible = "amlogic,g12a-tohdmitx";
1722 reg = <0x0 0x744 0x0 0x4>;
1723 #sound-dai-cells = <1>;
1724 sound-name-prefix = "TOHDMITX";
1725 status = "disabled";
1729 usb3_pcie_phy: phy@46000 {
1730 compatible = "amlogic,g12a-usb3-pcie-phy";
1731 reg = <0x0 0x46000 0x0 0x2000>;
1732 clocks = <&clkc CLKID_PCIE_PLL>;
1733 clock-names = "ref_clk";
1734 resets = <&reset RESET_PCIE_PHY>;
1735 reset-names = "phy";
1736 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1737 assigned-clock-rates = <100000000>;
1741 eth_phy: mdio-multiplexer@4c000 {
1742 compatible = "amlogic,g12a-mdio-mux";
1743 reg = <0x0 0x4c000 0x0 0xa4>;
1744 clocks = <&clkc CLKID_ETH_PHY>,
1746 <&clkc CLKID_MPLL_50M>;
1747 clock-names = "pclk", "clkin0", "clkin1";
1748 mdio-parent-bus = <&mdio0>;
1749 #address-cells = <1>;
1754 #address-cells = <1>;
1760 #address-cells = <1>;
1763 internal_ephy: ethernet_phy@8 {
1764 compatible = "ethernet-phy-id0180.3301",
1765 "ethernet-phy-ieee802.3-c22";
1766 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1774 aobus: bus@ff800000 {
1775 compatible = "simple-bus";
1776 reg = <0x0 0xff800000 0x0 0x100000>;
1777 #address-cells = <2>;
1779 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1782 compatible = "amlogic,meson-gx-ao-sysctrl",
1783 "simple-mfd", "syscon";
1784 reg = <0x0 0x0 0x0 0x100>;
1785 #address-cells = <2>;
1787 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1789 clkc_AO: clock-controller {
1790 compatible = "amlogic,meson-g12a-aoclkc";
1793 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1794 clock-names = "xtal", "mpeg-clk";
1797 pwrc_vpu: power-controller-vpu {
1798 compatible = "amlogic,meson-g12a-pwrc-vpu";
1799 #power-domain-cells = <0>;
1800 amlogic,hhi-sysctrl = <&hhi>;
1801 resets = <&reset RESET_VIU>,
1802 <&reset RESET_VENC>,
1803 <&reset RESET_VCBUS>,
1804 <&reset RESET_BT656>,
1805 <&reset RESET_RDMA>,
1806 <&reset RESET_VENCI>,
1807 <&reset RESET_VENCP>,
1808 <&reset RESET_VDAC>,
1809 <&reset RESET_VDI6>,
1810 <&reset RESET_VENCL>,
1811 <&reset RESET_VID_LOCK>;
1812 clocks = <&clkc CLKID_VPU>,
1814 clock-names = "vpu", "vapb";
1816 * VPU clocking is provided by two identical clock paths
1817 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1818 * free mux to safely change frequency while running.
1819 * Same for VAPB but with a final gate after the glitch free mux.
1821 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1822 <&clkc CLKID_VPU_0>,
1823 <&clkc CLKID_VPU>, /* Glitch free mux */
1824 <&clkc CLKID_VAPB_0_SEL>,
1825 <&clkc CLKID_VAPB_0>,
1826 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1827 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1828 <0>, /* Do Nothing */
1829 <&clkc CLKID_VPU_0>,
1830 <&clkc CLKID_FCLK_DIV4>,
1831 <0>, /* Do Nothing */
1832 <&clkc CLKID_VAPB_0>;
1833 assigned-clock-rates = <0>, /* Do Nothing */
1835 <0>, /* Do Nothing */
1836 <0>, /* Do Nothing */
1838 <0>; /* Do Nothing */
1841 ao_pinctrl: pinctrl@14 {
1842 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1843 #address-cells = <2>;
1848 reg = <0x0 0x14 0x0 0x8>,
1850 <0x0 0x24 0x0 0x14>;
1856 gpio-ranges = <&ao_pinctrl 0 0 15>;
1859 i2c_ao_sck_pins: i2c_ao_sck_pins {
1861 groups = "i2c_ao_sck";
1862 function = "i2c_ao";
1864 drive-strength-microamp = <3000>;
1868 i2c_ao_sda_pins: i2c_ao_sda {
1870 groups = "i2c_ao_sda";
1871 function = "i2c_ao";
1873 drive-strength-microamp = <3000>;
1877 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1879 groups = "i2c_ao_sck_e";
1880 function = "i2c_ao";
1882 drive-strength-microamp = <3000>;
1886 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1888 groups = "i2c_ao_sda_e";
1889 function = "i2c_ao";
1891 drive-strength-microamp = <3000>;
1895 mclk0_ao_pins: mclk0-ao {
1897 groups = "mclk0_ao";
1898 function = "mclk0_ao";
1900 drive-strength-microamp = <3000>;
1904 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1906 groups = "tdm_ao_b_din0";
1907 function = "tdm_ao_b";
1912 spdif_ao_out_pins: spdif-ao-out {
1914 groups = "spdif_ao_out";
1915 function = "spdif_ao_out";
1916 drive-strength-microamp = <500>;
1921 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1923 groups = "tdm_ao_b_din1";
1924 function = "tdm_ao_b";
1929 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1931 groups = "tdm_ao_b_din2";
1932 function = "tdm_ao_b";
1937 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1939 groups = "tdm_ao_b_dout0";
1940 function = "tdm_ao_b";
1942 drive-strength-microamp = <3000>;
1946 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1948 groups = "tdm_ao_b_dout1";
1949 function = "tdm_ao_b";
1951 drive-strength-microamp = <3000>;
1955 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1957 groups = "tdm_ao_b_dout2";
1958 function = "tdm_ao_b";
1960 drive-strength-microamp = <3000>;
1964 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1966 groups = "tdm_ao_b_fs";
1967 function = "tdm_ao_b";
1969 drive-strength-microamp = <3000>;
1973 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1975 groups = "tdm_ao_b_sclk";
1976 function = "tdm_ao_b";
1978 drive-strength-microamp = <3000>;
1982 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1984 groups = "tdm_ao_b_slv_fs";
1985 function = "tdm_ao_b";
1990 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1992 groups = "tdm_ao_b_slv_sclk";
1993 function = "tdm_ao_b";
1998 uart_ao_a_pins: uart-a-ao {
2000 groups = "uart_ao_a_tx",
2002 function = "uart_ao_a";
2007 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
2009 groups = "uart_ao_a_cts",
2011 function = "uart_ao_a";
2016 pwm_ao_a_pins: pwm-ao-a {
2018 groups = "pwm_ao_a";
2019 function = "pwm_ao_a";
2024 pwm_ao_b_pins: pwm-ao-b {
2026 groups = "pwm_ao_b";
2027 function = "pwm_ao_b";
2032 pwm_ao_c_4_pins: pwm-ao-c-4 {
2034 groups = "pwm_ao_c_4";
2035 function = "pwm_ao_c";
2040 pwm_ao_c_6_pins: pwm-ao-c-6 {
2042 groups = "pwm_ao_c_6";
2043 function = "pwm_ao_c";
2048 pwm_ao_d_5_pins: pwm-ao-d-5 {
2050 groups = "pwm_ao_d_5";
2051 function = "pwm_ao_d";
2056 pwm_ao_d_10_pins: pwm-ao-d-10 {
2058 groups = "pwm_ao_d_10";
2059 function = "pwm_ao_d";
2064 pwm_ao_d_e_pins: pwm-ao-d-e {
2066 groups = "pwm_ao_d_e";
2067 function = "pwm_ao_d";
2071 remote_input_ao_pins: remote-input-ao {
2073 groups = "remote_ao_input";
2074 function = "remote_ao_input";
2082 compatible = "amlogic,meson-gx-ao-cec";
2083 reg = <0x0 0x00100 0x0 0x14>;
2084 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2085 clocks = <&clkc_AO CLKID_AO_CEC>;
2086 clock-names = "core";
2087 status = "disabled";
2090 sec_AO: ao-secure@140 {
2091 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2092 reg = <0x0 0x140 0x0 0x140>;
2093 amlogic,has-chip-id;
2097 compatible = "amlogic,meson-g12a-ao-cec";
2098 reg = <0x0 0x00280 0x0 0x1c>;
2099 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2100 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2101 clock-names = "oscin";
2102 status = "disabled";
2105 pwm_AO_cd: pwm@2000 {
2106 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2107 reg = <0x0 0x2000 0x0 0x20>;
2109 status = "disabled";
2112 uart_AO: serial@3000 {
2113 compatible = "amlogic,meson-gx-uart",
2114 "amlogic,meson-ao-uart";
2115 reg = <0x0 0x3000 0x0 0x18>;
2116 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2117 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2118 clock-names = "xtal", "pclk", "baud";
2119 status = "disabled";
2122 uart_AO_B: serial@4000 {
2123 compatible = "amlogic,meson-gx-uart",
2124 "amlogic,meson-ao-uart";
2125 reg = <0x0 0x4000 0x0 0x18>;
2126 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2127 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2128 clock-names = "xtal", "pclk", "baud";
2129 status = "disabled";
2133 compatible = "amlogic,meson-axg-i2c";
2134 status = "disabled";
2135 reg = <0x0 0x05000 0x0 0x20>;
2136 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2137 #address-cells = <1>;
2139 clocks = <&clkc CLKID_I2C>;
2142 pwm_AO_ab: pwm@7000 {
2143 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2144 reg = <0x0 0x7000 0x0 0x20>;
2146 status = "disabled";
2150 compatible = "amlogic,meson-gxbb-ir";
2151 reg = <0x0 0x8000 0x0 0x20>;
2152 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2153 status = "disabled";
2157 compatible = "amlogic,meson-g12a-saradc",
2158 "amlogic,meson-saradc";
2159 reg = <0x0 0x9000 0x0 0x48>;
2160 #io-channel-cells = <1>;
2161 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2163 <&clkc_AO CLKID_AO_SAR_ADC>,
2164 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2165 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2166 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2167 status = "disabled";
2172 compatible = "amlogic,meson-g12a-vpu";
2173 reg = <0x0 0xff900000 0x0 0x100000>,
2174 <0x0 0xff63c000 0x0 0x1000>;
2175 reg-names = "vpu", "hhi";
2176 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2177 #address-cells = <1>;
2179 amlogic,canvas = <&canvas>;
2180 power-domains = <&pwrc_vpu>;
2182 /* CVBS VDAC output port */
2183 cvbs_vdac_port: port@0 {
2187 /* HDMI-TX output port */
2188 hdmi_tx_port: port@1 {
2191 hdmi_tx_out: endpoint {
2192 remote-endpoint = <&hdmi_tx_in>;
2197 gic: interrupt-controller@ffc01000 {
2198 compatible = "arm,gic-400";
2199 reg = <0x0 0xffc01000 0 0x1000>,
2200 <0x0 0xffc02000 0 0x2000>,
2201 <0x0 0xffc04000 0 0x2000>,
2202 <0x0 0xffc06000 0 0x2000>;
2203 interrupt-controller;
2204 interrupts = <GIC_PPI 9
2205 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2206 #interrupt-cells = <3>;
2207 #address-cells = <0>;
2210 cbus: bus@ffd00000 {
2211 compatible = "simple-bus";
2212 reg = <0x0 0xffd00000 0x0 0x100000>;
2213 #address-cells = <2>;
2215 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2217 reset: reset-controller@1004 {
2218 compatible = "amlogic,meson-g12a-reset",
2219 "amlogic,meson-axg-reset";
2220 reg = <0x0 0x1004 0x0 0x9c>;
2224 gpio_intc: interrupt-controller@f080 {
2225 compatible = "amlogic,meson-g12a-gpio-intc",
2226 "amlogic,meson-gpio-intc";
2227 reg = <0x0 0xf080 0x0 0x10>;
2228 interrupt-controller;
2229 #interrupt-cells = <2>;
2230 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2234 compatible = "amlogic,meson-g12a-ee-pwm";
2235 reg = <0x0 0x19000 0x0 0x20>;
2237 status = "disabled";
2241 compatible = "amlogic,meson-g12a-ee-pwm";
2242 reg = <0x0 0x1a000 0x0 0x20>;
2244 status = "disabled";
2248 compatible = "amlogic,meson-g12a-ee-pwm";
2249 reg = <0x0 0x1b000 0x0 0x20>;
2251 status = "disabled";
2255 compatible = "amlogic,meson-axg-i2c";
2256 status = "disabled";
2257 reg = <0x0 0x1c000 0x0 0x20>;
2258 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2259 #address-cells = <1>;
2261 clocks = <&clkc CLKID_I2C>;
2265 compatible = "amlogic,meson-axg-i2c";
2266 status = "disabled";
2267 reg = <0x0 0x1d000 0x0 0x20>;
2268 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2269 #address-cells = <1>;
2271 clocks = <&clkc CLKID_I2C>;
2275 compatible = "amlogic,meson-axg-i2c";
2276 status = "disabled";
2277 reg = <0x0 0x1e000 0x0 0x20>;
2278 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2279 #address-cells = <1>;
2281 clocks = <&clkc CLKID_I2C>;
2285 compatible = "amlogic,meson-axg-i2c";
2286 status = "disabled";
2287 reg = <0x0 0x1f000 0x0 0x20>;
2288 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2289 #address-cells = <1>;
2291 clocks = <&clkc CLKID_I2C>;
2294 clk_msr: clock-measure@18000 {
2295 compatible = "amlogic,meson-g12a-clk-measure";
2296 reg = <0x0 0x18000 0x0 0x10>;
2299 uart_C: serial@22000 {
2300 compatible = "amlogic,meson-gx-uart";
2301 reg = <0x0 0x22000 0x0 0x18>;
2302 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2303 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2304 clock-names = "xtal", "pclk", "baud";
2305 status = "disabled";
2308 uart_B: serial@23000 {
2309 compatible = "amlogic,meson-gx-uart";
2310 reg = <0x0 0x23000 0x0 0x18>;
2311 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2312 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2313 clock-names = "xtal", "pclk", "baud";
2314 status = "disabled";
2317 uart_A: serial@24000 {
2318 compatible = "amlogic,meson-gx-uart";
2319 reg = <0x0 0x24000 0x0 0x18>;
2320 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2321 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2322 clock-names = "xtal", "pclk", "baud";
2323 status = "disabled";
2327 sd_emmc_a: sd@ffe03000 {
2328 compatible = "amlogic,meson-axg-mmc";
2329 reg = <0x0 0xffe03000 0x0 0x800>;
2330 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2331 status = "disabled";
2332 clocks = <&clkc CLKID_SD_EMMC_A>,
2333 <&clkc CLKID_SD_EMMC_A_CLK0>,
2334 <&clkc CLKID_FCLK_DIV2>;
2335 clock-names = "core", "clkin0", "clkin1";
2336 resets = <&reset RESET_SD_EMMC_A>;
2337 amlogic,dram-access-quirk;
2340 sd_emmc_b: sd@ffe05000 {
2341 compatible = "amlogic,meson-axg-mmc";
2342 reg = <0x0 0xffe05000 0x0 0x800>;
2343 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2344 status = "disabled";
2345 clocks = <&clkc CLKID_SD_EMMC_B>,
2346 <&clkc CLKID_SD_EMMC_B_CLK0>,
2347 <&clkc CLKID_FCLK_DIV2>;
2348 clock-names = "core", "clkin0", "clkin1";
2349 resets = <&reset RESET_SD_EMMC_B>;
2352 sd_emmc_c: mmc@ffe07000 {
2353 compatible = "amlogic,meson-axg-mmc";
2354 reg = <0x0 0xffe07000 0x0 0x800>;
2355 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2356 status = "disabled";
2357 clocks = <&clkc CLKID_SD_EMMC_C>,
2358 <&clkc CLKID_SD_EMMC_C_CLK0>,
2359 <&clkc CLKID_FCLK_DIV2>;
2360 clock-names = "core", "clkin0", "clkin1";
2361 resets = <&reset RESET_SD_EMMC_C>;
2365 status = "disabled";
2366 compatible = "amlogic,meson-g12a-usb-ctrl";
2367 reg = <0x0 0xffe09000 0x0 0xa0>;
2368 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2369 #address-cells = <2>;
2373 clocks = <&clkc CLKID_USB>;
2374 resets = <&reset RESET_USB>;
2378 phys = <&usb2_phy0>, <&usb2_phy1>,
2379 <&usb3_pcie_phy PHY_TYPE_USB3>;
2380 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2382 dwc2: usb@ff400000 {
2383 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2384 reg = <0x0 0xff400000 0x0 0x40000>;
2385 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2386 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2387 clock-names = "ddr";
2388 phys = <&usb2_phy1>;
2389 dr_mode = "peripheral";
2390 g-rx-fifo-size = <192>;
2391 g-np-tx-fifo-size = <128>;
2392 g-tx-fifo-size = <128 128 16 16 16>;
2395 dwc3: usb@ff500000 {
2396 compatible = "snps,dwc3";
2397 reg = <0x0 0xff500000 0x0 0x100000>;
2398 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2400 snps,dis_u2_susphy_quirk;
2401 snps,quirk-frame-length-adjustment;
2405 mali: gpu@ffe40000 {
2406 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2407 reg = <0x0 0xffe40000 0x0 0x40000>;
2408 interrupt-parent = <&gic>;
2409 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
2410 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2411 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
2412 interrupt-names = "gpu", "mmu", "job";
2413 clocks = <&clkc CLKID_MALI>;
2414 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2417 * Mali clocking is provided by two identical clock paths
2418 * MALI_0 and MALI_1 muxed to a single clock by a glitch
2419 * free mux to safely change frequency while running.
2421 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
2422 <&clkc CLKID_MALI_0>,
2423 <&clkc CLKID_MALI>; /* Glitch free mux */
2424 assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
2425 <0>, /* Do Nothing */
2426 <&clkc CLKID_MALI_0>;
2427 assigned-clock-rates = <0>, /* Do Nothing */
2429 <0>; /* Do Nothing */
2434 compatible = "arm,armv8-timer";
2435 interrupts = <GIC_PPI 13
2436 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2438 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2440 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2442 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2446 compatible = "fixed-clock";
2447 clock-frequency = <24000000>;
2448 clock-output-names = "xtal";