1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/power/meson-g12a-power.h>
10 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
14 tdmif_a: audio-controller-0 {
15 compatible = "amlogic,axg-tdm-iface";
16 #sound-dai-cells = <0>;
17 sound-name-prefix = "TDM_A";
18 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
19 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
20 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
21 clock-names = "mclk", "sclk", "lrclk";
25 tdmif_b: audio-controller-1 {
26 compatible = "amlogic,axg-tdm-iface";
27 #sound-dai-cells = <0>;
28 sound-name-prefix = "TDM_B";
29 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
30 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
31 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
32 clock-names = "mclk", "sclk", "lrclk";
36 tdmif_c: audio-controller-2 {
37 compatible = "amlogic,axg-tdm-iface";
38 #sound-dai-cells = <0>;
39 sound-name-prefix = "TDM_C";
40 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
41 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
42 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
43 clock-names = "mclk", "sclk", "lrclk";
49 pdm: audio-controller@40000 {
50 compatible = "amlogic,g12a-pdm",
52 reg = <0x0 0x40000 0x0 0x34>;
53 #sound-dai-cells = <0>;
54 sound-name-prefix = "PDM";
55 clocks = <&clkc_audio AUD_CLKID_PDM>,
56 <&clkc_audio AUD_CLKID_PDM_DCLK>,
57 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
58 clock-names = "pclk", "dclk", "sysclk";
63 compatible = "simple-bus";
64 reg = <0x0 0x42000 0x0 0x2000>;
67 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
69 clkc_audio: clock-controller@0 {
71 compatible = "amlogic,g12a-audio-clkc";
72 reg = <0x0 0x0 0x0 0xb4>;
76 clocks = <&clkc CLKID_AUDIO>,
81 <&clkc CLKID_HIFI_PLL>,
82 <&clkc CLKID_FCLK_DIV3>,
83 <&clkc CLKID_FCLK_DIV4>,
84 <&clkc CLKID_GP0_PLL>;
95 resets = <&reset RESET_AUDIO>;
98 toddr_a: audio-controller@100 {
99 compatible = "amlogic,g12a-toddr",
101 reg = <0x0 0x100 0x0 0x2c>;
102 #sound-dai-cells = <0>;
103 sound-name-prefix = "TODDR_A";
104 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
105 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
106 resets = <&arb AXG_ARB_TODDR_A>,
107 <&clkc_audio AUD_RESET_TODDR_A>;
108 reset-names = "arb", "rst";
109 amlogic,fifo-depth = <512>;
113 toddr_b: audio-controller@140 {
114 compatible = "amlogic,g12a-toddr",
116 reg = <0x0 0x140 0x0 0x2c>;
117 #sound-dai-cells = <0>;
118 sound-name-prefix = "TODDR_B";
119 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
120 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
121 resets = <&arb AXG_ARB_TODDR_B>,
122 <&clkc_audio AUD_RESET_TODDR_B>;
123 reset-names = "arb", "rst";
124 amlogic,fifo-depth = <256>;
128 toddr_c: audio-controller@180 {
129 compatible = "amlogic,g12a-toddr",
131 reg = <0x0 0x180 0x0 0x2c>;
132 #sound-dai-cells = <0>;
133 sound-name-prefix = "TODDR_C";
134 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
135 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
136 resets = <&arb AXG_ARB_TODDR_C>,
137 <&clkc_audio AUD_RESET_TODDR_C>;
138 reset-names = "arb", "rst";
139 amlogic,fifo-depth = <256>;
143 frddr_a: audio-controller@1c0 {
144 compatible = "amlogic,g12a-frddr",
146 reg = <0x0 0x1c0 0x0 0x2c>;
147 #sound-dai-cells = <0>;
148 sound-name-prefix = "FRDDR_A";
149 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
150 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
151 resets = <&arb AXG_ARB_FRDDR_A>,
152 <&clkc_audio AUD_RESET_FRDDR_A>;
153 reset-names = "arb", "rst";
154 amlogic,fifo-depth = <512>;
158 frddr_b: audio-controller@200 {
159 compatible = "amlogic,g12a-frddr",
161 reg = <0x0 0x200 0x0 0x2c>;
162 #sound-dai-cells = <0>;
163 sound-name-prefix = "FRDDR_B";
164 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
165 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
166 resets = <&arb AXG_ARB_FRDDR_B>,
167 <&clkc_audio AUD_RESET_FRDDR_B>;
168 reset-names = "arb", "rst";
169 amlogic,fifo-depth = <256>;
173 frddr_c: audio-controller@240 {
174 compatible = "amlogic,g12a-frddr",
176 reg = <0x0 0x240 0x0 0x2c>;
177 #sound-dai-cells = <0>;
178 sound-name-prefix = "FRDDR_C";
179 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
180 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
181 resets = <&arb AXG_ARB_FRDDR_C>,
182 <&clkc_audio AUD_RESET_FRDDR_C>;
183 reset-names = "arb", "rst";
184 amlogic,fifo-depth = <256>;
188 arb: reset-controller@280 {
190 compatible = "amlogic,meson-axg-audio-arb";
191 reg = <0x0 0x280 0x0 0x4>;
193 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
196 tdmin_a: audio-controller@300 {
197 compatible = "amlogic,g12a-tdmin",
199 reg = <0x0 0x300 0x0 0x40>;
200 sound-name-prefix = "TDMIN_A";
201 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
202 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
203 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
204 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
205 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
206 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
207 clock-names = "pclk", "sclk", "sclk_sel",
208 "lrclk", "lrclk_sel";
212 tdmin_b: audio-controller@340 {
213 compatible = "amlogic,g12a-tdmin",
215 reg = <0x0 0x340 0x0 0x40>;
216 sound-name-prefix = "TDMIN_B";
217 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
218 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
219 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
220 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
221 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
222 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
223 clock-names = "pclk", "sclk", "sclk_sel",
224 "lrclk", "lrclk_sel";
228 tdmin_c: audio-controller@380 {
229 compatible = "amlogic,g12a-tdmin",
231 reg = <0x0 0x380 0x0 0x40>;
232 sound-name-prefix = "TDMIN_C";
233 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
234 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
235 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
236 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
237 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
238 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
239 clock-names = "pclk", "sclk", "sclk_sel",
240 "lrclk", "lrclk_sel";
244 tdmin_lb: audio-controller@3c0 {
245 compatible = "amlogic,g12a-tdmin",
247 reg = <0x0 0x3c0 0x0 0x40>;
248 sound-name-prefix = "TDMIN_LB";
249 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
250 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
251 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
252 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
253 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
254 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
255 clock-names = "pclk", "sclk", "sclk_sel",
256 "lrclk", "lrclk_sel";
260 spdifin: audio-controller@400 {
261 compatible = "amlogic,g12a-spdifin",
262 "amlogic,axg-spdifin";
263 reg = <0x0 0x400 0x0 0x30>;
264 #sound-dai-cells = <0>;
265 sound-name-prefix = "SPDIFIN";
266 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
267 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
268 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
269 clock-names = "pclk", "refclk";
270 resets = <&clkc_audio AUD_RESET_SPDIFIN>;
274 spdifout: audio-controller@480 {
275 compatible = "amlogic,g12a-spdifout",
276 "amlogic,axg-spdifout";
277 reg = <0x0 0x480 0x0 0x50>;
278 #sound-dai-cells = <0>;
279 sound-name-prefix = "SPDIFOUT";
280 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
281 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
282 clock-names = "pclk", "mclk";
283 resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
287 tdmout_a: audio-controller@500 {
288 compatible = "amlogic,g12a-tdmout";
289 reg = <0x0 0x500 0x0 0x40>;
290 sound-name-prefix = "TDMOUT_A";
291 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
292 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
293 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
294 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
295 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
296 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
297 clock-names = "pclk", "sclk", "sclk_sel",
298 "lrclk", "lrclk_sel";
302 tdmout_b: audio-controller@540 {
303 compatible = "amlogic,g12a-tdmout";
304 reg = <0x0 0x540 0x0 0x40>;
305 sound-name-prefix = "TDMOUT_B";
306 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
307 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
308 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
309 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
310 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
311 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
312 clock-names = "pclk", "sclk", "sclk_sel",
313 "lrclk", "lrclk_sel";
317 tdmout_c: audio-controller@580 {
318 compatible = "amlogic,g12a-tdmout";
319 reg = <0x0 0x580 0x0 0x40>;
320 sound-name-prefix = "TDMOUT_C";
321 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
322 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
323 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
324 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
325 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
326 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
327 clock-names = "pclk", "sclk", "sclk_sel",
328 "lrclk", "lrclk_sel";
332 spdifout_b: audio-controller@680 {
333 compatible = "amlogic,g12a-spdifout",
334 "amlogic,axg-spdifout";
335 reg = <0x0 0x680 0x0 0x50>;
336 #sound-dai-cells = <0>;
337 sound-name-prefix = "SPDIFOUT_B";
338 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
339 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
340 clock-names = "pclk", "mclk";
341 resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
345 tohdmitx: audio-controller@744 {
346 compatible = "amlogic,g12a-tohdmitx";
347 reg = <0x0 0x744 0x0 0x4>;
348 #sound-dai-cells = <1>;
349 sound-name-prefix = "TOHDMITX";
350 resets = <&clkc_audio AUD_RESET_TOHDMITX>;
359 trip = <&cpu_passive>;
360 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
361 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
362 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
363 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
364 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
365 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
369 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
370 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
371 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
372 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
373 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
374 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
380 power-domains = <&pwrc PWRC_G12A_ETH_ID>;
384 power-domains = <&pwrc PWRC_G12A_VPU_ID>;
388 amlogic,dram-access-quirk;
392 power-domains = <&pwrc PWRC_G12A_VPU_ID>;
396 power-domains = <&pwrc PWRC_G12A_VPU_ID>;