arch/arm/dts/k3-am654-base-board-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 #include <dt-bindings/pinctrl/k3.h>
   7 #include <dt-bindings/dma/k3-udma.h>
   8
   9 / {
  10         chosen {
  11                 stdout-path = "serial2:115200n8";
  12         };
  13
  14         aliases {
  15                 serial2 = &main_uart0;
  16         };
  17 };
  18
  19 &cbass_main{
  20         u-boot,dm-spl;
  21
  22         main_pmx0: pinmux@11c000 {
  23                 compatible = "pinctrl-single";
  24                 reg = <0x0 0x11c000 0x0 0x2e4>;
  25                 #pinctrl-cells = <1>;
  26                 pinctrl-single,register-width = <32>;
  27                 pinctrl-single,function-mask = <0xffffffff>;
  28         };
  29
  30         main_pmx1: pinmux@11c2e8 {
  31                 compatible = "pinctrl-single";
  32                 reg = <0x0 0x11c2e8 0x0 0x24>;
  33                 #pinctrl-cells = <1>;
  34                 pinctrl-single,register-width = <32>;
  35                 pinctrl-single,function-mask = <0xffffffff>;
  36         };
  37
  38         sdhci0: sdhci@04F80000 {
  39                 compatible = "arasan,sdhci-5.1";
  40                 reg = <0x0 0x4F80000 0x0 0x1000>,
  41                       <0x0 0x4F90000 0x0 0x400>;
  42                 clocks = <&k3_clks 47 1>;
  43                 power-domains = <&k3_pds 47>;
  44                 max-frequency = <25000000>;
  45         };
  46
  47         sdhci1: sdhci@04FA0000 {
  48                 compatible = "arasan,sdhci-5.1";
  49                 reg = <0x0 0x4FA0000 0x0 0x1000>,
  50                       <0x0 0x4FB0000 0x0 0x400>;
  51                 clocks = <&k3_clks 48 1>;
  52                 power-domains = <&k3_pds 48>;
  53                 max-frequency = <25000000>;
  54         };
  55
  56 };
  57
  58 &cbass_mcu {
  59         u-boot,dm-spl;
  60         wkup_pmx0: pinmux@4301c000 {
  61                 compatible = "pinctrl-single";
  62                 reg = <0x0 0x4301c000 0x0 0x118>;
  63                 #pinctrl-cells = <1>;
  64                 pinctrl-single,register-width = <32>;
  65                 pinctrl-single,function-mask = <0xffffffff>;
  66         };
  67
  68         navss_mcu: navss-mcu {
  69                 compatible = "simple-bus";
  70                 #address-cells = <2>;
  71                 #size-cells = <2>;
  72                 ranges;
  73
  74                 ti,sci-dev-id = <119>;
  75
  76                 mcu_ringacc: ringacc@2b800000 {
  77                         compatible = "ti,am654-navss-ringacc";
  78                         reg =   <0x0 0x2b800000 0x0 0x400000>,
  79                                 <0x0 0x2b000000 0x0 0x400000>,
  80                                 <0x0 0x28590000 0x0 0x100>,
  81                                 <0x0 0x2a500000 0x0 0x40000>;
  82                         reg-names = "rt", "fifos",
  83                                     "proxy_gcfg", "proxy_target";
  84                         ti,num-rings = <286>;
  85                         ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
  86                         ti,dma-ring-reset-quirk;
  87                         ti,sci = <&dmsc>;
  88                         ti,sci-dev-id = <195>;
  89                 };
  90
  91                 mcu_udmap: udmap@285c0000 {
  92                         compatible = "ti,k3-navss-udmap";
  93                         reg =   <0x0 0x285c0000 0x0 0x100>,
  94                                 <0x0 0x2a800000 0x0 0x40000>,
  95                                 <0x0 0x2aa00000 0x0 0x40000>;
  96                         reg-names = "gcfg", "rchanrt", "tchanrt";
  97                         #dma-cells = <3>;
  98
  99                         ti,ringacc = <&mcu_ringacc>;
 100                         ti,psil-base = <0x6000>;
 101
 102                         ti,sci = <&dmsc>;
 103                         ti,sci-dev-id = <194>;
 104
 105                         ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
 106                                                 <0x2>; /* TX_CHAN */
 107                         ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
 108                                                 <0x4>; /* RX_CHAN */
 109                         ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
 110                         dma-coherent;
 111                 };
 112         };
 113 };
 114
 115 &cbass_wakeup {
 116         u-boot,dm-spl;
 117 };
 118
 119 &secure_proxy_main {
 120         u-boot,dm-spl;
 121 };
 122
 123 &dmsc {
 124         u-boot,dm-spl;
 125         k3_sysreset: sysreset-controller {
 126                 compatible = "ti,sci-sysreset";
 127                 u-boot,dm-spl;
 128         };
 129 };
 130
 131 &k3_pds {
 132         u-boot,dm-spl;
 133 };
 134
 135 &k3_clks {
 136         u-boot,dm-spl;
 137 };
 138
 139 &k3_reset {
 140         u-boot,dm-spl;
 141 };
 142
 143 &main_pmx0 {
 144         u-boot,dm-spl;
 145         main_uart0_pins_default: main_uart0_pins_default {
 146                 pinctrl-single,pins = <
 147                         AM65X_IOPAD(0x01e4, PIN_INPUT, 0)       /* (AF11) UART0_RXD */
 148                         AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)      /* (AE11) UART0_TXD */
 149                         AM65X_IOPAD(0x01ec, PIN_INPUT, 0)       /* (AG11) UART0_CTSn */
 150                         AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)      /* (AD11) UART0_RTSn */
 151                 >;
 152                 u-boot,dm-spl;
 153         };
 154
 155         main_mmc0_pins_default: main_mmc0_pins_default {
 156                 pinctrl-single,pins = <
 157                         AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0)      /* (B25) MMC0_CLK */
 158                         AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0)        /* (B27) MMC0_CMD */
 159                         AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0)        /* (A26) MMC0_DAT0 */
 160                         AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0)        /* (E25) MMC0_DAT1 */
 161                         AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0)        /* (C26) MMC0_DAT2 */
 162                         AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0)        /* (A25) MMC0_DAT3 */
 163                         AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0)        /* (E24) MMC0_DAT4 */
 164                         AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)        /* (A24) MMC0_DAT5 */
 165                         AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)        /* (B26) MMC0_DAT6 */
 166                         AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)        /* (D25) MMC0_DAT7 */
 167                         AM65X_IOPAD(0x01b0, PIN_INPUT, 0)                       /* (C25) MMC0_DS */
 168                 >;
 169                 u-boot,dm-spl;
 170         };
 171
 172         main_mmc1_pins_default: main_mmc1_pins_default {
 173                 pinctrl-single,pins = <
 174                         AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)      /* (C27) MMC1_CLK */
 175                         AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0)        /* (C28) MMC1_CMD */
 176                         AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0)        /* (D28) MMC1_DAT0 */
 177                         AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0)        /* (E27) MMC1_DAT1 */
 178                         AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0)        /* (D26) MMC1_DAT2 */
 179                         AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0)        /* (D27) MMC1_DAT3 */
 180                         AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)        /* (B24) MMC1_SDCD */
 181                         AM65X_IOPAD(0x02e0, PIN_INPUT, 0)                       /* (C24) MMC1_SDWP */
 182                 >;
 183                 u-boot,dm-spl;
 184         };
 185
 186 };
 187
 188 &main_pmx1 {
 189         u-boot,dm-spl;
 190 };
 191
 192 &main_uart0 {
 193         u-boot,dm-spl;
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&main_uart0_pins_default>;
 196         status = "okay";
 197 };
 198
 199 &sdhci0 {
 200         u-boot,dm-spl;
 201         status = "okay";
 202         non-removable;
 203         bus-width = <8>;
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&main_mmc0_pins_default>;
 206 };
 207
 208 &sdhci1 {
 209         u-boot,dm-spl;
 210         status = "okay";
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&main_mmc1_pins_default>;
 213         sdhci-caps-mask = <0x7 0x0>;
 214 };