1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
4 * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
7 #include "armv7-m.dtsi"
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/imxrt1020-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/memory/imxrt-sdram.h>
28 compatible = "fsl,imx-ckil", "fixed-clock";
30 clock-frequency = <32768>;
34 compatible = "fsl,imx-ckih1", "fixed-clock";
36 clock-frequency = <0>;
41 compatible = "fsl,imx-osc", "fixed-clock";
43 clock-frequency = <24000000>;
52 compatible = "fsl,imxrt-semc";
53 reg = <0x402f0000 0x4000>;
54 clocks = <&clks IMXRT1020_CLK_SEMC>;
55 pinctrl-0 = <&pinctrl_semc>;
56 pinctrl-names = "default";
60 lpuart1: serial@40184000 {
61 compatible = "fsl,imxrt-lpuart";
62 reg = <0x40184000 0x4000>;
63 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
64 clocks = <&clks IMXRT1020_CLK_LPUART1>;
69 iomuxc: iomuxc@401f8000 {
70 compatible = "fsl,imxrt-iomuxc";
71 reg = <0x401f8000 0x4000>;
77 compatible = "fsl,imxrt1020-ccm";
78 reg = <0x400fc000 0x4000>;
79 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
80 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
84 usdhc1: usdhc@402c0000 {
86 compatible = "fsl,imxrt-usdhc";
87 reg = <0x402c0000 0x10000>;
88 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
89 clocks = <&clks IMXRT1020_CLK_USDHC1>;
92 fsl,tuning-start-tap = <20>;
97 gpio1: gpio@401b8000 {
99 compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
100 reg = <0x401b8000 0x4000>;
101 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
102 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
109 gpio2: gpio@401bc000 {
111 compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
112 reg = <0x401bc000 0x4000>;
113 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
114 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
121 gpio3: gpio@401c0000 {
123 compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
124 reg = <0x401c0000 0x4000>;
125 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
126 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
129 interrupt-controller;
130 #interrupt-cells = <2>;