2 * Copyright 2015 Freescale Semiconductor, Inc.
3 * Copyright 2016 Toradex AG
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
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13 * License, or (at your option) any later version.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
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31 * The above copyright notice and this permission notice shall be
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54 clock-frequency = <996000000>;
58 compatible = "arm,cortex-a7";
61 clock-frequency = <996000000>;
67 compatible = "arm,coresight-etm3x", "arm,primecell";
68 reg = <0x3007d000 0x1000>;
71 * System will hang if added nosmp in kernel command line
72 * without arm,primecell-periphid because amba bus try to
73 * read id and core1 power off at this time.
75 arm,primecell-periphid = <0xbb956>;
77 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
78 clock-names = "apb_pclk";
81 etm1_out_port: endpoint {
82 remote-endpoint = <&ca_funnel_in_port1>;
90 usbotg2: usb@30b20000 {
91 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
92 reg = <0x30b20000 0x200>;
93 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
94 clocks = <&clks IMX7D_USB_CTRL_CLK>;
95 fsl,usbphy = <&usbphynop2>;
96 fsl,usbmisc = <&usbmisc2 0>;
97 phy-clkgate-delay-us = <400>;
101 usbmisc2: usbmisc@30b20200 {
103 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
104 reg = <0x30b20200 0x200>;
107 usbphynop2: usbphynop2 {
108 compatible = "usb-nop-xceiv";
109 clocks = <&clks IMX7D_USB_PHY2_CLK>;
110 clock-names = "main_clk";
113 fec2: ethernet@30bf0000 {
114 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
115 reg = <0x30bf0000 0x10000>;
116 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
117 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
118 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
119 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
120 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
121 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
122 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
123 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
124 clock-names = "ipg", "ahb", "ptp",
125 "enet_clk_ref", "enet_out";
126 fsl,num-tx-queues=<3>;
127 fsl,num-rx-queues=<3>;
135 ca_funnel_in_port1: endpoint {
137 remote-endpoint = <&etm1_out_port>;