arch/arm/dts/imx7d-sdb.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2017 NXP
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "imx7d.dtsi"
   9
  10 / {
  11         model = "Freescale i.MX7 SabreSD Board";
  12         compatible = "fsl,imx7d-sdb", "fsl,imx7d";
  13
  14         aliases {
  15                 spi5 = &soft_spi;
  16         };
  17
  18         memory {
  19                 reg = <0x80000000 0x80000000>;
  20         };
  21
  22         soft_spi: soft-spi {
  23                 compatible = "spi-gpio";
  24                 pinctrl-names = "default";
  25                 pinctrl-0 = <&pinctrl_spi1>;
  26                 status = "okay";
  27                 gpio-sck = <&gpio1 13 0>;
  28                 gpio-mosi = <&gpio1 9 0>;
  29                 cs-gpios = <&gpio1 12 0>;
  30                 num-chipselects = <1>;
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 gpio_spi: gpio_spi@0 {
  35                         compatible = "fairchild,74hc595";
  36                         gpio-controller;
  37                         #gpio-cells = <2>;
  38                         reg = <0>;
  39                         registers-number = <1>;
  40                         registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/
  41                         spi-max-frequency = <100000>;
  42                 };
  43         };
  44
  45         regulators {
  46                 compatible = "simple-bus";
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49
  50                 reg_usb_otg1_vbus: regulator@0 {
  51                         compatible = "regulator-fixed";
  52                         reg = <0>;
  53                         regulator-name = "usb_otg1_vbus";
  54                         regulator-min-microvolt = <5000000>;
  55                         regulator-max-microvolt = <5000000>;
  56                         gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  57                         enable-active-high;
  58                 };
  59
  60                 reg_usb_otg2_vbus: regulator@1 {
  61                         compatible = "regulator-fixed";
  62                         reg = <1>;
  63                         regulator-name = "usb_otg2_vbus";
  64                         regulator-min-microvolt = <5000000>;
  65                         regulator-max-microvolt = <5000000>;
  66                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  67                         enable-active-high;
  68                 };
  69
  70                 reg_sd1_vmmc: regulator@3 {
  71                         compatible = "regulator-fixed";
  72                         regulator-name = "VDD_SD1";
  73                         regulator-min-microvolt = <3300000>;
  74                         regulator-max-microvolt = <3300000>;
  75                         gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  76                         startup-delay-us = <200000>;
  77                         enable-active-high;
  78                 };
  79         };
  80 };
  81
  82 &iomuxc {
  83         imx7d-sdb {
  84                 pinctrl_spi1: spi1grp {
  85                         fsl,pins = <
  86                                 MX7D_PAD_GPIO1_IO09__GPIO1_IO9  0x59
  87                                 MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
  88                                 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
  89                         >;
  90                 };
  91
  92                 pinctrl_i2c1: i2c1grp {
  93                         fsl,pins = <
  94                                 MX7D_PAD_I2C1_SDA__I2C1_SDA     0x4000007f
  95                                 MX7D_PAD_I2C1_SCL__I2C1_SCL     0x4000007f
  96                         >;
  97                 };
  98
  99                 pinctrl_i2c2: i2c2grp {
 100                         fsl,pins = <
 101                                 MX7D_PAD_I2C2_SDA__I2C2_SDA     0x4000007f
 102                                 MX7D_PAD_I2C2_SCL__I2C2_SCL     0x4000007f
 103                         >;
 104                 };
 105
 106                 pinctrl_i2c3: i2c3grp {
 107                         fsl,pins = <
 108                                 MX7D_PAD_I2C3_SDA__I2C3_SDA     0x4000007f
 109                                 MX7D_PAD_I2C3_SCL__I2C3_SCL     0x4000007f
 110                         >;
 111                 };
 112
 113                 pinctrl_i2c4: i2c4grp {
 114                         fsl,pins = <
 115                                 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
 116                                 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
 117                         >;
 118                 };
 119
 120                 pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
 121                         fsl,pins = <
 122                                 MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x59 /* CD */
 123                                 MX7D_PAD_SD1_WP__GPIO5_IO1              0x59 /* WP */
 124                                 MX7D_PAD_SD1_RESET_B__GPIO5_IO2         0x59 /* vmmc */
 125                                 MX7D_PAD_GPIO1_IO08__SD1_VSELECT        0x59 /* VSELECT */
 126                         >;
 127                 };
 128
 129                 pinctrl_usdhc1: usdhc1grp {
 130                         fsl,pins = <
 131                                 MX7D_PAD_SD1_CMD__SD1_CMD               0x59
 132                                 MX7D_PAD_SD1_CLK__SD1_CLK               0x19
 133                                 MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59
 134                                 MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59
 135                                 MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59
 136                                 MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59
 137                         >;
 138                 };
 139
 140                 pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
 141                         fsl,pins = <
 142                                 MX7D_PAD_SD1_CMD__SD1_CMD               0x5a
 143                                 MX7D_PAD_SD1_CLK__SD1_CLK               0x1a
 144                                 MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5a
 145                                 MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5a
 146                                 MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5a
 147                                 MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5a
 148                         >;
 149                 };
 150
 151                 pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
 152                         fsl,pins = <
 153                                 MX7D_PAD_SD1_CMD__SD1_CMD               0x5b
 154                                 MX7D_PAD_SD1_CLK__SD1_CLK               0x1b
 155                                 MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5b
 156                                 MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5b
 157                                 MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5b
 158                                 MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5b
 159                         >;
 160                 };
 161
 162                 pinctrl_usdhc2: usdhc2grp {
 163                         fsl,pins = <
 164                                 MX7D_PAD_SD2_CMD__SD2_CMD       0x59
 165                                 MX7D_PAD_SD2_CLK__SD2_CLK       0x19
 166                                 MX7D_PAD_SD2_DATA0__SD2_DATA0   0x59
 167                                 MX7D_PAD_SD2_DATA1__SD2_DATA1   0x59
 168                                 MX7D_PAD_SD2_DATA2__SD2_DATA2   0x59
 169                                 MX7D_PAD_SD2_DATA3__SD2_DATA3   0x59
 170                                 MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21        0x19 /* WL_REG_ON */
 171                                 MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20        0x19 /* WL_HOST_WAKE */
 172                         >;
 173                 };
 174
 175                 pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
 176                         fsl,pins = <
 177                                 MX7D_PAD_SD2_CMD__SD2_CMD               0x5a
 178                                 MX7D_PAD_SD2_CLK__SD2_CLK               0x1a
 179                                 MX7D_PAD_SD2_DATA0__SD2_DATA0           0x5a
 180                                 MX7D_PAD_SD2_DATA1__SD2_DATA1           0x5a
 181                                 MX7D_PAD_SD2_DATA2__SD2_DATA2           0x5a
 182                                 MX7D_PAD_SD2_DATA3__SD2_DATA3           0x5a
 183                         >;
 184                 };
 185
 186                 pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
 187                         fsl,pins = <
 188                                 MX7D_PAD_SD2_CMD__SD2_CMD               0x5b
 189                                 MX7D_PAD_SD2_CLK__SD2_CLK               0x1b
 190                                 MX7D_PAD_SD2_DATA0__SD2_DATA0           0x5b
 191                                 MX7D_PAD_SD2_DATA1__SD2_DATA1           0x5b
 192                                 MX7D_PAD_SD2_DATA2__SD2_DATA2           0x5b
 193                                 MX7D_PAD_SD2_DATA3__SD2_DATA3           0x5b
 194                         >;
 195                 };
 196
 197                 pinctrl_usdhc3: usdhc3grp {
 198                         fsl,pins = <
 199                                 MX7D_PAD_SD3_CMD__SD3_CMD               0x59
 200                                 MX7D_PAD_SD3_CLK__SD3_CLK               0x19
 201                                 MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
 202                                 MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
 203                                 MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
 204                                 MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
 205                                 MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
 206                                 MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
 207                                 MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
 208                                 MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
 209                                 MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
 210                         >;
 211                 };
 212
 213                 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
 214                         fsl,pins = <
 215                                 MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
 216                                 MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
 217                                 MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
 218                                 MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
 219                                 MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
 220                                 MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
 221                                 MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
 222                                 MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
 223                                 MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
 224                                 MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
 225                                 MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
 226                         >;
 227                 };
 228
 229                 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
 230                         fsl,pins = <
 231                                 MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
 232                                 MX7D_PAD_SD3_CLK__SD3_CLK               0x1b
 233                                 MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
 234                                 MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
 235                                 MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
 236                                 MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
 237                                 MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
 238                                 MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
 239                                 MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
 240                                 MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
 241                                 MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
 242                         >;
 243                 };
 244         };
 245 };
 246
 247 &i2c1 {
 248         clock-frequency = <100000>;
 249         pinctrl-names = "default";
 250         pinctrl-0 = <&pinctrl_i2c1>;
 251         status = "okay";
 252
 253         pmic: pfuze3000@08 {
 254                 compatible = "fsl,pfuze3000";
 255                 reg = <0x08>;
 256
 257                 regulators {
 258                         sw1a_reg: sw1a {
 259                                 regulator-min-microvolt = <700000>;
 260                                 regulator-max-microvolt = <3300000>;
 261                                 regulator-boot-on;
 262                                 regulator-always-on;
 263                                 regulator-ramp-delay = <6250>;
 264                         };
 265
 266                         /* use sw1c_reg to align with pfuze100/pfuze200 */
 267                         sw1c_reg: sw1b {
 268                                 regulator-min-microvolt = <700000>;
 269                                 regulator-max-microvolt = <1475000>;
 270                                 regulator-boot-on;
 271                                 regulator-always-on;
 272                                 regulator-ramp-delay = <6250>;
 273                         };
 274
 275                         sw2_reg: sw2 {
 276                                 regulator-min-microvolt = <1500000>;
 277                                 regulator-max-microvolt = <1850000>;
 278                                 regulator-boot-on;
 279                                 regulator-always-on;
 280                         };
 281
 282                         sw3a_reg: sw3 {
 283                                 regulator-min-microvolt = <900000>;
 284                                 regulator-max-microvolt = <1650000>;
 285                                 regulator-boot-on;
 286                                 regulator-always-on;
 287                         };
 288
 289                         swbst_reg: swbst {
 290                                 regulator-min-microvolt = <5000000>;
 291                                 regulator-max-microvolt = <5150000>;
 292                         };
 293
 294                         snvs_reg: vsnvs {
 295                                 regulator-min-microvolt = <1000000>;
 296                                 regulator-max-microvolt = <3000000>;
 297                                 regulator-boot-on;
 298                                 regulator-always-on;
 299                         };
 300
 301                         vref_reg: vrefddr {
 302                                 regulator-boot-on;
 303                                 regulator-always-on;
 304                         };
 305
 306                         vgen1_reg: vldo1 {
 307                                 regulator-min-microvolt = <1800000>;
 308                                 regulator-max-microvolt = <3300000>;
 309                                 regulator-always-on;
 310                         };
 311
 312                         vgen2_reg: vldo2 {
 313                                 regulator-min-microvolt = <800000>;
 314                                 regulator-max-microvolt = <1550000>;
 315                                 regulator-always-on;
 316                         };
 317
 318                         vgen3_reg: vccsd {
 319                                 regulator-min-microvolt = <2850000>;
 320                                 regulator-max-microvolt = <3300000>;
 321                                 regulator-always-on;
 322                         };
 323
 324                         vgen4_reg: v33 {
 325                                 regulator-min-microvolt = <2850000>;
 326                                 regulator-max-microvolt = <3300000>;
 327                                 regulator-always-on;
 328                         };
 329
 330                         vgen5_reg: vldo3 {
 331                                 regulator-min-microvolt = <1800000>;
 332                                 regulator-max-microvolt = <3300000>;
 333                                 regulator-always-on;
 334                         };
 335
 336                         vgen6_reg: vldo4 {
 337                                 regulator-min-microvolt = <1800000>;
 338                                 regulator-max-microvolt = <3300000>;
 339                                 regulator-always-on;
 340                         };
 341                 };
 342         };
 343 };
 344
 345 &i2c2 {
 346         clock-frequency = <100000>;
 347         pinctrl-names = "default";
 348         pinctrl-0 = <&pinctrl_i2c2>;
 349         status = "okay";
 350 };
 351
 352 &i2c3 {
 353         clock-frequency = <100000>;
 354         pinctrl-names = "default";
 355         pinctrl-0 = <&pinctrl_i2c3>;
 356         status = "okay";
 357 };
 358
 359 &i2c4 {
 360         clock-frequency = <100000>;
 361         pinctrl-names = "default";
 362         pinctrl-0 = <&pinctrl_i2c4>;
 363         status = "okay";
 364 };
 365
 366 &usdhc1 {
 367         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 368         pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
 369         pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
 370         pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
 371         cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
 372         wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 373         vmmc-supply = <&reg_sd1_vmmc>;
 374         fsl,tuning-start-tap = <20>;
 375         fsl,tuning-step= <2>;
 376         status = "okay";
 377 };
 378
 379 &usdhc2 {
 380         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 381         pinctrl-0 = <&pinctrl_usdhc2>;
 382         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 383         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 384         non-removable;
 385         fsl,tuning-start-tap = <20>;
 386         fsl,tuning-step= <2>;
 387         status = "okay";
 388 };
 389
 390 &usdhc3 {
 391         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 392         pinctrl-0 = <&pinctrl_usdhc3>;
 393         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 394         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 395         bus-width = <8>;
 396         non-removable;
 397         fsl,tuning-start-tap = <20>;
 398         fsl,tuning-step= <2>;
 399         status = "okay";
 400 };