arch/arm/dts/imx7d-sdb-qspi.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
   4  * Copyright 2018 NXP
   5  */
   6
   7 #include "imx7d-sdb.dts"
   8
   9 /* disable epdc, conflict with qspi */
  10 &epdc {
  11         status = "disabled";
  12 };
  13
  14 &iomuxc {
  15         qspi1 {
  16                 pinctrl_qspi1_1: qspi1grp_1 {
  17                         fsl,pins = <
  18                                 MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
  19                                 MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
  20                                 MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
  21                                 MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
  22                                 MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
  23                                 MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
  24                         >;
  25                 };
  26         };
  27 };
  28
  29 &qspi1 {
  30         pinctrl-names = "default";
  31         pinctrl-0 = <&pinctrl_qspi1_1>;
  32         status = "okay";
  33         ddrsmp=<0>;
  34
  35         flash0: mx25l51245g@0 {
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38                 compatible = "macronix,mx25l51245g";
  39                 spi-max-frequency = <29000000>;
  40                 /* take off one dummy cycle */
  41                 spi-nor,ddr-quad-read-dummy = <5>;
  42                 reg = <0>;
  43         };
  44 };