arch/arm/dts/imx7-colibri.dts

   1 /*
   2  * Copyright 2016 Toradex AG
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+ or X11
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include "imx7.dtsi"
  10
  11 / {
  12         model = "Toradex Colibri iMX7S/D";
  13         compatible = "toradex,imx7-colibri", "fsl,imx7";
  14
  15         chosen {
  16                 stdout-path = &uart1;
  17         };
  18 };
  19
  20 &i2c1 {
  21         pinctrl-names = "default", "gpio";
  22         pinctrl-0 = <&pinctrl_i2c1>;
  23         pinctrl-1 = <&pinctrl_i2c1_gpio>;
  24         sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  25         scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  26         status = "okay";
  27 };
  28
  29 &i2c4 {
  30         pinctrl-names = "default", "gpio";
  31         pinctrl-0 = <&pinctrl_i2c4>;
  32         pinctrl-1 = <&pinctrl_i2c4_gpio>;
  33         sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
  34         scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
  35         status = "okay";
  36 };
  37
  38 &uart1 {
  39         pinctrl-names = "default";
  40         pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
  41         uart-has-rtscts;
  42         fsl,dte-mode;
  43         status = "okay";
  44 };
  45
  46 &iomuxc {
  47         pinctrl_i2c4: i2c4-grp {
  48                 fsl,pins = <
  49                         MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
  50                         MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
  51                 >;
  52         };
  53
  54         pinctrl_i2c4_gpio: i2c4-gpio-grp {
  55                         fsl,pins = <
  56                         MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
  57                         MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
  58                 >;
  59         };
  60
  61         pinctrl_uart1: uart1-grp {
  62                 fsl,pins = <
  63                         MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
  64                         MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
  65                         MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
  66                         MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
  67                 >;
  68         };
  69
  70         pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
  71                 fsl,pins = <
  72                         MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
  73                         MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
  74                 >;
  75         };
  76 };
  77
  78 &iomuxc_lpsr {
  79         pinctrl_i2c1: i2c1-grp {
  80                 fsl,pins = <
  81                         MX7D_PAD_GPIO1_IO05__I2C1_SDA   0x4000007f
  82                         MX7D_PAD_GPIO1_IO04__I2C1_SCL   0x4000007f
  83                 >;
  84         };
  85
  86         pinctrl_i2c1_gpio: i2c1-gpio-grp {
  87                 fsl,pins = <
  88                         MX7D_PAD_GPIO1_IO05__GPIO1_IO5  0x4000007f
  89                         MX7D_PAD_GPIO1_IO04__GPIO1_IO4  0x4000007f
  90                 >;
  91         };
  92 };